Re: [Valgrind-developers] Dealing with 32-byte loads/stores in Cachegrind/Callgrind

[Julian S. <js...@ac...>]

On Tuesday, May 22, 2012, Josef Weidendorfer wrote:

> > Can we model the 32-byte accesses correctly and just assert if the 3
> > line case occurs?
> 
> As far as I understand, the assertion in the simulator should not
> trigger in any case, as memory access lengths are always cut down to
> MIN_LINE_SIZE at the moment.

Yes, I think you are right.  My wording above was sloppy -- when I said
"refuse to process", I meant that the instrumenter asserted, not the
simulator.


> I think it makes more sense to cut access lengths down to the real
> minimum of used line sizes, using the patch below.

Yes.


> Hmm. If people explicitly configure for 16-byte line size, and use AVX,
> this will result in wrong simulations because of the large number of
> cut down access sizes. I see these options:
> * if we detect a processor with AVX, make 32 the minimal accepted
>    line size in manual configuration
> * count the number of cuts, and print a warning if a threshould of e.g.
>    10000 is reached ?
> * handle accesses straddling >2 lines correctly

This seems such a rare and obscure case that I don't think it is 
much worth worrying about.  One other option is to print a warning message
at the start ("you configured a line size < the maximum access size")
and then cut access lengths down to the line size, with no further
warnings.

IIUC, the attached patch (Josef's) almost implements this anyway; only
the initial warning message is missing.  Josef, is that correct?

J