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From: Florian K. <br...@ac...> - 2012-02-07 04:26:37
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On 02/05/2012 11:33 AM, Florian Krohm wrote:
> On 02/01/2012 05:08 AM, Julian Seward wrote:
>>
>>
>> This is a flattened version of the expression that Florian's patch aims to
>> find. But the entire compilation pipeline operates on flattened IR -- the
>> tree building stage is (almost) the last stage, and is only there so that
>> the instruction selectors have the opportunity to convert multiple expression
>> nodes into single instructions if they want.
>>
>
> [snip]
>
>> This should be fixed in the IR optimiser, though, not in the front ends,
>> since doing it in the front ends means duplicating functionality.
>>
>
> So here is a work-in-progress patch for the IR optimizer.
>
Consider this:
PUT(0) = 0xF:I64
t1 = GET:I64(0)
PUT(4) = 0x1E:I32
t2 = GET:I64(0)
t3 = And64(t2,t1)
sameIRExpr(t2,t1) will return true. But the computed values are
different. Salvaging this will be more difficult, as guest state access
is not in SSA.
I looked at a failing example and the above scenario is indeed
happening.
Florian
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