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From: Alexander G. <ag...@su...> - 2011-11-25 10:04:13
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On 25.11.2011, at 10:52, Julian Seward <js...@ac...> wrote:
> On Thursday, November 24, 2011, Alexander Graf wrote:
>> <pm215> agraf: 0xEB0D 0x0E4B: that is ADD.W r14, r13, r11 lsl 1 (encoding
>> T3) so looks ok <pm215> let me just see if it's fixed in svn
>> <pm215> nope, svn still has this bug, valgrind isn't allowing ADD.W rd,
>> r13, rm, shifted
>>
>> I'm not that deep into valgrind code (and ARM asm), so if someone more
>> knowledgable could implement this opcode I will gladly give it a try with
>> my as binary and see where it borks next :).
>
> Either .. file a bug report, and I'll fix it. But that won't be for at
> about a week. Or you can try fixing it yourself (should be very simple).
>
> In guest_arm_toIR.c around about line 16345 you should see the relevant
> handlers
>
> /* ---------- (T3) ADD{S}.W Rd, Rn, Rm, {shift} ---------- */
> /* ---------- (T3) SUB{S}.W Rd, Rn, Rm, {shift} ---------- */
> /* ---------- (T3) RSB{S}.W Rd, Rn, Rm, {shift} ---------- */
>
> Your problem is to set the "Bool valid" to True (see the code) since
> in this case it's ruled out by rN being r13 (which causes it to be
> considered as a BadReg).
>
> actually for a quick hack, you could probably just replace "!isBadReg(rN)"
> with "rN != 15". That's not a clean long term fix tho.
I just removed the imm5==0 and shift==0 checks for add.w :). That way I was able to at least debug my actual problem.
It would still be nice to have a real fix at the end of the day though. Would you prefer me to file a bug report or is this email enough to make you aware of it? :)
Thanks,
Alex
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