|
From: <sv...@va...> - 2011-08-11 14:48:00
|
Author: tom
Date: 2011-08-11 15:43:12 +0100 (Thu, 11 Aug 2011)
New Revision: 2192
Log:
Support FEMMS in x86 mode as we already do for amd64. Fix for #204574.
Note, from #124499 where this was discussed for amd64, that FEMMS is
a 3DNow instruction that has identical behaviour to EMMS and is only
supposed on AMD processors for backwards compatibility.
Modified:
trunk/priv/guest_x86_toIR.c
Modified: trunk/priv/guest_x86_toIR.c
===================================================================
--- trunk/priv/guest_x86_toIR.c 2011-08-10 12:58:03 UTC (rev 2191)
+++ trunk/priv/guest_x86_toIR.c 2011-08-11 14:43:12 UTC (rev 2192)
@@ -15006,11 +15006,12 @@
break;
}
+ case 0x0E: /* FEMMS */
case 0x77: /* EMMS */
if (sz != 4)
goto decode_failure;
do_EMMS_preamble();
- DIP("emms\n");
+ DIP("{f}emms\n");
break;
/* =-=-=-=-=-=-=-=-=- SGDT and SIDT =-=-=-=-=-=-=-=-=-=-= */
|