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From: <sv...@va...> - 2010-09-23 11:02:57
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Author: sewardj
Date: 2010-09-23 12:02:48 +0100 (Thu, 23 Sep 2010)
New Revision: 11375
Log:
arm-linux: zero out the least significant bit of R15 that we
ptrace into the child, so as to be a legitimate instruction
address in both ARM and Thumb mode.
Modified:
trunk/coregrind/m_debugger.c
Modified: trunk/coregrind/m_debugger.c
===================================================================
--- trunk/coregrind/m_debugger.c 2010-09-23 01:26:06 UTC (rev 11374)
+++ trunk/coregrind/m_debugger.c 2010-09-23 11:02:48 UTC (rev 11375)
@@ -223,7 +223,10 @@
uregs.ARM_ip = vex->guest_R12;
uregs.ARM_sp = vex->guest_R13;
uregs.ARM_lr = vex->guest_R14;
- uregs.ARM_pc = vex->guest_R15T;
+ // Remove the T bit from the bottom of R15T. It will get shipped
+ // over in CPSR.T instead, since LibVEX_GuestARM_get_cpsr copies
+ // it from R15T[0].
+ uregs.ARM_pc = vex->guest_R15T & 0xFFFFFFFE;
uregs.ARM_cpsr = LibVEX_GuestARM_get_cpsr(vex);
return VG_(ptrace)(VKI_PTRACE_SETREGS, pid, NULL, &uregs);
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