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From: <sv...@va...> - 2009-08-13 14:13:06
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Author: bart
Date: 2009-08-13 15:12:49 +0100 (Thu, 13 Aug 2009)
New Revision: 10801
Log:
Made behavior of tsan_unittest again identical to the original behavior.
Modified:
trunk/drd/tests/tsan_thread_wrappers_pthread.h
trunk/drd/tests/tsan_unittest.cpp
Modified: trunk/drd/tests/tsan_thread_wrappers_pthread.h
===================================================================
--- trunk/drd/tests/tsan_thread_wrappers_pthread.h 2009-08-13 09:30:57 UTC (rev 10800)
+++ trunk/drd/tests/tsan_thread_wrappers_pthread.h 2009-08-13 14:12:49 UTC (rev 10801)
@@ -65,7 +65,7 @@
#include "../../drd/drd.h"
#define ANNOTATE_NO_OP(arg) do { } while(0)
-#define ANNOTATE_EXPECT_RACE(addr, descr) DRDCL_(ignore_range)(addr, 4)
+#define ANNOTATE_EXPECT_RACE(addr, descr) do { } while(0)
static inline bool RunningOnValgrind() { return RUNNING_ON_VALGRIND; }
#include <assert.h>
Modified: trunk/drd/tests/tsan_unittest.cpp
===================================================================
--- trunk/drd/tests/tsan_unittest.cpp 2009-08-13 09:30:57 UTC (rev 10800)
+++ trunk/drd/tests/tsan_unittest.cpp 2009-08-13 14:12:49 UTC (rev 10801)
@@ -5813,31 +5813,31 @@
void Wr64_7() { MEM[7].u64[0] = 1; }
void Wr32_0() { MEM[0].u32[0] = 1; }
-void Wr32_1() { MEM[1].u32[3] = 1; }
-void Wr32_2() { MEM[2].u32[4] = 1; }
-void Wr32_3() { MEM[3].u32[7] = 1; }
-void Wr32_4() { MEM[4].u32[8] = 1; }
-void Wr32_5() { MEM[5].u32[11] = 1; }
-void Wr32_6() { MEM[6].u32[12] = 1; }
-void Wr32_7() { MEM[7].u32[15] = 1; }
+void Wr32_1() { MEM[1].u32[1] = 1; }
+void Wr32_2() { MEM[2].u32[0] = 1; }
+void Wr32_3() { MEM[3].u32[1] = 1; }
+void Wr32_4() { MEM[4].u32[0] = 1; }
+void Wr32_5() { MEM[5].u32[1] = 1; }
+void Wr32_6() { MEM[6].u32[0] = 1; }
+void Wr32_7() { MEM[7].u32[1] = 1; }
void Wr16_0() { MEM[0].u16[0] = 1; }
void Wr16_1() { MEM[1].u16[1] = 1; }
-void Wr16_2() { MEM[2].u16[0] = 1; }
-void Wr16_3() { MEM[3].u16[1] = 1; }
+void Wr16_2() { MEM[2].u16[2] = 1; }
+void Wr16_3() { MEM[3].u16[3] = 1; }
void Wr16_4() { MEM[4].u16[0] = 1; }
void Wr16_5() { MEM[5].u16[1] = 1; }
-void Wr16_6() { MEM[6].u16[0] = 1; }
-void Wr16_7() { MEM[7].u16[1] = 1; }
+void Wr16_6() { MEM[6].u16[2] = 1; }
+void Wr16_7() { MEM[7].u16[3] = 1; }
void Wr8_0() { MEM[0].u8[0] = 1; }
void Wr8_1() { MEM[1].u8[1] = 1; }
void Wr8_2() { MEM[2].u8[2] = 1; }
void Wr8_3() { MEM[3].u8[3] = 1; }
-void Wr8_4() { MEM[4].u8[0] = 1; }
-void Wr8_5() { MEM[5].u8[1] = 1; }
-void Wr8_6() { MEM[6].u8[2] = 1; }
-void Wr8_7() { MEM[7].u8[3] = 1; }
+void Wr8_4() { MEM[4].u8[4] = 1; }
+void Wr8_5() { MEM[5].u8[5] = 1; }
+void Wr8_6() { MEM[6].u8[6] = 1; }
+void Wr8_7() { MEM[7].u8[7] = 1; }
void WriteAll64() {
Wr64_0();
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