Author: sewardj Date: 2009-07-01 09:06:34 +0100 (Wed, 01 Jul 2009) New Revision: 1901 Log: Merge in branches/DCAS: This branch adds proper support for atomic instructions, proper in the sense that the atomicity is preserved through the compilation pipeline, and thus in the instrumented code. The change adds a new IR statement kind, IRStmt_CAS, which represents single- and doubleword compare-and-swap. This is used as the basis for the translation of all LOCK-prefixed instructions on x86 and amd64. The change also extends IRExpr_Load and IRStmt_Store so that load-linked and store-conditional operations can be represented. This facilitates correct translation of l[wd]arx and st[wd]cx. on ppc in the sense that these instructions will now eventually be regenerated at the end of the compilation pipeline. Modified: trunk/priv/guest-amd64/gdefs.h trunk/priv/guest-amd64/ghelpers.c trunk/priv/guest-amd64/toIR.c trunk/priv/guest-arm/toIR.c trunk/priv/guest-ppc/ghelpers.c trunk/priv/guest-ppc/toIR.c trunk/priv/guest-x86/toIR.c trunk/priv/host-amd64/hdefs.c trunk/priv/host-amd64/hdefs.h trunk/priv/host-amd64/isel.c trunk/priv/host-arm/isel.c trunk/priv/host-ppc/hdefs.c trunk/priv/host-ppc/hdefs.h trunk/priv/host-ppc/isel.c trunk/priv/host-x86/hdefs.c trunk/priv/host-x86/hdefs.h trunk/priv/host-x86/isel.c trunk/priv/ir/irdefs.c trunk/priv/ir/irmatch.c trunk/priv/ir/iropt.c trunk/priv/main/vex_main.c trunk/pub/libvex.h trunk/pub/libvex_guest_ppc32.h trunk/pub/libvex_guest_ppc64.h trunk/pub/libvex_ir.h trunk/pub/libvex_trc_values.h [... diff too large to include ...] |