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From: <sv...@va...> - 2008-08-06 19:13:37
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Author: sewardj
Date: 2008-08-06 20:13:42 +0100 (Wed, 06 Aug 2008)
New Revision: 1861
Log:
Ignore .EH bit in lwarx / ldarx as it appears to be merely a hint.
Modified:
trunk/priv/guest-ppc/toIR.c
Modified: trunk/priv/guest-ppc/toIR.c
===================================================================
--- trunk/priv/guest-ppc/toIR.c 2008-07-30 09:56:45 UTC (rev 1860)
+++ trunk/priv/guest-ppc/toIR.c 2008-08-06 19:13:42 UTC (rev 1861)
@@ -4852,11 +4852,11 @@
break;
case 0x014: // lwarx (Load Word and Reserve Indexed, PPC32 p458)
- if (b0 != 0) {
- vex_printf("dis_memsync(ppc)(lwarx,b0)\n");
- return False;
- }
- DIP("lwarx r%u,r%u,r%u\n", rD_addr, rA_addr, rB_addr);
+ /* According to the PowerPC ISA version 2.05, b0 (called EH
+ in the documentation) is merely a hint bit to the
+ hardware, I think as to whether or not contention is
+ likely. So we can just ignore it. */
+ DIP("lwarx r%u,r%u,r%u,EH=%u\n", rD_addr, rA_addr, rB_addr, (UInt)b0);
putIReg( rD_addr, mkSzWiden32(ty, loadBE(Ity_I32, mkexpr(EA)),
False) );
/* Take a reservation */
@@ -4946,11 +4946,11 @@
/* 64bit Memsync */
case 0x054: // ldarx (Load DWord and Reserve Indexed, PPC64 p473)
- if (b0 != 0) {
- vex_printf("dis_memsync(ppc)(ldarx,b0)\n");
- return False;
- }
- DIP("ldarx r%u,r%u,r%u\n", rD_addr, rA_addr, rB_addr);
+ /* According to the PowerPC ISA version 2.05, b0 (called EH
+ in the documentation) is merely a hint bit to the
+ hardware, I think as to whether or not contention is
+ likely. So we can just ignore it. */
+ DIP("ldarx r%u,r%u,r%u,EH=%u\n", rD_addr, rA_addr, rB_addr, (UInt)b0);
putIReg( rD_addr, loadBE(Ity_I64, mkexpr(EA)) );
// Take a reservation
putGST( PPC_GST_RESVN, mkexpr(EA) );
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