|
From: Julian S. <js...@ac...> - 2008-06-02 09:07:26
|
On Wednesday 28 May 2008 08:10, Bart Van Assche wrote: > On Wed, May 28, 2008 at 1:22 AM, Julian Seward <js...@ac...> wrote: > > lwarx and stwcx. are used together to create such sequences, but > > there is no real constraint on what insns go between them, either > > statically or dynamically. So there is no easy way, at JIT time, > > to guarantee to observe that a given sequence represents an > > atomic test-and-set (or whatever). At a guess I'd say it's > > undecideable in general. That said, it is probably possible to > > do better than at present by using some kind of idiom recognition > > scheme, or IR analysis. But neither of those will be simple or > > completely robust. > > I am familiar with how lwarx and stwcx work. But as far as I > understand the VEX source code currently no information is passed by > VEX to Valgrind tools about the bus snoop mechanism used by lwarx and > stwcx. Do you think it would be a good idea to modify VEX such that it > passes the following information to tools: > * For lwarx instructions, the address being watched on the bus. > * For stwcx instructions, the address for which the bus has been > watched and whether or not another CPU has accessed that address since > the bus watch started. It would be easy enough to modify vex to pass supply the relevant info, for example * for load instructions, whether they are a normal load or a lwarx * for store instructions, the same plus the tool gets to see all loads and stores anyway, if it wants. It seems to me that the above is not the real problem. The real problem is, even if you have all that information available, how can it be used to infer which pieces of memory are being atomically modified? J |