|
From: <sv...@va...> - 2008-05-13 08:51:27
|
Author: sewardj
Date: 2008-05-13 09:51:17 +0100 (Tue, 13 May 2008)
New Revision: 1842
Log:
Merge r1826 (amd64 support for FUCOMPP). (#161378, #160136)
Modified:
branches/VEX_3_3_BRANCH/priv/guest-amd64/toIR.c
Modified: branches/VEX_3_3_BRANCH/priv/guest-amd64/toIR.c
===================================================================
--- branches/VEX_3_3_BRANCH/priv/guest-amd64/toIR.c 2008-05-13 08:38:43 UTC (rev 1841)
+++ branches/VEX_3_3_BRANCH/priv/guest-amd64/toIR.c 2008-05-13 08:51:17 UTC (rev 1842)
@@ -5159,19 +5159,20 @@
get_ST(0), get_ST(r_src)) );
break;
-//.. case 0xE9: /* FUCOMPP %st(0),%st(1) */
-//.. DIP("fucompp %%st(0),%%st(1)\n");
-//.. /* This forces C1 to zero, which isn't right. */
-//.. put_C3210(
-//.. binop( Iop_And32,
-//.. binop(Iop_Shl32,
-//.. binop(Iop_CmpF64, get_ST(0), get_ST(1)),
-//.. mkU8(8)),
-//.. mkU32(0x4500)
-//.. ));
-//.. fp_pop();
-//.. fp_pop();
-//.. break;
+ case 0xE9: /* FUCOMPP %st(0),%st(1) */
+ DIP("fucompp %%st(0),%%st(1)\n");
+ /* This forces C1 to zero, which isn't right. */
+ put_C3210(
+ unop(Iop_32Uto64,
+ binop( Iop_And32,
+ binop(Iop_Shl32,
+ binop(Iop_CmpF64, get_ST(0), get_ST(1)),
+ mkU8(8)),
+ mkU32(0x4500)
+ )));
+ fp_pop();
+ fp_pop();
+ break;
default:
goto decode_fail;
|