|
From: <sv...@va...> - 2006-08-05 12:22:59
|
Author: sewardj
Date: 2006-08-05 13:22:52 +0100 (Sat, 05 Aug 2006)
New Revision: 5997
Log:
Regression tests for SSE3 support.
Added:
trunk/none/tests/amd64/insn_sse3.def
trunk/none/tests/amd64/insn_sse3.stderr.exp
trunk/none/tests/amd64/insn_sse3.stdout.exp
trunk/none/tests/amd64/insn_sse3.vgtest
trunk/none/tests/x86/insn_sse3.def
trunk/none/tests/x86/insn_sse3.stderr.exp
trunk/none/tests/x86/insn_sse3.stdout.exp
trunk/none/tests/x86/insn_sse3.vgtest
Modified:
trunk/none/tests/amd64/Makefile.am
trunk/none/tests/x86/Makefile.am
trunk/tests/cputest.c
Modified: trunk/none/tests/amd64/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/none/tests/amd64/Makefile.am 2006-08-04 12:42:06 UTC (rev 5996)
+++ trunk/none/tests/amd64/Makefile.am 2006-08-05 12:22:52 UTC (rev 5997)
@@ -2,7 +2,7 @@
noinst_SCRIPTS =3D filter_cpuid filter_stderr filter_int gen_insn_test.p=
l
=20
CLEANFILES =3D $(addsuffix .c,$(INSN_TESTS))
-INSN_TESTS =3D insn_basic insn_mmx insn_sse insn_sse2 insn_fpu
+INSN_TESTS =3D insn_basic insn_mmx insn_sse insn_sse2 insn_sse3 insn_fpu
=20
EXTRA_DIST =3D $(noinst_SCRIPTS) \
clc.vgtest clc.stdout.exp clc.stderr.exp \
@@ -35,6 +35,8 @@
insn_sse_LDADD =3D -lm
insn_sse2_SOURCES =3D insn_sse2.def
insn_sse2_LDADD =3D -lm
+insn_sse3_SOURCES =3D insn_sse3.def
+insn_sse3_LDADD =3D -lm
insn_fpu_SOURCES =3D insn_fpu.def
insn_fpu_LDADD =3D -lm
fxtract_LDADD =3D -lm
Added: trunk/none/tests/amd64/insn_sse3.def
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/none/tests/amd64/insn_sse3.def (rev 0)
+++ trunk/none/tests/amd64/insn_sse3.def 2006-08-05 12:22:52 UTC (rev 599=
7)
@@ -0,0 +1,43 @@
+addsubpd m128.pd[1.11,2.22] xmm.pd[41.1,42.2] =3D> 1.pd[39.99,44.42]
+addsubpd xmm.pd[1.11,2.22] xmm.pd[41.1,42.2] =3D> 1.pd[39.99,44.42]
+addsubps m128.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] =3D> 1=
.ps[39.99,44.42,39.97,48.84]
+addsubps xmm.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] =3D> 1.=
ps[39.99,44.42,39.97,48.84]
+haddpd m128.pd[1.11,2.22] xmm.pd[41.1,42.2] =3D> 1.pd[83.3,3.33]
+haddpd xmm.pd[1.11,2.22] xmm.pd[41.1,42.2] =3D> 1.pd[83.3,3.33]
+haddps m128.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] =3D> 1.p=
s[83.30,87.70,3.33,7.77]
+haddps xmm.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] =3D> 1.ps=
[83.30,87.70,3.33,7.77]
+hsubpd m128.pd[9.11,2.22] xmm.pd[41.1,42.2] =3D> 1.pd[-1.1,6.89]
+hsubpd xmm.pd[9.11,2.22] xmm.pd[41.1,42.2] =3D> 1.pd[-1.1,6.89]
+hsubps m128.ps[1.11,22.2,3.83,54.4] xmm.ps[41.1,43.2,434.3,144.4] =3D> 1=
.ps[-2.1,289.9,-21.09,-50.57]
+hsubps xmm.ps[1.11,22.2,3.83,54.4] xmm.ps[41.1,43.2,434.3,144.4] =3D> 1.=
ps[-2.1,289.9,-21.09,-50.57]
+lddqu m128.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888] =3D=
> 1.ud[11111,22222,33333,44444]
+movddup m64.ud[11111,22222] xmm.ud[55555,66666,77777,88888] =3D> 1.ud[11=
111,22222,11111,22222]
+movddup xmm.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888] =
=3D> 1.ud[11111,22222,11111,22222]
+movshdup m128.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888=
] =3D> 1.ud[22222,22222,44444,44444]
+movshdup xmm.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888]=
=3D> 1.ud[22222,22222,44444,44444]
+movsldup m128.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888=
] =3D> 1.ud[11111,11111,33333,33333]
+movsldup xmm.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888]=
=3D> 1.ud[11111,11111,33333,33333]
+fisttps fpucw[0xc00,0x000] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[=
0] =3D> 0.sw[1234] st0.ps[1111.1111]
+fisttps fpucw[0xc00,0x000] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw=
[0] =3D> 0.sw[-1234] st0.ps[1111.1111]
+fisttps fpucw[0xc00,0x400] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[=
0] =3D> 0.sw[1234] st0.ps[1111.1111]
+fisttps fpucw[0xc00,0x400] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw=
[0] =3D> 0.sw[-1234] st0.ps[1111.1111]
+fisttps fpucw[0xc00,0x800] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[=
0] =3D> 0.sw[1234] st0.ps[1111.1111]
+fisttps fpucw[0xc00,0x800] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw=
[0] =3D> 0.sw[-1234] st0.ps[1111.1111]
+fisttps fpucw[0xc00,0xc00] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[=
0] =3D> 0.sw[1234] st0.ps[1111.1111]
+fisttps fpucw[0xc00,0xc00] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw=
[0] =3D> 0.sw[-1234] st0.ps[1111.1111]
+fisttpl fpucw[0xc00,0x000] st0.pd[1234567.7654321] st1.ps[1111.1111] : m=
32.sd[0] =3D> 0.sd[1234567] st0.ps[1111.1111]
+fisttpl fpucw[0xc00,0x000] st0.pd[-1234567.7654321] st1.ps[1111.1111] : =
m32.sd[0] =3D> 0.sd[-1234567] st0.ps[1111.1111]
+fisttpl fpucw[0xc00,0x400] st0.pd[1234567.7654321] st1.ps[1111.1111] : m=
32.sd[0] =3D> 0.sd[1234567] st0.ps[1111.1111]
+fisttpl fpucw[0xc00,0x400] st0.pd[-1234567.7654321] st1.ps[1111.1111] : =
m32.sd[0] =3D> 0.sd[-1234567] st0.ps[1111.1111]
+fisttpl fpucw[0xc00,0x800] st0.pd[1234567.7654321] st1.ps[1111.1111] : m=
32.sd[0] =3D> 0.sd[1234567] st0.ps[1111.1111]
+fisttpl fpucw[0xc00,0x800] st0.pd[-1234567.7654321] st1.ps[1111.1111] : =
m32.sd[0] =3D> 0.sd[-1234567] st0.ps[1111.1111]
+fisttpl fpucw[0xc00,0xc00] st0.pd[1234567.7654321] st1.ps[1111.1111] : m=
32.sd[0] =3D> 0.sd[1234567] st0.ps[1111.1111]
+fisttpl fpucw[0xc00,0xc00] st0.pd[-1234567.7654321] st1.ps[1111.1111] : =
m32.sd[0] =3D> 0.sd[-1234567] st0.ps[1111.1111]
+fisttpq fpucw[0xc00,0x000] st0.pd[123456787654321.6] st1.ps[1111.1111] :=
m64.sq[0] =3D> 0.sq[123456787654321] st0.ps[1111.1111]
+fisttpq fpucw[0xc00,0x000] st0.pd[-123456787654321.6] st1.ps[1111.1111] =
: m64.sq[0] =3D> 0.sq[-123456787654321] st0.ps[1111.1111]
+fisttpq fpucw[0xc00,0x400] st0.pd[123456787654321.6] st1.ps[1111.1111] :=
m64.sq[0] =3D> 0.sq[123456787654321] st0.ps[1111.1111]
+fisttpq fpucw[0xc00,0x400] st0.pd[-123456787654321.6] st1.ps[1111.1111] =
: m64.sq[0] =3D> 0.sq[-123456787654321] st0.ps[1111.1111]
+fisttpq fpucw[0xc00,0x800] st0.pd[123456787654321.6] st1.ps[1111.1111] :=
m64.sq[0] =3D> 0.sq[123456787654321] st0.ps[1111.1111]
+fisttpq fpucw[0xc00,0x800] st0.pd[-123456787654321.6] st1.ps[1111.1111] =
: m64.sq[0] =3D> 0.sq[-123456787654321] st0.ps[1111.1111]
+fisttpq fpucw[0xc00,0xc00] st0.pd[123456787654321.6] st1.ps[1111.1111] :=
m64.sq[0] =3D> 0.sq[123456787654321] st0.ps[1111.1111]
+fisttpq fpucw[0xc00,0xc00] st0.pd[-123456787654321.6] st1.ps[1111.1111] =
: m64.sq[0] =3D> 0.sq[-123456787654321] st0.ps[1111.1111]
Added: trunk/none/tests/amd64/insn_sse3.stderr.exp
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
Added: trunk/none/tests/amd64/insn_sse3.stdout.exp
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/none/tests/amd64/insn_sse3.stdout.exp (=
rev 0)
+++ trunk/none/tests/amd64/insn_sse3.stdout.exp 2006-08-05 12:22:52 UTC (=
rev 5997)
@@ -0,0 +1,43 @@
+addsubpd_1 ... ok
+addsubpd_2 ... ok
+addsubps_1 ... ok
+addsubps_2 ... ok
+haddpd_1 ... ok
+haddpd_2 ... ok
+haddps_1 ... ok
+haddps_2 ... ok
+hsubpd_1 ... ok
+hsubpd_2 ... ok
+hsubps_1 ... ok
+hsubps_2 ... ok
+lddqu_1 ... ok
+movddup_1 ... ok
+movddup_2 ... ok
+movshdup_1 ... ok
+movshdup_2 ... ok
+movsldup_1 ... ok
+movsldup_2 ... ok
+fisttps_1 ... ok
+fisttps_2 ... ok
+fisttps_3 ... ok
+fisttps_4 ... ok
+fisttps_5 ... ok
+fisttps_6 ... ok
+fisttps_7 ... ok
+fisttps_8 ... ok
+fisttpl_1 ... ok
+fisttpl_2 ... ok
+fisttpl_3 ... ok
+fisttpl_4 ... ok
+fisttpl_5 ... ok
+fisttpl_6 ... ok
+fisttpl_7 ... ok
+fisttpl_8 ... ok
+fisttpq_1 ... ok
+fisttpq_2 ... ok
+fisttpq_3 ... ok
+fisttpq_4 ... ok
+fisttpq_5 ... ok
+fisttpq_6 ... ok
+fisttpq_7 ... ok
+fisttpq_8 ... ok
Added: trunk/none/tests/amd64/insn_sse3.vgtest
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/none/tests/amd64/insn_sse3.vgtest (rev =
0)
+++ trunk/none/tests/amd64/insn_sse3.vgtest 2006-08-05 12:22:52 UTC (rev =
5997)
@@ -0,0 +1,3 @@
+prog: ../../../none/tests/amd64/insn_sse3
+prereq: ../../../tests/cputest amd64-sse3
+vgopts: -q
Modified: trunk/none/tests/x86/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/none/tests/x86/Makefile.am 2006-08-04 12:42:06 UTC (rev 5996)
+++ trunk/none/tests/x86/Makefile.am 2006-08-05 12:22:52 UTC (rev 5997)
@@ -1,7 +1,8 @@
noinst_SCRIPTS =3D filter_cpuid filter_stderr gen_insn_test.pl
=20
CLEANFILES =3D $(addsuffix .c,$(INSN_TESTS))
-INSN_TESTS =3D insn_basic insn_fpu insn_cmov insn_mmx insn_mmxext insn_s=
se insn_sse2
+INSN_TESTS =3D insn_basic insn_fpu insn_cmov insn_mmx insn_mmxext \
+ insn_sse insn_sse2 insn_sse3
=20
EXTRA_DIST =3D $(noinst_SCRIPTS) \
badseg.stderr.exp badseg.stdout.exp badseg.vgtest \
@@ -62,6 +63,8 @@
insn_sse_LDADD =3D -lm
insn_sse2_SOURCES =3D insn_sse2.def
insn_sse2_LDADD =3D -lm
+insn_sse3_SOURCES =3D insn_sse3.def
+insn_sse3_LDADD =3D -lm
yield_CFLAGS =3D $(AM_CFLAGS) -D__$(VG_ARCH)__
yield_LDADD =3D -lpthread
=20
Added: trunk/none/tests/x86/insn_sse3.def
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/none/tests/x86/insn_sse3.def (rev 0)
+++ trunk/none/tests/x86/insn_sse3.def 2006-08-05 12:22:52 UTC (rev 5997)
@@ -0,0 +1,43 @@
+addsubpd m128.pd[1.11,2.22] xmm.pd[41.1,42.2] =3D> 1.pd[39.99,44.42]
+addsubpd xmm.pd[1.11,2.22] xmm.pd[41.1,42.2] =3D> 1.pd[39.99,44.42]
+addsubps m128.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] =3D> 1=
.ps[39.99,44.42,39.97,48.84]
+addsubps xmm.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] =3D> 1.=
ps[39.99,44.42,39.97,48.84]
+haddpd m128.pd[1.11,2.22] xmm.pd[41.1,42.2] =3D> 1.pd[83.3,3.33]
+haddpd xmm.pd[1.11,2.22] xmm.pd[41.1,42.2] =3D> 1.pd[83.3,3.33]
+haddps m128.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] =3D> 1.p=
s[83.30,87.70,3.33,7.77]
+haddps xmm.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] =3D> 1.ps=
[83.30,87.70,3.33,7.77]
+hsubpd m128.pd[9.11,2.22] xmm.pd[41.1,42.2] =3D> 1.pd[-1.1,6.89]
+hsubpd xmm.pd[9.11,2.22] xmm.pd[41.1,42.2] =3D> 1.pd[-1.1,6.89]
+hsubps m128.ps[1.11,22.2,3.83,54.4] xmm.ps[41.1,43.2,434.3,144.4] =3D> 1=
.ps[-2.1,289.9,-21.09,-50.57]
+hsubps xmm.ps[1.11,22.2,3.83,54.4] xmm.ps[41.1,43.2,434.3,144.4] =3D> 1.=
ps[-2.1,289.9,-21.09,-50.57]
+lddqu m128.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888] =3D=
> 1.ud[11111,22222,33333,44444]
+movddup m64.ud[11111,22222] xmm.ud[55555,66666,77777,88888] =3D> 1.ud[11=
111,22222,11111,22222]
+movddup xmm.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888] =
=3D> 1.ud[11111,22222,11111,22222]
+movshdup m128.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888=
] =3D> 1.ud[22222,22222,44444,44444]
+movshdup xmm.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888]=
=3D> 1.ud[22222,22222,44444,44444]
+movsldup m128.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888=
] =3D> 1.ud[11111,11111,33333,33333]
+movsldup xmm.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888]=
=3D> 1.ud[11111,11111,33333,33333]
+fisttps fpucw[0xc00,0x000] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[=
0] =3D> 0.sw[1234] st0.ps[1111.1111]
+fisttps fpucw[0xc00,0x000] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw=
[0] =3D> 0.sw[-1234] st0.ps[1111.1111]
+fisttps fpucw[0xc00,0x400] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[=
0] =3D> 0.sw[1234] st0.ps[1111.1111]
+fisttps fpucw[0xc00,0x400] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw=
[0] =3D> 0.sw[-1234] st0.ps[1111.1111]
+fisttps fpucw[0xc00,0x800] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[=
0] =3D> 0.sw[1234] st0.ps[1111.1111]
+fisttps fpucw[0xc00,0x800] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw=
[0] =3D> 0.sw[-1234] st0.ps[1111.1111]
+fisttps fpucw[0xc00,0xc00] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[=
0] =3D> 0.sw[1234] st0.ps[1111.1111]
+fisttps fpucw[0xc00,0xc00] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw=
[0] =3D> 0.sw[-1234] st0.ps[1111.1111]
+fisttpl fpucw[0xc00,0x000] st0.pd[1234567.7654321] st1.ps[1111.1111] : m=
32.sd[0] =3D> 0.sd[1234567] st0.ps[1111.1111]
+fisttpl fpucw[0xc00,0x000] st0.pd[-1234567.7654321] st1.ps[1111.1111] : =
m32.sd[0] =3D> 0.sd[-1234567] st0.ps[1111.1111]
+fisttpl fpucw[0xc00,0x400] st0.pd[1234567.7654321] st1.ps[1111.1111] : m=
32.sd[0] =3D> 0.sd[1234567] st0.ps[1111.1111]
+fisttpl fpucw[0xc00,0x400] st0.pd[-1234567.7654321] st1.ps[1111.1111] : =
m32.sd[0] =3D> 0.sd[-1234567] st0.ps[1111.1111]
+fisttpl fpucw[0xc00,0x800] st0.pd[1234567.7654321] st1.ps[1111.1111] : m=
32.sd[0] =3D> 0.sd[1234567] st0.ps[1111.1111]
+fisttpl fpucw[0xc00,0x800] st0.pd[-1234567.7654321] st1.ps[1111.1111] : =
m32.sd[0] =3D> 0.sd[-1234567] st0.ps[1111.1111]
+fisttpl fpucw[0xc00,0xc00] st0.pd[1234567.7654321] st1.ps[1111.1111] : m=
32.sd[0] =3D> 0.sd[1234567] st0.ps[1111.1111]
+fisttpl fpucw[0xc00,0xc00] st0.pd[-1234567.7654321] st1.ps[1111.1111] : =
m32.sd[0] =3D> 0.sd[-1234567] st0.ps[1111.1111]
+fisttpq fpucw[0xc00,0x000] st0.pd[123456787654321.6] st1.ps[1111.1111] :=
m64.sq[0] =3D> 0.sq[123456787654321] st0.ps[1111.1111]
+fisttpq fpucw[0xc00,0x000] st0.pd[-123456787654321.6] st1.ps[1111.1111] =
: m64.sq[0] =3D> 0.sq[-123456787654321] st0.ps[1111.1111]
+fisttpq fpucw[0xc00,0x400] st0.pd[123456787654321.6] st1.ps[1111.1111] :=
m64.sq[0] =3D> 0.sq[123456787654321] st0.ps[1111.1111]
+fisttpq fpucw[0xc00,0x400] st0.pd[-123456787654321.6] st1.ps[1111.1111] =
: m64.sq[0] =3D> 0.sq[-123456787654321] st0.ps[1111.1111]
+fisttpq fpucw[0xc00,0x800] st0.pd[123456787654321.6] st1.ps[1111.1111] :=
m64.sq[0] =3D> 0.sq[123456787654321] st0.ps[1111.1111]
+fisttpq fpucw[0xc00,0x800] st0.pd[-123456787654321.6] st1.ps[1111.1111] =
: m64.sq[0] =3D> 0.sq[-123456787654321] st0.ps[1111.1111]
+fisttpq fpucw[0xc00,0xc00] st0.pd[123456787654321.6] st1.ps[1111.1111] :=
m64.sq[0] =3D> 0.sq[123456787654321] st0.ps[1111.1111]
+fisttpq fpucw[0xc00,0xc00] st0.pd[-123456787654321.6] st1.ps[1111.1111] =
: m64.sq[0] =3D> 0.sq[-123456787654321] st0.ps[1111.1111]
Added: trunk/none/tests/x86/insn_sse3.stderr.exp
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
Added: trunk/none/tests/x86/insn_sse3.stdout.exp
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/none/tests/x86/insn_sse3.stdout.exp (re=
v 0)
+++ trunk/none/tests/x86/insn_sse3.stdout.exp 2006-08-05 12:22:52 UTC (re=
v 5997)
@@ -0,0 +1,43 @@
+addsubpd_1 ... ok
+addsubpd_2 ... ok
+addsubps_1 ... ok
+addsubps_2 ... ok
+haddpd_1 ... ok
+haddpd_2 ... ok
+haddps_1 ... ok
+haddps_2 ... ok
+hsubpd_1 ... ok
+hsubpd_2 ... ok
+hsubps_1 ... ok
+hsubps_2 ... ok
+lddqu_1 ... ok
+movddup_1 ... ok
+movddup_2 ... ok
+movshdup_1 ... ok
+movshdup_2 ... ok
+movsldup_1 ... ok
+movsldup_2 ... ok
+fisttps_1 ... ok
+fisttps_2 ... ok
+fisttps_3 ... ok
+fisttps_4 ... ok
+fisttps_5 ... ok
+fisttps_6 ... ok
+fisttps_7 ... ok
+fisttps_8 ... ok
+fisttpl_1 ... ok
+fisttpl_2 ... ok
+fisttpl_3 ... ok
+fisttpl_4 ... ok
+fisttpl_5 ... ok
+fisttpl_6 ... ok
+fisttpl_7 ... ok
+fisttpl_8 ... ok
+fisttpq_1 ... ok
+fisttpq_2 ... ok
+fisttpq_3 ... ok
+fisttpq_4 ... ok
+fisttpq_5 ... ok
+fisttpq_6 ... ok
+fisttpq_7 ... ok
+fisttpq_8 ... ok
Added: trunk/none/tests/x86/insn_sse3.vgtest
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/none/tests/x86/insn_sse3.vgtest (rev 0)
+++ trunk/none/tests/x86/insn_sse3.vgtest 2006-08-05 12:22:52 UTC (rev 59=
97)
@@ -0,0 +1,3 @@
+prog: ../../../none/tests/x86/insn_sse3
+prereq: ../../../tests/cputest x86-sse3
+vgopts: -q
Modified: trunk/tests/cputest.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/tests/cputest.c 2006-08-04 12:42:06 UTC (rev 5996)
+++ trunk/tests/cputest.c 2006-08-05 12:22:52 UTC (rev 5997)
@@ -1,6 +1,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
+#include <assert.h>
=20
// We return:
// - 0 if the machine matches the asked-for cpu
@@ -56,42 +57,52 @@
=20
static Bool go(char* cpu)
{=20
- unsigned int level =3D 0, mask =3D 0, a, b, c, d;
+ unsigned int level =3D 0, cmask =3D 0, dmask =3D 0, a, b, c, d;
=20
if ( strcmp( cpu, "x86" ) =3D=3D 0 ) {
return True;
} else if ( strcmp( cpu, "x86-fpu" ) =3D=3D 0 ) {
level =3D 1;
- mask =3D 1 << 0;
+ dmask =3D 1 << 0;
} else if ( strcmp( cpu, "x86-cmov" ) =3D=3D 0 ) {
level =3D 1;
- mask =3D 1 << 15;
+ dmask =3D 1 << 15;
} else if ( strcmp( cpu, "x86-mmx" ) =3D=3D 0 ) {
level =3D 1;
- mask =3D 1 << 23;
+ dmask =3D 1 << 23;
} else if ( strcmp( cpu, "x86-mmxext" ) =3D=3D 0 ) {
level =3D 0x80000001;
- mask =3D 1 << 22;
+ dmask =3D 1 << 22;
} else if ( strcmp( cpu, "x86-sse" ) =3D=3D 0 ) {
level =3D 1;
- mask =3D 1 << 25;
+ dmask =3D 1 << 25;
} else if ( strcmp( cpu, "x86-sse2" ) =3D=3D 0 ) {
level =3D 1;
- mask =3D 1 << 26;
+ dmask =3D 1 << 26;
+ } else if ( strcmp( cpu, "x86-sse3" ) =3D=3D 0 ) {
+ level =3D 1;
+ cmask =3D 1 << 0;
#if defined(__x86_64__)
} else if ( strcmp( cpu, "amd64" ) =3D=3D 0 ) {
return True;
+ } else if ( strcmp( cpu, "amd64-sse3" ) =3D=3D 0 ) {
+ level =3D 1;
+ cmask =3D 1 << 0;
#endif
} else {
return False;
}
=20
+ assert( !(cmask !=3D 0 && dmask !=3D 0) );
+ assert( !(cmask =3D=3D 0 && dmask =3D=3D 0) );
+
cpuid( level & 0x80000000, &a, &b, &c, &d );
=20
if ( a >=3D level ) {
cpuid( level, &a, &b, &c, &d );
=20
- if ( ( d & mask ) !=3D 0 ) return True;
+ if (dmask > 0 && (d & dmask) !=3D 0) return True;
+ if (cmask > 0 && (c & cmask) !=3D 0) return True;
}
return False;
}
|