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From: <sv...@va...> - 2006-05-21 12:02:50
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Author: sewardj Date: 2006-05-21 13:02:44 +0100 (Sun, 21 May 2006) New Revision: 1621 Log: Got a sudden attach of the implicit-type-casting paranoias whilst looking for (non-) bug in running Python. Modified: trunk/priv/guest-amd64/gdefs.h Modified: trunk/priv/guest-amd64/gdefs.h =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/priv/guest-amd64/gdefs.h 2006-05-21 01:02:31 UTC (rev 1620) +++ trunk/priv/guest-amd64/gdefs.h 2006-05-21 12:02:44 UTC (rev 1621) @@ -180,12 +180,12 @@ #define AMD64G_CC_SHIFT_C 0 #define AMD64G_CC_SHIFT_P 2 =20 -#define AMD64G_CC_MASK_O (1 << AMD64G_CC_SHIFT_O) -#define AMD64G_CC_MASK_S (1 << AMD64G_CC_SHIFT_S) -#define AMD64G_CC_MASK_Z (1 << AMD64G_CC_SHIFT_Z) -#define AMD64G_CC_MASK_A (1 << AMD64G_CC_SHIFT_A) -#define AMD64G_CC_MASK_C (1 << AMD64G_CC_SHIFT_C) -#define AMD64G_CC_MASK_P (1 << AMD64G_CC_SHIFT_P) +#define AMD64G_CC_MASK_O (1ULL << AMD64G_CC_SHIFT_O) +#define AMD64G_CC_MASK_S (1ULL << AMD64G_CC_SHIFT_S) +#define AMD64G_CC_MASK_Z (1ULL << AMD64G_CC_SHIFT_Z) +#define AMD64G_CC_MASK_A (1ULL << AMD64G_CC_SHIFT_A) +#define AMD64G_CC_MASK_C (1ULL << AMD64G_CC_SHIFT_C) +#define AMD64G_CC_MASK_P (1ULL << AMD64G_CC_SHIFT_P) =20 /* FPU flag masks */ #define AMD64G_FC_SHIFT_C3 14 @@ -193,10 +193,10 @@ #define AMD64G_FC_SHIFT_C1 9 #define AMD64G_FC_SHIFT_C0 8 =20 -#define AMD64G_FC_MASK_C3 (1 << AMD64G_FC_SHIFT_C3) -#define AMD64G_FC_MASK_C2 (1 << AMD64G_FC_SHIFT_C2) -#define AMD64G_FC_MASK_C1 (1 << AMD64G_FC_SHIFT_C1) -#define AMD64G_FC_MASK_C0 (1 << AMD64G_FC_SHIFT_C0) +#define AMD64G_FC_MASK_C3 (1ULL << AMD64G_FC_SHIFT_C3) +#define AMD64G_FC_MASK_C2 (1ULL << AMD64G_FC_SHIFT_C2) +#define AMD64G_FC_MASK_C1 (1ULL << AMD64G_FC_SHIFT_C1) +#define AMD64G_FC_MASK_C0 (1ULL << AMD64G_FC_SHIFT_C0) =20 =20 /* %RFLAGS thunk descriptors. A four-word thunk is used to record |