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From: <sv...@va...> - 2006-02-24 00:14:33
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Author: sewardj
Date: 2006-02-24 00:14:29 +0000 (Fri, 24 Feb 2006)
New Revision: 1578
Log:
Partially merge r1519 (only allocate from callee-save FP and VMX regs).
Modified:
branches/VEX_3_1_BRANCH/priv/host-ppc32/hdefs.c
Modified: branches/VEX_3_1_BRANCH/priv/host-ppc32/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_1_BRANCH/priv/host-ppc32/hdefs.c 2006-02-23 23:47:56 U=
TC (rev 1577)
+++ branches/VEX_3_1_BRANCH/priv/host-ppc32/hdefs.c 2006-02-24 00:14:29 U=
TC (rev 1578)
@@ -227,14 +227,16 @@
// GPR30 AltiVec spill reg temporary
// GPR31 =3D GuestStatePtr
=20
- (*arr)[i++] =3D hregPPC32_FPR0();
- (*arr)[i++] =3D hregPPC32_FPR1();
- (*arr)[i++] =3D hregPPC32_FPR2();
- (*arr)[i++] =3D hregPPC32_FPR3();
- (*arr)[i++] =3D hregPPC32_FPR4();
- (*arr)[i++] =3D hregPPC32_FPR5();
- (*arr)[i++] =3D hregPPC32_FPR6();
- (*arr)[i++] =3D hregPPC32_FPR7();
+ /* For both ppc32-linux and ppc64-linux, f14-f31 are callee save.
+ So use them. */
+ (*arr)[i++] =3D hregPPC32_FPR14();
+ (*arr)[i++] =3D hregPPC32_FPR15();
+ (*arr)[i++] =3D hregPPC32_FPR16();
+ (*arr)[i++] =3D hregPPC32_FPR17();
+ (*arr)[i++] =3D hregPPC32_FPR18();
+ (*arr)[i++] =3D hregPPC32_FPR19();
+ (*arr)[i++] =3D hregPPC32_FPR20();
+ (*arr)[i++] =3D hregPPC32_FPR21();
/*
(*arr)[i++] =3D hregPPC32_FPR8();
(*arr)[i++] =3D hregPPC32_FPR9();
@@ -261,14 +263,16 @@
(*arr)[i++] =3D hregPPC32_FPR30();
(*arr)[i++] =3D hregPPC32_FPR31();
*/
- (*arr)[i++] =3D hregPPC32_VR0();
- (*arr)[i++] =3D hregPPC32_VR1();
- (*arr)[i++] =3D hregPPC32_VR2();
- (*arr)[i++] =3D hregPPC32_VR3();
- (*arr)[i++] =3D hregPPC32_VR4();
- (*arr)[i++] =3D hregPPC32_VR5();
- (*arr)[i++] =3D hregPPC32_VR6();
- (*arr)[i++] =3D hregPPC32_VR7();
+ /* For both ppc32-linux and ppc64-linux, v20-v31 are callee-save.
+ So use them. */
+ (*arr)[i++] =3D hregPPC32_VR20();
+ (*arr)[i++] =3D hregPPC32_VR21();
+ (*arr)[i++] =3D hregPPC32_VR22();
+ (*arr)[i++] =3D hregPPC32_VR23();
+ (*arr)[i++] =3D hregPPC32_VR24();
+ (*arr)[i++] =3D hregPPC32_VR25();
+ (*arr)[i++] =3D hregPPC32_VR26();
+ (*arr)[i++] =3D hregPPC32_VR27();
/*
(*arr)[i++] =3D hregPPC32_VR8();
(*arr)[i++] =3D hregPPC32_VR9();
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