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From: <sv...@va...> - 2006-01-28 17:07:27
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Author: sewardj
Date: 2006-01-28 17:07:19 +0000 (Sat, 28 Jan 2006)
New Revision: 1558
Log:
Make lsw work in 64-bit mode.
Modified:
trunk/priv/guest-ppc/toIR.c
Modified: trunk/priv/guest-ppc/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc/toIR.c 2006-01-27 22:05:55 UTC (rev 1557)
+++ trunk/priv/guest-ppc/toIR.c 2006-01-28 17:07:19 UTC (rev 1558)
@@ -3955,16 +3955,26 @@
}
/* rD |=3D (8Uto32(*(EA+i))) << shift */
vassert(shift =3D=3D 0 || shift =3D=3D 8 || shift =3D=3D 16 || shi=
ft =3D=3D 24);
- putIReg( rD,=20
- mkSzWiden32(ty,=20
- binop(Iop_Or32,=20
- mkSzNarrow32(ty, getIReg(rD)),
- binop(Iop_Shl32,=20
- unop(Iop_8Uto32,=20
- loadBE(Ity_I8,=20
- binop(Iop_Add32, e_EA, mkU32(i)))),=20
- mkU8(toUChar(shift)))),
- /*Signed*/False) );=20
+ putIReg(=20
+ rD,=20
+ mkSzWiden32(
+ ty,=20
+ binop(
+ Iop_Or32,=20
+ mkSzNarrow32(ty, getIReg(rD)),
+ binop(
+ Iop_Shl32,=20
+ unop(
+ Iop_8Uto32,=20
+ loadBE(Ity_I8,=20
+ binop(mkSzOp(ty,Iop_Add8), e_EA, mkSzImm(ty,=
i)))
+ ),=20
+ mkU8(toUChar(shift))
+ )
+ ),
+ /*Signed*/False
+ )=20
+ );=20
shift -=3D 8;
}
}
@@ -4035,7 +4045,7 @@
registers to be loaded. It should. */
DIP("lswi r%u,r%u,%d\n", rD_addr, rA_addr, NumBytes);
assign( t_EA, ea_rAor0(rA_addr) );
- if (!mode64 && NumBytes =3D=3D 8) {
+ if (NumBytes =3D=3D 8 && !mode64) {
/* Special case hack */
/* rD =3D Mem[EA]; (rD+1)%32 =3D Mem[EA+4] */
putIReg( rD_addr, =20
@@ -4071,7 +4081,7 @@
case 0x2D5: // stswi (Store String Word Immediate, PPC32 p528)
DIP("stswi r%u,r%u,%d\n", rS_addr, rA_addr, NumBytes);
assign( t_EA, ea_rAor0(rA_addr) );
- if (NumBytes =3D=3D 8) {
+ if (NumBytes =3D=3D 8 && !mode64) {
/* Special case hack */
/* Mem[EA] =3D rD; Mem[EA+4] =3D (rD+1)%32 */
storeBE( mkexpr(t_EA),=20
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