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From: <sv...@va...> - 2006-01-27 16:05:56
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Author: sewardj
Date: 2006-01-27 16:05:49 +0000 (Fri, 27 Jan 2006)
New Revision: 1554
Log:
Re-enable stfiwx.
Modified:
trunk/priv/guest-ppc/toIR.c
Modified: trunk/priv/guest-ppc/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc/toIR.c 2006-01-27 15:09:35 UTC (rev 1553)
+++ trunk/priv/guest-ppc/toIR.c 2006-01-27 16:05:49 UTC (rev 1554)
@@ -90,7 +90,7 @@
=20
/* "Special" instructions.
=20
- This instruction decoder can decode three special instructions
+ This instruction decoder can decode four special instructions
which mean nothing natively (are no-ops as far as regs/mem are
concerned) but have meaning for supporting Valgrind. A special
instruction is flagged by a 16-byte preamble:
@@ -5609,12 +5609,12 @@
putIReg( rA_addr, mkexpr(EA) );
break;
=20
-//zz case 0x3D7: // stfiwx (Store Float as Int, Indexed, PPC32 p517)
-//zz DIP("stfiwx fr%u,r%u,r%u\n", frS_addr, rA_addr, rB_addr);
-//zz assign( EA, ea_rAor0_idxd(rA_addr, rB_addr) );
-//zz storeBE( mkexpr(EA),
-//zz unop(Iop_64to32, unop(Iop_ReinterpF64asI64, mkexpr(fr=
S))) );
-//zz break;
+ case 0x3D7: // stfiwx (Store Float as Int, Indexed, PPC32 p517)
+ DIP("stfiwx fr%u,r%u,r%u\n", frS_addr, rA_addr, rB_addr);
+ assign( EA, ea_rAor0_idxd(rA_addr, rB_addr) );
+ storeBE( mkexpr(EA),
+ unop(Iop_64to32, unop(Iop_ReinterpF64asI64, mkexpr(frS=
))) );
+ break;
=20
default:
vex_printf("dis_fp_store(ppc)(opc2)\n");
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