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From: <sv...@va...> - 2006-01-27 15:09:49
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Author: sewardj
Date: 2006-01-27 15:09:35 +0000 (Fri, 27 Jan 2006)
New Revision: 1553
Log:
Handle ppc32/64 fres, frsqrte.
Modified:
trunk/priv/guest-ppc/toIR.c
trunk/priv/host-ppc/hdefs.c
trunk/priv/host-ppc/hdefs.h
trunk/priv/host-ppc/isel.c
trunk/priv/ir/irdefs.c
trunk/pub/libvex_ir.h
Modified: trunk/priv/guest-ppc/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc/toIR.c 2006-01-26 03:02:26 UTC (rev 1552)
+++ trunk/priv/guest-ppc/toIR.c 2006-01-27 15:09:35 UTC (rev 1553)
@@ -5701,16 +5701,15 @@
assign( frD, roundToSgl( unop(Iop_SqrtF64, mkexpr(frB)) ));
break;
=20
-//zz case 0x18: // fres (Floating Reciprocal Estimate Single, PPC3=
2 p421)
-//zz if (frA_addr !=3D 0 || frC_addr !=3D 0) {
-//zz vex_printf("dis_fp_arith(ppc)(instr,fres)\n");
-//zz return False;
-//zz }
-//zz DIP("fres%s fr%u,fr%u\n", flag_rC ? ".":"",
-//zz frD_addr, frB_addr);
-//zz DIP(" =3D> not implemented\n"); =20
-//zz // CAB: Can we use one of the 128 bit SIMD Iop_Recip32F op=
s?
-//zz return False;
+ case 0x18: // fres (Floating Reciprocal Estimate Single, PPC32 p42=
1)
+ if (frA_addr !=3D 0 || frC_addr !=3D 0) {
+ vex_printf("dis_fp_arith(ppc)(instr,fres)\n");
+ return False;
+ }
+ DIP("fres%s fr%u,fr%u\n", flag_rC ? ".":"",
+ frD_addr, frB_addr);
+ assign( frD, unop(Iop_Est8FRecip, mkexpr(frB)) );
+ break;
=20
case 0x19: // fmuls (Floating Multiply Single, PPC32 p414)
if (frB_addr !=3D 0) {
@@ -5805,16 +5804,15 @@
assign( frD, binop( Iop_MulF64, mkexpr(frA), mkexpr(frC) ) );
break;
=20
-//zz case 0x1A: // frsqrte (Floating Recip SqRt Est., PPC32 p424)
-//zz if (frA_addr !=3D 0 || frC_addr !=3D 0) {
-//zz vex_printf("dis_fp_arith(ppc)(instr,frsqrte)\n");
-//zz return False;
-//zz }
-//zz DIP("frsqrte%s fr%u,fr%u\n", flag_rC ? ".":"",
-//zz frD_addr, frB_addr);
-//zz DIP(" =3D> not implemented\n");
-//zz // CAB: Iop_SqrtF64, then one of the 128 bit SIMD Iop_Reci=
p32F ops?
-//zz return False;
+ case 0x1A: // frsqrte (Floating Recip SqRt Est., PPC32 p424)
+ if (frA_addr !=3D 0 || frC_addr !=3D 0) {
+ vex_printf("dis_fp_arith(ppc)(instr,frsqrte)\n");
+ return False;
+ }
+ DIP("frsqrte%s fr%u,fr%u\n", flag_rC ? ".":"",
+ frD_addr, frB_addr);
+ assign( frD, unop(Iop_Est5FRSqrt, mkexpr(frB)) );
+ break;
=20
default:
vex_printf("dis_fp_arith(ppc)(3F: opc2)\n");
Modified: trunk/priv/host-ppc/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc/hdefs.c 2006-01-26 03:02:26 UTC (rev 1552)
+++ trunk/priv/host-ppc/hdefs.c 2006-01-27 15:09:35 UTC (rev 1553)
@@ -620,6 +620,8 @@
case Pfp_ABS: return "fabs";
case Pfp_NEG: return "fneg";
case Pfp_MOV: return "fmr";
+ case Pfp_RES: return "fres";
+ case Pfp_RSQRTE: return "frsqrte";
default: vpanic("showPPCFpOp");
}
}
@@ -3124,6 +3126,12 @@
UInt fr_dst =3D fregNo(i->Pin.FpUnary.dst);
UInt fr_src =3D fregNo(i->Pin.FpUnary.src);
switch (i->Pin.FpUnary.op) {
+ case Pfp_RSQRTE: // frsqrtre, PPC32 p424
+ p =3D mkFormA( p, 63, fr_dst, 0, fr_src, 0, 26, 0 );
+ break;
+ case Pfp_RES: // fres, PPC32 p421
+ p =3D mkFormA( p, 59, fr_dst, 0, fr_src, 0, 24, 0 );
+ break;
case Pfp_SQRT: // fsqrt, PPC32 p427
p =3D mkFormA( p, 63, fr_dst, 0, fr_src, 0, 22, 0 );
break;
Modified: trunk/priv/host-ppc/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc/hdefs.h 2006-01-26 03:02:26 UTC (rev 1552)
+++ trunk/priv/host-ppc/hdefs.h 2006-01-27 15:09:35 UTC (rev 1553)
@@ -371,7 +371,7 @@
Pfp_ADD, Pfp_SUB, Pfp_MUL, Pfp_DIV,=20
=20
/* Unary */
- Pfp_SQRT, Pfp_ABS, Pfp_NEG, Pfp_MOV
+ Pfp_SQRT, Pfp_ABS, Pfp_NEG, Pfp_MOV, Pfp_RES, Pfp_RSQRTE
}
PPCFpOp;
=20
Modified: trunk/priv/host-ppc/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc/isel.c 2006-01-26 03:02:26 UTC (rev 1552)
+++ trunk/priv/host-ppc/isel.c 2006-01-27 15:09:35 UTC (rev 1553)
@@ -2876,9 +2876,11 @@
if (e->tag =3D=3D Iex_Unop) {
PPCFpOp fpop =3D Pfp_INVALID;
switch (e->Iex.Unop.op) {
- case Iop_NegF64: fpop =3D Pfp_NEG; break;
- case Iop_AbsF64: fpop =3D Pfp_ABS; break;
- case Iop_SqrtF64: fpop =3D Pfp_SQRT; break;
+ case Iop_NegF64: fpop =3D Pfp_NEG; break;
+ case Iop_AbsF64: fpop =3D Pfp_ABS; break;
+ case Iop_SqrtF64: fpop =3D Pfp_SQRT; break;
+ case Iop_Est8FRecip: fpop =3D Pfp_RES; break;
+ case Iop_Est5FRSqrt: fpop =3D Pfp_RSQRTE; break;
default: break;
}
if (fpop !=3D Pfp_INVALID) {
Modified: trunk/priv/ir/irdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/ir/irdefs.c 2006-01-26 03:02:26 UTC (rev 1552)
+++ trunk/priv/ir/irdefs.c 2006-01-27 15:09:35 UTC (rev 1553)
@@ -263,6 +263,9 @@
case Iop_TanF64: vex_printf("TanF64"); return;
case Iop_2xm1F64: vex_printf("2xm1F64"); return;
=20
+ case Iop_Est8FRecip: vex_printf("Est8FRecip"); return;
+ case Iop_Est5FRSqrt: vex_printf("Est5FRSqrt"); return;
+
case Iop_CmpF64: vex_printf("CmpF64"); return;
=20
case Iop_F64toI16: vex_printf("F64toI16"); return;
@@ -1517,6 +1520,7 @@
BINARY(Ity_I32,Ity_F64,Ity_F64);
case Iop_NegF64: case Iop_AbsF64: case Iop_SqrtF64:
case Iop_SinF64: case Iop_CosF64: case Iop_TanF64: case Iop_2xm1F6=
4:
+ case Iop_Est8FRecip: case Iop_Est5FRSqrt:
UNARY(Ity_F64,Ity_F64);
=20
case Iop_ReinterpI64asF64: UNARY(Ity_F64, Ity_I64);
Modified: trunk/pub/libvex_ir.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/pub/libvex_ir.h 2006-01-26 03:02:26 UTC (rev 1552)
+++ trunk/pub/libvex_ir.h 2006-01-27 15:09:35 UTC (rev 1553)
@@ -331,7 +331,7 @@
Iop_1Sto32, /* :: Ity_Bit -> Ity_I32, signed widen */
Iop_1Sto64, /* :: Ity_Bit -> Ity_I64, signed widen */
=20
- /* ------ Floating point. We try and be IEEE754 compliant. ------=
*/
+ /* ------ Floating point. We try to be IEEE754 compliant. ------ =
*/
=20
/* Binary operations mandated by IEEE754. */
Iop_AddF64, Iop_SubF64, Iop_MulF64, Iop_DivF64, /* Iop_RemF64, */
@@ -359,6 +359,10 @@
Iop_TanF64, /* FTAN */
Iop_2xm1F64, /* (2^arg - 1.0) */
=20
+ /* Unary ops supported by PPC but not mandated by 754. */
+ Iop_Est8FRecip, /* reciprocal estimate, 8 good bits */
+ Iop_Est5FRSqrt, /* reciprocal square root estimate, 5 good bits */
+
/* Comparison, yielding GT/LT/EQ/UN(ordered), as per the following=
:
0x45 Unordered
0x01 LT
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