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From: <sv...@va...> - 2006-01-02 12:28:24
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Author: cerion
Date: 2006-01-02 12:28:17 +0000 (Mon, 02 Jan 2006)
New Revision: 1524
Log:
ppc64: handle 32HLto64, 64HLtoV128
Modified:
trunk/priv/host-ppc/isel.c
Modified: trunk/priv/host-ppc/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc/isel.c 2006-01-02 00:35:24 UTC (rev 1523)
+++ trunk/priv/host-ppc/isel.c 2006-01-02 12:28:17 UTC (rev 1524)
@@ -1251,6 +1251,19 @@
//zz return hi16;
//zz }
=20
+ if (e->Iex.Binop.op =3D=3D Iop_32HLto64) {
+ HReg r_dst =3D newVRegI(env);
+ HReg r_Hi =3D iselIntExpr_R(env, e->Iex.Binop.arg1);
+ HReg r_Lo =3D iselIntExpr_R(env, e->Iex.Binop.arg2);
+ vassert(mode64);
+ /* r_dst =3D OR( r_Hi<<32, r_Lo ) */
+ addInstr(env, PPCInstr_Shft(Pshft_SHL, False/*64bit shift*/,
+ r_dst, r_Hi, PPCRH_Imm(False,32)));
+ addInstr(env, PPCInstr_Alu( Palu_OR, r_dst, r_dst,
+ PPCRH_Reg(r_Lo) ));
+ return r_dst;
+ }
+
//.. if (e->Iex.Binop.op =3D=3D Iop_MullS16 || e->Iex.Binop.op =3D=
=3D Iop_MullS8
//.. || e->Iex.Binop.op =3D=3D Iop_MullU16 || e->Iex.Binop.op =
=3D=3D Iop_MullU8) {
//.. HReg a16 =3D newVRegI32(env);
@@ -1645,9 +1658,9 @@
=20
case Iop_V128to64:
case Iop_V128HIto64: {
- HReg r_aligned16;
- HReg dst =3D newVRegI(env);
- HReg vec =3D iselVecExpr(env, e->Iex.Unop.arg);
+ HReg r_aligned16;
+ HReg dst =3D newVRegI(env);
+ HReg vec =3D iselVecExpr(env, e->Iex.Unop.arg);
PPCAMode *am_off0, *am_off8;
vassert(mode64);
sub_from_sp( env, 32 ); // Move SP down 32 bytes
@@ -3804,9 +3817,9 @@
//..=20
case Iop_64HLtoV128: {
if (!mode64) {
- HReg r3, r2, r1, r0, r_aligned16;
+ HReg r3, r2, r1, r0, r_aligned16;
PPCAMode *am_off0, *am_off4, *am_off8, *am_off12;
- HReg dst =3D newVRegV(env);
+ HReg dst =3D newVRegV(env);
/* do this via the stack (easy, convenient, etc) */
sub_from_sp( env, 32 ); // Move SP down
=20
@@ -3832,8 +3845,28 @@
add_to_sp( env, 32 ); // Reset SP
return dst;
} else {
- // TODO
- vassert(0);
+ HReg rHi =3D iselIntExpr_R(env, e->Iex.Binop.arg1);
+ HReg rLo =3D iselIntExpr_R(env, e->Iex.Binop.arg2);
+ HReg dst =3D newVRegV(env);
+ HReg r_aligned16;
+ PPCAMode *am_off0, *am_off8;
+ /* do this via the stack (easy, convenient, etc) */
+ sub_from_sp( env, 32 ); // Move SP down
+ =20
+ // get a quadword aligned address within our stack space
+ r_aligned16 =3D get_sp_aligned16( env );
+ am_off0 =3D PPCAMode_IR( 0, r_aligned16 );
+ am_off8 =3D PPCAMode_IR( 8, r_aligned16 );
+ =20
+ /* Store 2*I64 to stack */
+ addInstr(env, PPCInstr_Store( 8, am_off0, rHi, mode64 ));
+ addInstr(env, PPCInstr_Store( 8, am_off8, rLo, mode64 ));
+
+ /* Fetch result back from stack. */
+ addInstr(env, PPCInstr_AvLdSt(True/*ld*/, 16, dst, am_off0))=
;
+ =20
+ add_to_sp( env, 32 ); // Reset SP
+ return dst;
}
}
=20
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