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From: <sv...@va...> - 2006-01-02 00:35:29
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Author: sewardj
Date: 2006-01-02 00:35:24 +0000 (Mon, 02 Jan 2006)
New Revision: 1523
Log:
ppc64: handle V128to64, V128HIto64.
Modified:
trunk/priv/host-ppc/isel.c
Modified: trunk/priv/host-ppc/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc/isel.c 2006-01-01 17:15:19 UTC (rev 1522)
+++ trunk/priv/host-ppc/isel.c 2006-01-02 00:35:24 UTC (rev 1523)
@@ -1643,6 +1643,32 @@
return dst;
}
=20
+ case Iop_V128to64:
+ case Iop_V128HIto64: {
+ HReg r_aligned16;
+ HReg dst =3D newVRegI(env);
+ HReg vec =3D iselVecExpr(env, e->Iex.Unop.arg);
+ PPCAMode *am_off0, *am_off8;
+ vassert(mode64);
+ sub_from_sp( env, 32 ); // Move SP down 32 bytes
+
+ // get a quadword aligned address within our stack space
+ r_aligned16 =3D get_sp_aligned16( env );
+ am_off0 =3D PPCAMode_IR( 0, r_aligned16 );
+ am_off8 =3D PPCAMode_IR( 8 ,r_aligned16 );
+
+ // store vec, load low word (+8) or high (+0) to dst
+ addInstr(env,
+ PPCInstr_AvLdSt( False/*store*/, 16, vec, am_off0 ));
+ addInstr(env,
+ PPCInstr_Load( 8, False, dst,=20
+ op_unop =3D=3D Iop_V128HIto64 ? am_o=
ff0 : am_off8,=20
+ mode64 ));
+
+ add_to_sp( env, 32 ); // Reset SP
+ return dst;
+ }
+
case Iop_16to8:
case Iop_32to8:
case Iop_32to16:
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