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From: <sv...@va...> - 2005-12-24 13:14:17
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Author: cerion
Date: 2005-12-24 13:14:11 +0000 (Sat, 24 Dec 2005)
New Revision: 1511
Log:
Comment only changes - misc refs to ppc32 changed to ppc.
Modified:
trunk/priv/guest-generic/bb_to_IR.h
trunk/priv/guest-ppc/ghelpers.c
trunk/priv/guest-ppc/toIR.c
trunk/priv/host-ppc/hdefs.c
trunk/pub/libvex_ir.h
Modified: trunk/priv/guest-generic/bb_to_IR.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-generic/bb_to_IR.h 2005-12-24 12:39:47 UTC (rev 1510=
)
+++ trunk/priv/guest-generic/bb_to_IR.h 2005-12-24 13:14:11 UTC (rev 1511=
)
@@ -50,7 +50,7 @@
=20
/* This defines stuff needed by the guest insn disassemblers.
It's a bit circular; is imported by
- - the guest-specific toIR.c files (guest-{x86,amd64,ppc32,arm}/toIR.c=
)
+ - the guest-specific toIR.c files (guest-{x86,amd64,ppc,arm}/toIR.c)
- the generic disassembly driver (bb_to_IR.c)
- vex_main.c
*/
Modified: trunk/priv/guest-ppc/ghelpers.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc/ghelpers.c 2005-12-24 12:39:47 UTC (rev 1510)
+++ trunk/priv/guest-ppc/ghelpers.c 2005-12-24 13:14:11 UTC (rev 1511)
@@ -604,7 +604,7 @@
=20
=20
/*-----------------------------------------------------------*/
-/*--- Describing the ppc32 guest state, for the benefit ---*/
+/*--- Describing the ppc guest state, for the benefit ---*/
/*--- of iropt and instrumenters. ---*/
/*-----------------------------------------------------------*/
=20
@@ -614,7 +614,7 @@
=20
By default we enforce precise exns for guest R1 (stack pointer),
CIA (current insn address) and LR (link register). These are the
- minimum needed to extract correct stack backtraces from ppc32
+ minimum needed to extract correct stack backtraces from ppc
code. [[NB: not sure if keeping LR up to date is actually
necessary.]]
*/
Modified: trunk/priv/guest-ppc/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc/toIR.c 2005-12-24 12:39:47 UTC (rev 1510)
+++ trunk/priv/guest-ppc/toIR.c 2005-12-24 13:14:11 UTC (rev 1511)
@@ -1677,7 +1677,7 @@
/* Incoming oldca is assumed to hold the values 0 or 1 only. This
seems reasonable given that it's always generated by
getXER_CA32(), which masks it accordingly. In any case it being
- 0 or 1 is an invariant of the ppc32 guest state representation;
+ 0 or 1 is an invariant of the ppc guest state representation;
if it has any other value, that invariant has been violated. */
=20
switch (op) {
@@ -1795,7 +1795,7 @@
/* Incoming oldca is assumed to hold the values 0 or 1 only. This
seems reasonable given that it's always generated by
getXER_CA32(), which masks it accordingly. In any case it being
- 0 or 1 is an invariant of the ppc32 guest state representation;
+ 0 or 1 is an invariant of the ppc guest state representation;
if it has any other value, that invariant has been violated. */
=20
switch (op) {
Modified: trunk/priv/host-ppc/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc/hdefs.c 2005-12-24 12:39:47 UTC (rev 1510)
+++ trunk/priv/host-ppc/hdefs.c 2005-12-24 13:14:11 UTC (rev 1511)
@@ -2109,7 +2109,7 @@
}
=20
=20
-/* Generate ppc32 spill/reload instructions under the direction of the
+/* Generate ppc spill/reload instructions under the direction of the
register allocator. Note it's critical these don't write the
condition codes. */
PPCInstr* genSpill_PPC ( HReg rreg, UShort offsetB, Bool mode64 )
@@ -2161,7 +2161,7 @@
}
=20
=20
-/* --------- The ppc32 assembler (bleh.) --------- */
+/* --------- The ppc assembler (bleh.) --------- */
=20
static UInt iregNo ( HReg r, Bool mode64 )
{
@@ -2203,7 +2203,7 @@
return p;
}
=20
-/* The following mkForm[...] functions refer to PPC32 instruction forms
+/* The following mkForm[...] functions refer to ppc instruction forms
as per PPC32 p576
*/
=20
@@ -2530,7 +2530,7 @@
Note that buf is not the insn's final place, and therefore it is
imperative to emit position-independent code.=20
=20
- Note, dispatch should always be NULL since ppc32/ppc64 backends
+ Note, dispatch should always be NULL since ppc32/64 backends
use a call-return scheme to get from the dispatcher to generated
code and back.
*/
Modified: trunk/pub/libvex_ir.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/pub/libvex_ir.h 2005-12-24 12:39:47 UTC (rev 1510)
+++ trunk/pub/libvex_ir.h 2005-12-24 13:14:11 UTC (rev 1511)
@@ -472,7 +472,7 @@
/* binary */
Iop_Add32Fx4, Iop_Sub32Fx4, Iop_Mul32Fx4, Iop_Div32Fx4,=20
Iop_Max32Fx4, Iop_Min32Fx4,
- /* Note: For the following compares, the ppc32 front-end assumes a
+ /* Note: For the following compares, the ppc front-end assumes a
nan in a lane of either argument returns zero for that lane. */
Iop_CmpEQ32Fx4, Iop_CmpLT32Fx4, Iop_CmpLE32Fx4, Iop_CmpUN32Fx4,=20
Iop_CmpGT32Fx4, Iop_CmpGE32Fx4,
@@ -857,7 +857,7 @@
Ijk_TInval, /* Invalidate translations before continuing. =
*/
/* Unfortunately, various guest-dependent syscall kinds. They
all mean: do a syscall before continuing. */
- Ijk_Sys_syscall, /* amd64 'syscall', ppc32 'sc' */
+ Ijk_Sys_syscall, /* amd64 'syscall', ppc 'sc' */
Ijk_Sys_int32, /* amd64/x86 'int $0x20' */
Ijk_Sys_int128, /* amd64/x86 'int $0x80' */
Ijk_Sys_sysenter /* x86 'sysenter'. guest_EIP becomes=20
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