|
From: <sv...@va...> - 2005-11-29 11:08:40
|
Author: cerion
Date: 2005-11-29 11:08:33 +0000 (Tue, 29 Nov 2005)
New Revision: 5247
Log:
Stop gcc4 complaints re ppc32 test - Moved all declarations in front of s=
tatements.
Based on patch from Yao Qi <qiy...@cn...>.
Modified:
trunk/none/tests/ppc32/jm-insns.c
Modified: trunk/none/tests/ppc32/jm-insns.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/none/tests/ppc32/jm-insns.c 2005-11-29 09:59:32 UTC (rev 5246)
+++ trunk/none/tests/ppc32/jm-insns.c 2005-11-29 11:08:33 UTC (rev 5247)
@@ -3894,21 +3894,21 @@
#if defined (HAS_ALTIVEC)
static void build_viargs_table (void)
{
- unsigned int i=3D0;
- =20
#if !defined (ALTIVEC_ARGS_LARGE)
- i=3D2;
+ unsigned int i=3D2;
viargs =3D memalign(16, i * sizeof(vector unsigned int));
viargs[0] =3D (vector unsigned int) { 0x01020304,0x05060708,0x090A0B0=
C,0x0E0D0E0F };
viargs[1] =3D (vector unsigned int) { 0xF1F2F3F4,0xF5F6F7F8,0xF9FAFBF=
C,0xFEFDFEFF };
#else
+ unsigned int i,j;
// build from iargs table (large/default already set)
viargs =3D malloc(nb_iargs * sizeof(vector unsigned int));
for (i=3D0; i<nb_iargs; i++) {
- unsigned int j =3D iargs[i];
+ j =3D iargs[i];
viargs[i] =3D (vector unsigned int){ j, j*2, j*3, j*4 };
}
#endif
+
AB_DPRINTF("Registered %d viargs values\n", i);
nb_viargs =3D i;
}
@@ -4058,10 +4058,12 @@
=20
static void dump_vfargs (void)
{
+ vector float vf;
+ float f;
int i=3D0;
for (i=3D0; i<nb_vfargs; i++) {
- vector float vf =3D (vector float)vfargs[i];
- float f =3D ((float*)&vf)[0];
+ vf =3D (vector float)vfargs[i];
+ f =3D ((float*)&vf)[0];
printf("vfarg %3d: %24f : %08x\n", i, f, ((unsigned int*)&f)[0]);
}
}
@@ -4746,7 +4748,7 @@
__asm__ __volatile__ ("mtxer 18");
=20
printf("%s %d (%08x) =3D> %08x (%08x %08x, %08x, %08x)\n",
- name, 9, iargs[k], res, flags, xer, lr, ctr);
+ name, j, iargs[k], res, flags, xer, lr, ctr);
}
#endif
}
@@ -5627,18 +5629,23 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_in, vec_out, vscr;
+ unsigned int *src, *dst;
int i;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_viargs; i++) {
/* Save flags */
__asm__ __volatile__ ("mfcr %0" : "=3Dr" (tmpcr));
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
- vector unsigned int vec_in =3D (vector unsigned int)viargs[i];
- vector unsigned int vec_out =3D (vector unsigned int){ 0,0,0,0 };
+ vec_in =3D (vector unsigned int)viargs[i];
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_=
VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -5660,14 +5667,14 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src =3D (unsigned int*)&vec_in;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src =3D (unsigned int*)&vec_in;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: %08x %08x %08x %08x\n", name,
src[0], src[1], src[2], src[3]);
printf("%s: =3D> %08x %08x %08x %08x ", name,
dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -5680,20 +5687,25 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_in1, vec_in2, vec_out, vscr;
+ unsigned int *src1, *src2, *dst;
int i,j;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_viargs; i++) {
- volatile vector unsigned int vec_in1 =3D (vector unsigned int)viar=
gs[i];
+ vec_in1 =3D (vector unsigned int)viargs[i];
for (j=3D0; j<nb_viargs; j++) {
- volatile vector unsigned int vec_in2 =3D (vector unsigned int)v=
iargs[j];
- volatile vector unsigned int vec_out =3D (vector unsigned int){=
0,0,0,0 };
+ vec_in2 =3D (vector unsigned int)viargs[j];
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
/* Save flags */
__asm__ __volatile__ ("mfcr %0" : "=3Dr" (tmpcr));
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAU=
LT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -5716,16 +5728,16 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src1 =3D (unsigned int*)&vec_in1;
- unsigned int* src2 =3D (unsigned int*)&vec_in2;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src1 =3D (unsigned int*)&vec_in1;
+ src2 =3D (unsigned int*)&vec_in2;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: ", name);
printf("%08x%08x%08x%08x, ", src1[0], src1[1], src1[2], src1[3]=
);
printf("%08x%08x%08x%08x\n", src2[0], src2[1], src2[2], src2[3]=
);
printf("%s: =3D> %08x %08x %08x %08x ", name,
dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -5740,22 +5752,27 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_in1, vec_in2, vec_in3, vec_out, vscr=
;
+ unsigned int *src1, *src2, *src3, *dst;
int i,j,k;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_viargs; i++) {
- vector unsigned int vec_in1 =3D (vector unsigned int)viargs[i];
+ vec_in1 =3D (vector unsigned int)viargs[i];
for (j=3D0; j<nb_viargs; j++) {
- vector unsigned int vec_in2 =3D (vector unsigned int)viargs[j];
+ vec_in2 =3D (vector unsigned int)viargs[j];
for (k=3D0; k<nb_viargs; k++) {
- vector unsigned int vec_in3 =3D (vector unsigned int)viargs[=
k];
- vector unsigned int vec_out =3D (vector unsigned int){ 0,0,0=
,0 };
+ vec_in3 =3D (vector unsigned int)viargs[k];
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
/* Save flags */
__asm__ __volatile__ ("mfcr %0" : "=3Dr" (tmpcr));
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DE=
FAULT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -5779,10 +5796,10 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src1 =3D (unsigned int*)&vec_in1;
- unsigned int* src2 =3D (unsigned int*)&vec_in2;
- unsigned int* src3 =3D (unsigned int*)&vec_in3;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src1 =3D (unsigned int*)&vec_in1;
+ src2 =3D (unsigned int*)&vec_in2;
+ src3 =3D (unsigned int*)&vec_in3;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: %08x%08x%08x%08x, %08x%08x%08x%08x, %08x%08x%08x=
%08x\n", name,
src1[0], src1[1], src1[2], src1[3],
src2[0], src2[1], src2[2], src2[3],
@@ -5791,7 +5808,7 @@
printf("%s: =3D> %08x%08x%08x%08x ", name,
dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -5808,21 +5825,27 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned char vec_shft;
+ volatile vector unsigned int vec_in1, vec_out, vscr;
+ unsigned int *src1, *src2, *dst;
int i,j;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_viargs; i++) {
- vector unsigned int vec_in1 =3D (vector unsigned int)viargs[i];
+ vec_in1 =3D (vector unsigned int)viargs[i];
for (j=3D0; j<8; j++) {
/* low-order 3bits of every byte must be the same for the shift=
vector */
- vector unsigned char vec_shft =3D (vector unsigned char) { j,j,=
j,j, j,j,j,j, j,j,j,j, j,j,j,j };
- vector unsigned int vec_out =3D (vector unsigned int){ 0,0,0,0 =
};
+ vec_shft =3D (vector unsigned char) { j,j,j,j, j,j,j,j, j,j,j,j=
, j,j,j,j };
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
/* Save flags */
__asm__ __volatile__ ("mfcr %0" : "=3Dr" (tmpcr));
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAU=
LT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -5845,9 +5868,9 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src1 =3D (unsigned int*)&vec_in1;
- unsigned int* src2 =3D (unsigned int*)&vec_shft;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src1 =3D (unsigned int*)&vec_in1;
+ src2 =3D (unsigned int*)&vec_shft;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: ", name);
printf("%08x%08x%08x%08x, ", src1[0], src1[1], src1[2], src1[3]=
);
printf("%08x%08x%08x%08x\n", src2[0], src2[1], src2[2], src2[3]=
);
@@ -5855,10 +5878,10 @@
printf("%s: =3D> %08x %08x %08x %08x ", name,
dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
- printf("(%08x, %08x)\n", flags, p_vscr[3]);
+ p_vscr =3D (unsigned int*)𝓋
+ printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
- printf("(%08x)\n", flags);
+ printf("(%08x)\n", flags);
#endif
}
if (verbose) printf("\n");
@@ -5870,14 +5893,19 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_in1, vec_out, vscr;
uint32_t func_buf[2], *p;
+ unsigned int *src1, *dst;
int i,j;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_viargs; i++) {
- vector unsigned int vec_in1 =3D (vector unsigned int)viargs[i];
+ vec_in1 =3D (vector unsigned int)viargs[i];
=20
for (j=3D0; j<16; j+=3D3) {
- vector unsigned int vec_out =3D (vector unsigned int){ 0,0,0,0 =
};
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
/* Patch up the instruction */
p =3D (void *)func;
@@ -5890,7 +5918,7 @@
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAU=
LT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -5912,18 +5940,18 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src1 =3D (unsigned int*)&vec_in1;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src1 =3D (unsigned int*)&vec_in1;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: ", name);
printf("%08x %08x %08x %08x, %u\n", src1[0], src1[1], src1[2], =
src1[3], j);
=20
printf("%s: =3D> %08x %08x %08x %08x ", name,
dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
- printf("(%08x, %08x)\n", flags, p_vscr[3]);
+ p_vscr =3D (unsigned int*)𝓋
+ printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
- printf("(%08x)\n", flags);
+ printf("(%08x)\n", flags);
#endif
}
if (verbose) printf("\n");
@@ -5935,11 +5963,16 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_out, vscr;
uint32_t func_buf[2], *p;
+ unsigned int *dst;
int i;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<32; i++) {
- vector unsigned int vec_out =3D (vector unsigned int){ 0,0,0,0 };
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
/* Patch up the instruction */
p =3D (void *)func;
@@ -5952,7 +5985,7 @@
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_=
VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -5971,12 +6004,12 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: %2d =3D> ", name, i);
=20
printf("%08x %08x %08x %08x ", dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -5989,15 +6022,20 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_in1, vec_in2, vec_out, vscr;
uint32_t func_buf[2], *p;
+ unsigned int *src1, *src2, *dst;
int i,j,k;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_viargs; i++) {
- vector unsigned int vec_in1 =3D (vector unsigned int)viargs[i];
+ vec_in1 =3D (vector unsigned int)viargs[i];
for (j=3D0; j<nb_viargs; j++) {
- vector unsigned int vec_in2 =3D (vector unsigned int)viargs[j];
+ vec_in2 =3D (vector unsigned int)viargs[j];
for (k=3D0; k<16; k+=3D14) {
- vector unsigned int vec_out =3D (vector unsigned int){ 0,0,0=
,0 };
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
/* Patch up the instruction */
p =3D (void *)func;
@@ -6010,7 +6048,7 @@
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DE=
FAULT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -6033,9 +6071,9 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src1 =3D (unsigned int*)&vec_in1;
- unsigned int* src2 =3D (unsigned int*)&vec_in2;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src1 =3D (unsigned int*)&vec_in1;
+ src2 =3D (unsigned int*)&vec_in2;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: ", name);
printf("%08x%08x%08x%08x, %08x%08x%08x%08x, %u\n",
src1[0], src1[1], src1[2], src1[3],
@@ -6044,7 +6082,7 @@
printf("%s: =3D> %08x %08x %08x %08x] ", name,
dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -6061,10 +6099,15 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_out, vscr;
+ unsigned int *dst;
int i;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D-1; i<17; i++) {
- vector unsigned int vec_out =3D (vector unsigned int){ 0,0,0,0 };
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
// make sure start address is 16 aligned - use viargs[0]
r15 =3D (uint32_t)&viargs[0];
@@ -6075,7 +6118,7 @@
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_=
VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags)); =20
@@ -6094,7 +6137,7 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ dst =3D (unsigned int*)&vec_out;
printf("%s %3d, %3d", name, i, 0);
printf(" =3D> %08x %08x %08x %08x ", dst[0], dst[1], dst[2], dst[3=
]);
printf("(%08x)\n", flags);
@@ -6165,6 +6208,8 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_in, vec_out, vscr;
+ unsigned int *src, *dst;
int i,j, k, do_mask;
=20
do_mask =3D 0;
@@ -6174,7 +6219,7 @@
=20
for (i=3D0; i<nb_viargs; i++) {
for (j=3D0; j<16; j+=3D7) {
- volatile vector unsigned int vec_out =3D (vector unsigned int){=
0,0,0,0 };
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
// load from viargs array + some dis-alignment
r15 =3D (uint32_t)&viargs[0];
@@ -6185,7 +6230,7 @@
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAU=
LT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -6204,9 +6249,9 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- volatile vector unsigned int vec_in =3D (vector unsigned int)vi=
args[i];
- unsigned int* src =3D (unsigned int*)&vec_in;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ vec_in =3D (vector unsigned int)viargs[i];
+ src =3D (unsigned int*)&vec_in;
+ dst =3D (unsigned int*)&vec_out;
=20
/* For lvebx/lvehx/lvewx, as per the documentation, all of
the dest reg except the loaded bits are undefined
@@ -6218,19 +6263,19 @@
for (k =3D 0; k < 16; k++)
if (k !=3D j)
p[k] =3D (char)0;
- }
+ }
if (do_mask =3D=3D 2) {
short* p =3D (short*)dst;
for (k =3D 0; k < 8; k++)
if (k !=3D (j>>1))
p[k] =3D (short)0;
- }
+ }
if (do_mask =3D=3D 4) {
int* p =3D (int*)dst;
for (k =3D 0; k < 4; k++)
if (k !=3D (j>>2))
p[k] =3D (int)0;
- }
+ }
=20
printf("%s %3d, %08x %08x %08x %08x", name, j, src[0], src[1], =
src[2], src[3]);
printf(" =3D> %08x %08x %08x %08x ", dst[0], dst[1], dst[2], ds=
t[3]);
@@ -6247,6 +6292,8 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_in, vec_out, vscr;
+ unsigned int *src, *dst;
int i,j;
vector unsigned int* viargs_priv;
=20
@@ -6258,7 +6305,7 @@
for (i=3D0; i<nb_viargs; i++) {
for (j=3D0; j<16; j+=3D7) {
// read from viargs
- volatile vector unsigned int vec_in =3D (vector unsigned int)vi=
args[i];
+ vec_in =3D (vector unsigned int)viargs[i];
=20
// store to viargs_priv[0] + some dis-alignment
r16 =3D (uint32_t)&viargs_priv[0];
@@ -6269,7 +6316,7 @@
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAU=
LT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -6290,9 +6337,9 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- volatile vector unsigned int vec_out =3D (vector unsigned int)v=
iargs_priv[i];
- unsigned int* src =3D (unsigned int*)&vec_in;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ vec_out =3D (vector unsigned int)viargs_priv[i];
+ src =3D (unsigned int*)&vec_in;
+ dst =3D (unsigned int*)&vec_out;
printf("%s %3d, %08x %08x %08x %08x", name, j, src[0], src[1], =
src[2], src[3]);
printf(" =3D> %08x %08x %08x %08x ", dst[0], dst[1], dst[2], ds=
t[3]);
printf("(%08x)\n", flags);
@@ -6324,7 +6371,13 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector float vec_in, vec_out;
+ volatile vector unsigned int vscr;
+ unsigned int *src, *dst;
int i;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
/* if we're doing an estimation operation, arrange to zap the
bottom byte of the result as it's basically garbage, and differs
@@ -6334,15 +6387,15 @@
? 0xFFFFFF00 : 0xFFFFFFFF;
=20
for (i=3D0; i<nb_vfargs; i++) {
- vector float vec_in =3D (vector float)vfargs[i];
- vector float vec_out =3D (vector float){ 0.0, 0.0, 0.0, 0.0 };
+ vec_in =3D (vector float)vfargs[i];
+ vec_out =3D (vector float){ 0.0, 0.0, 0.0, 0.0 };
=20
/* Save flags */
__asm__ __volatile__ ("mfcr %0" : "=3Dr" (tmpcr));
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_=
VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -6364,15 +6417,15 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src =3D (unsigned int*)&vec_in;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src =3D (unsigned int*)&vec_in;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: %08x %08x %08x %08x\n", name,
src[0], src[1], src[2], src[3]);
=20
printf("%s: =3D> %08x %08x %08x %08x ", name,
dst[0] & mask, dst[1] & mask, dst[2] & mask, dst[3] & mask)=
;
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -6385,20 +6438,26 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector float vec_in1, vec_in2, vec_out;
+ volatile vector unsigned int vscr;
+ unsigned int *src1, *src2, *dst;
int i,j;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_vfargs; i++) {
for (j=3D0; j<nb_vfargs; j+=3D3) {
- vector float vec_in1 =3D (vector float)vfargs[i];
- vector float vec_in2 =3D (vector float)vfargs[j];
- vector float vec_out =3D (vector float){ 0.0, 0.0, 0.0, 0.0 };
+ vec_in1 =3D (vector float)vfargs[i];
+ vec_in2 =3D (vector float)vfargs[j];
+ vec_out =3D (vector float){ 0.0, 0.0, 0.0, 0.0 };
=20
/* Save flags */
__asm__ __volatile__ ("mfcr %0" : "=3Dr" (tmpcr));
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAU=
LT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -6421,9 +6480,9 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src1 =3D (unsigned int*)&vec_in1;
- unsigned int* src2 =3D (unsigned int*)&vec_in2;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src1 =3D (unsigned int*)&vec_in1;
+ src2 =3D (unsigned int*)&vec_in2;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: %08x%08x%08x%08x, %08x%08x%08x%08x\n", name,
src1[0], src1[1], src1[2], src1[3],
src2[0], src2[1], src2[2], src2[3]);
@@ -6431,7 +6490,7 @@
printf("%s: =3D> %08x %08x %08x %08x ", name,
dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -6446,22 +6505,28 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector float vec_in1, vec_in2, vec_in3, vec_out;
+ volatile vector unsigned int vscr;
+ unsigned int *src1, *src2, *src3, *dst;
int i,j,k;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_vfargs; i++) {
for (j=3D0; j<nb_vfargs; j+=3D3) {
for (k=3D0; k<nb_vfargs; k+=3D5) {
- vector float vec_in1 =3D (vector float)vfargs[i];
- vector float vec_in2 =3D (vector float)vfargs[j];
- vector float vec_in3 =3D (vector float)vfargs[k];
- vector float vec_out =3D (vector float){ 0.0, 0.0, 0.0, 0.0 =
};
+ vec_in1 =3D (vector float)vfargs[i];
+ vec_in2 =3D (vector float)vfargs[j];
+ vec_in3 =3D (vector float)vfargs[k];
+ vec_out =3D (vector float){ 0.0, 0.0, 0.0, 0.0 };
=20
/* Save flags */
__asm__ __volatile__ ("mfcr %0" : "=3Dr" (tmpcr));
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DE=
FAULT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -6485,10 +6550,10 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src1 =3D (unsigned int*)&vec_in1;
- unsigned int* src2 =3D (unsigned int*)&vec_in2;
- unsigned int* src3 =3D (unsigned int*)&vec_in3;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src1 =3D (unsigned int*)&vec_in1;
+ src2 =3D (unsigned int*)&vec_in2;
+ src3 =3D (unsigned int*)&vec_in3;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: %08x%08x%08x%08x, %08x%08x%08x%08x, %08x%08x%08x=
%08x\n", name,
src1[0], src1[1], src1[2], src1[3],
src2[0], src2[1], src2[2], src2[3],
@@ -6497,7 +6562,7 @@
printf("%s: =3D> %08x %08x %08x %08x ", name,
dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -6513,14 +6578,19 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_in, vec_out, vscr;
uint32_t func_buf[2], *p;
+ unsigned int *src, *dst;
int i,j;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_vfargs; i++) {
- vector unsigned int vec_in1 =3D (vector unsigned int)vfargs[i];
+ vec_in =3D (vector unsigned int)vfargs[i];
=20
for (j=3D0; j<32; j+=3D9) {
- vector unsigned int vec_out =3D (vector unsigned int){ 0,0,0,0 =
};
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
/* Patch up the instruction */
p =3D (void *)func;
@@ -6533,13 +6603,13 @@
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAU=
LT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
=20
// load input -> r14
- __asm__ __volatile__ ("vor 14,%0,%0" : : "vr" (vec_in1));
+ __asm__ __volatile__ ("vor 14,%0,%0" : : "vr" (vec_in));
=20
// do stuff
(*func)();
@@ -6555,13 +6625,13 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src1 =3D (unsigned int*)&vec_in1;
- unsigned int* dst =3D (unsigned int*)&vec_out;
- printf("%s: %08x (%13e), %2u", name, src1[0], *(float*)(&src1[0=
]), j);
+ src =3D (unsigned int*)&vec_in;
+ dst =3D (unsigned int*)&vec_out;
+ printf("%s: %08x (%13e), %2u", name, src[0], *(float*)(&src[0])=
, j);
printf(" =3D> %08x (%13e) ", dst[0], *(float*)(&dst[0]));
// printf(" =3D> %08x ", dst[0]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -6831,7 +6901,7 @@
{
#if !defined (USAGE_SIMPLE)
fprintf(stderr,
- "test-ppc [-1] [-2] [-3] [-*] [-t <type>] [-f <family>] [-u] =
"
+ "jm-insns [-1] [-2] [-3] [-*] [-t <type>] [-f <family>] [-u] =
"
"[-n <filter>] [-r <test_rigour>] [-h]\n"
"\t-1: test opcodes with one argument\n"
"\t-2: test opcodes with two arguments\n"
@@ -6863,7 +6933,7 @@
);
#else
fprintf(stderr,
- "test-ppc [-a]\n"
+ "jm-insns [-a]\n"
"\t-a: include tests for altivec instructions\n"
);
#endif
@@ -6998,8 +7068,8 @@
=20
#else
/* Simple usage:
- ./test-ppc =3D> all insns, except AV
- ./test-ppc -a =3D> all insns, including AV
+ ./jm-insns =3D> all insns, except AV
+ ./jm-insns -a =3D> all insns, including AV
*/
char *filter =3D NULL;
insn_sel_flags_t flags;
|