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From: <sv...@va...> - 2005-11-23 01:05:24
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Author: njn
Date: 2005-11-23 01:05:15 +0000 (Wed, 23 Nov 2005)
New Revision: 5228
Log:
Cleaned up set_address_range_perms() a little, to make it easier to
understand.
Also changed its fast loop to do a single double-sized shadow memory writ=
e
rather than two single-sized one. This gains a couple of percent for
programs in which this function is called a lot.
Modified:
branches/COMPVBITS/memcheck/mc_main.c
Modified: branches/COMPVBITS/memcheck/mc_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/COMPVBITS/memcheck/mc_main.c 2005-11-21 13:57:49 UTC (rev 52=
27)
+++ branches/COMPVBITS/memcheck/mc_main.c 2005-11-23 01:05:15 UTC (rev 52=
28)
@@ -686,10 +686,10 @@
}
=20
=20
-static void set_address_range_perms ( Addr a, SizeT len, UWord vabits32,
+static void set_address_range_perms ( Addr a, SizeT len, UWord vabits64,
UWord dsm_num )
{
- UWord sm_off;
+ UWord sm_off64;
SecMap* sm;
SecMap** binder;
SecMap* example_dsm;
@@ -697,9 +697,9 @@
PROF_EVENT(150, "set_address_range_perms");
=20
/* Check the V+A bits make sense. */
- tl_assert(vabits32 =3D=3D MC_BITS32_NOACCESS ||
- vabits32 =3D=3D MC_BITS32_WRITABLE ||
- vabits32 =3D=3D MC_BITS32_READABLE);
+ tl_assert(vabits64 =3D=3D MC_BITS64_NOACCESS ||
+ vabits64 =3D=3D MC_BITS64_WRITABLE ||
+ vabits64 =3D=3D MC_BITS64_READABLE);
=20
if (len =3D=3D 0)
return;
@@ -707,9 +707,9 @@
if (len > 100 * 1000 * 1000) {
if (VG_(clo_verbosity) > 0 && !VG_(clo_xml)) {
Char* s =3D NULL; // placate GCC
- if (vabits32 =3D=3D MC_BITS32_NOACCESS) s =3D "noaccess";
- if (vabits32 =3D=3D MC_BITS32_WRITABLE) s =3D "writable";
- if (vabits32 =3D=3D MC_BITS32_READABLE) s =3D "readable";
+ if (vabits64 =3D=3D MC_BITS64_NOACCESS) s =3D "noaccess";
+ if (vabits64 =3D=3D MC_BITS64_WRITABLE) s =3D "writable";
+ if (vabits64 =3D=3D MC_BITS64_READABLE) s =3D "readable";
VG_(message)(Vg_UserMsg, "Warning: set address range perms: "
"large range %lu (%s)", len, s);
}
@@ -719,7 +719,7 @@
/*------------------ debug-only case ------------------ */
{
// XXX: Simplest, slow version
- UWord vabits8 =3D vabits32 & 0x3;
+ UWord vabits8 =3D vabits64 & 0x3;
SizeT i;
for (i =3D 0; i < len; i++) {
set_vabits8(aA + i, vabits8);
@@ -735,11 +735,9 @@
example_dsm =3D &sm_distinguished[dsm_num];
=20
/* Slowly do parts preceding 8-byte alignment. */
- while (True) {
- if (len =3D=3D 0) break;
- if (VG_IS_8_ALIGNED(a)) break;
+ while (len !=3D 0 && !VG_IS_8_ALIGNED(a)) {
PROF_EVENT(151, "set_address_range_perms-loop1-pre");
- set_vabits8( a, vabits32 & 0x3 );
+ set_vabits8( a, vabits64 & 0x3 );
a++;
len--;
} =20
@@ -752,11 +750,7 @@
/* Now go in steps of 8 bytes. */
binder =3D find_secmap_binder_for_addr(a);
=20
- // XXX: understand this better...
- while (True) {
-
- if (len < 8) break;
-
+ while (len >=3D 8) {
PROF_EVENT(152, "set_address_range_perms-loop8");
=20
if ((a & SECONDARY_MASK) =3D=3D 0) {
@@ -777,30 +771,25 @@
PROF_EVENT(154, "set_address_range_perms-entire-secmap");
*binder =3D example_dsm;
len -=3D SECONDARY_SIZE;
- a +=3D SECONDARY_SIZE;
+ a +=3D SECONDARY_SIZE;
continue;
}
}
=20
/* If the primary is already pointing to a distinguished map
with the same properties as we're trying to set, then leave
- it that way. */
- if (*binder =3D=3D example_dsm) {
- a +=3D 8;
- len -=3D 8;
- continue;
+ it that way. Otherwise we have to do some writing. */
+ if (*binder !=3D example_dsm) {
+ /* Make sure it's OK to write the secondary. */
+ if (is_distinguished_sm(*binder)) {
+ *binder =3D copy_for_writing(*binder);
+ }
+ sm =3D *binder;
+ sm_off64 =3D SM_OFF_64(a);
+ ((UShort*)(sm->vabits32))[sm_off64] =3D vabits64;
}
=20
- /* Make sure it's OK to write the secondary. */
- if (is_distinguished_sm(*binder))
- *binder =3D copy_for_writing(*binder);
-
- sm =3D *binder;
- sm_off =3D SM_OFF(a);
- sm->vabits32[sm_off+0] =3D vabits32;
- sm->vabits32[sm_off+1] =3D vabits32;
-
- a +=3D 8;
+ a +=3D 8;
len -=3D 8;
}
=20
@@ -810,10 +799,9 @@
tl_assert(VG_IS_8_ALIGNED(a) && len > 0 && len < 8);
=20
/* Finish the upper fragment. */
- while (True) {
- if (len =3D=3D 0) break;
+ while (len > 0) {
PROF_EVENT(155, "set_address_range_perms-loop1-post");
- set_vabits8 ( a, vabits32 & 0x3 );
+ set_vabits8 ( a, vabits64 & 0x3 );
a++;
len--;
} =20
@@ -826,21 +814,21 @@
{
PROF_EVENT(40, "mc_make_noaccess");
DEBUG("mc_make_noaccess(%p, %lu)\n", a, len);
- set_address_range_perms ( a, len, MC_BITS32_NOACCESS, SM_DIST_NOACCES=
S );
+ set_address_range_perms ( a, len, MC_BITS64_NOACCESS, SM_DIST_NOACCES=
S );
}
=20
static void mc_make_writable ( Addr a, SizeT len )
{
PROF_EVENT(41, "mc_make_writable");
DEBUG("mc_make_writable(%p, %lu)\n", a, len);
- set_address_range_perms ( a, len, MC_BITS32_WRITABLE, SM_DIST_WRITABL=
E );
+ set_address_range_perms ( a, len, MC_BITS64_WRITABLE, SM_DIST_WRITABL=
E );
}
=20
static void mc_make_readable ( Addr a, SizeT len )
{
PROF_EVENT(42, "mc_make_readable");
DEBUG("mc_make_readable(%p, %lu)\n", a, len);
- set_address_range_perms ( a, len, MC_BITS32_READABLE, SM_DIST_READABL=
E );
+ set_address_range_perms ( a, len, MC_BITS64_READABLE, SM_DIST_READABL=
E );
}
=20
=20
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