|
From: <sv...@va...> - 2005-11-18 22:18:27
|
Author: sewardj
Date: 2005-11-18 22:18:23 +0000 (Fri, 18 Nov 2005)
New Revision: 1466
Log:
gcc-2.96 build fixes
Modified:
trunk/priv/guest-ppc32/toIR.c
trunk/priv/host-ppc32/isel.c
Modified: trunk/priv/guest-ppc32/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc32/toIR.c 2005-11-18 20:57:41 UTC (rev 1465)
+++ trunk/priv/guest-ppc32/toIR.c 2005-11-18 22:18:23 UTC (rev 1466)
@@ -1484,11 +1484,13 @@
guaranteed to be zero. */
static IRExpr* /* ::Ity_I32 */ getSPR_field ( PPC32SPR reg, UInt fld )
{
+ UInt shft, mask;
+
vassert( fld < 8 );
vassert( reg < PPC32_SPR_MAX );
=20
- UInt shft =3D 4*(7-fld);
- UInt mask =3D 0xF<<shft;
+ shft =3D 4*(7-fld);
+ mask =3D 0xF<<shft;
=20
switch (reg) {
case PPC32_SPR_XER:
@@ -1613,12 +1615,14 @@
REG[FLD] (as per IBM/hardware notation). */
static void putSPR_field ( PPC32SPR reg, IRExpr* src, UInt fld )
{
+ UInt shft, mask;
+
vassert( typeOfIRExpr(irbb->tyenv,src ) =3D=3D Ity_I32 );
vassert( fld < 8 );
vassert( reg < PPC32_SPR_MAX );
=20
- UInt shft =3D 4*(7-fld);
- UInt mask =3D 0xF<<shft;
+ shft =3D 4*(7-fld);
+ mask =3D 0xF<<shft;
=20
switch (reg) {
case PPC32_SPR_CR:
@@ -3688,13 +3692,15 @@
UInt opc2 =3D ifieldOPClo10(theInstr);
UChar b0 =3D ifieldBIT0(theInstr);
=20
+ IRTemp rS;
+
/* Reorder SPR field as per PPC32 p470 */
SPR =3D ((SPR & 0x1F) << 5) | ((SPR >> 5) & 0x1F);
=20
/* Reorder TBR field as per PPC32 p475 */
TBR =3D ((TBR & 31) << 5) | ((TBR >> 5) & 31);
=20
- IRTemp rS =3D newTemp(Ity_I32);
+ rS =3D newTemp(Ity_I32);
assign( rS, getIReg(rS_addr) );
=20
if (opc1 !=3D 0x1F || b0 !=3D 0) {
@@ -6817,12 +6823,15 @@
IRTemp vB =3D newTemp(Ity_V128);
IRTemp vScale =3D newTemp(Ity_V128);
IRTemp vInvScale =3D newTemp(Ity_V128);
+
+ float scale, inv_scale;
+
assign( vB, getVReg(vB_addr));
=20
/* scale =3D 2^UIMM, cast to float, reinterpreted as uint */
- float scale =3D (float)( (unsigned int) 1<<UIMM_5 );
+ scale =3D (float)( (unsigned int) 1<<UIMM_5 );
assign( vScale, unop(Iop_Dup32x4, mkU32( *((unsigned int*)(&scale)) )=
) );
- float inv_scale =3D 1/scale;
+ inv_scale =3D 1/scale;
assign( vInvScale, unop(Iop_Dup32x4, mkU32( *((unsigned int*)(&inv_sc=
ale)) )) );
=20
if (opc1 !=3D 0x4) {
Modified: trunk/priv/host-ppc32/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc32/isel.c 2005-11-18 20:57:41 UTC (rev 1465)
+++ trunk/priv/host-ppc32/isel.c 2005-11-18 22:18:23 UTC (rev 1466)
@@ -839,14 +839,16 @@
/* for each lane of vSrc: lane =3D=3D nan ? laneX =3D all 1's : all 0's =
*/
static HReg isNan ( ISelEnv* env, HReg vSrc )
{
+ HReg zeros, msk_exp, msk_mnt, expt, mnts, vIsNan;
+=20
vassert(hregClass(vSrc) =3D=3D HRcVec128);
=20
- HReg zeros =3D mk_AvDuplicateRI(env, mkU32(0));
- HReg msk_exp =3D mk_AvDuplicateRI(env, mkU32(0x7F800000));
- HReg msk_mnt =3D mk_AvDuplicateRI(env, mkU32(0x7FFFFF));
- HReg expt =3D newVRegV(env);
- HReg mnts =3D newVRegV(env);
- HReg vIsNan =3D newVRegV(env);=20
+ zeros =3D mk_AvDuplicateRI(env, mkU32(0));
+ msk_exp =3D mk_AvDuplicateRI(env, mkU32(0x7F800000));
+ msk_mnt =3D mk_AvDuplicateRI(env, mkU32(0x7FFFFF));
+ expt =3D newVRegV(env);
+ mnts =3D newVRegV(env);
+ vIsNan =3D newVRegV(env);=20
=20
/* 32bit float =3D> sign(1) | expontent(8) | mantissa(23)
nan =3D> exponent all ones, mantissa > 0 */
|