[Valgrind-developers] vex: r1388 - in trunk/priv: guest-ppc32 host-ppc32

[<sv...@va...>]

Author: cerion
Date: 2005-09-13 14:34:09 +0100 (Tue, 13 Sep 2005)
New Revision: 1388

Log:
a couple more simple altivec insns
 - vandc, vnor, vsel

Modified:
   trunk/priv/guest-ppc32/toIR.c
   trunk/priv/host-ppc32/isel.c


Modified: trunk/priv/guest-ppc32/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc32/toIR.c	2005-09-12 22:51:53 UTC (rev 1387)
+++ trunk/priv/guest-ppc32/toIR.c	2005-09-13 13:34:09 UTC (rev 1388)
@@ -5308,8 +5308,9 @@
=20
    case 0x444: // vandc (And, AV p148)
       DIP("vandc v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
-      DIP(" =3D> not implemented\n");
-      return False;
+      putVReg( vD_addr, binop(Iop_AndV128, mkexpr(vA),
+			      unop(Iop_NotV128, mkexpr(vB))) );
+      break;
=20
    case 0x484: // vor (Or, AV p217)
       DIP("vor v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
@@ -5323,8 +5324,9 @@
=20
    case 0x504: // vnor (Nor, AV p216)
       DIP("vnor v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
-      DIP(" =3D> not implemented\n");
-      return False;
+      putVReg( vD_addr,
+         unop(Iop_NotV128, binop(Iop_OrV128, mkexpr(vA), mkexpr(vB))) );
+      break;
=20
    default:
       vex_printf("dis_av_logic(PPC32)(opc2=3D0x%x)\n", opc2);
@@ -5603,6 +5605,13 @@
=20
    UChar SIMM_8 =3D extend_s_5to8(SIMM_5);
=20
+   IRTemp vA =3D newTemp(Ity_V128);
+   IRTemp vB =3D newTemp(Ity_V128);
+   IRTemp vC =3D newTemp(Ity_V128);
+   assign( vA, getVReg(vA_addr));
+   assign( vB, getVReg(vB_addr));
+   assign( vC, getVReg(vC_addr));
+
    if (opc1 !=3D 0x4) {
       vex_printf("dis_av_permute(PPC32)(instr)\n");
       return False;
@@ -5611,8 +5620,11 @@
    switch (opc2) {
    case 0x2A: // vsel (Conditional Select, AV p238)
       DIP("vsel v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
-      DIP(" =3D> not implemented\n");
-      return False;
+      /* vD =3D (vA & ~vC) | (vB & vC) */
+      putVReg( vD_addr, binop(Iop_OrV128,
+         binop(Iop_AndV128, mkexpr(vA), unop(Iop_NotV128, mkexpr(vC))),
+         binop(Iop_AndV128, mkexpr(vB), mkexpr(vC))) );
+      return True;
     =20
    case 0x2B: // vperm (Permute, AV p218)
       DIP("vperm v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr)=
;

Modified: trunk/priv/host-ppc32/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc32/isel.c	2005-09-12 22:51:53 UTC (rev 1387)
+++ trunk/priv/host-ppc32/isel.c	2005-09-13 13:34:09 UTC (rev 1388)
@@ -2822,6 +2822,7 @@
    }
=20
    if (e->tag =3D=3D Iex_Get) {
+      /* Guest state vectors are 16byte aligned, so don't need to worry =
here */
       HReg dst =3D newVRegV(env);
       addInstr(env,
                PPC32Instr_AvLdSt( True/*load*/, 16, dst,
@@ -3393,6 +3394,7 @@
          return;
      }
      if (ty =3D=3D Ity_V128) {
+         /* Guest state vectors are 16byte aligned, so don't need to wor=
ry here */
          HReg v_src =3D iselVecExpr(env, stmt->Ist.Put.data);
          PPC32AMode* am_addr  =3D PPC32AMode_IR(stmt->Ist.Put.offset, Gu=
estStatePtr);
          addInstr(env, PPC32Instr_AvLdSt(False/*store*/, 16, v_src, am_a=
ddr));