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From: <sv...@va...> - 2005-09-06 09:10:14
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Author: sewardj
Date: 2005-09-06 10:10:09 +0100 (Tue, 06 Sep 2005)
New Revision: 1369
Log:
Reinstate lwbrx.
Modified:
trunk/priv/guest-ppc32/toIR.c
Modified: trunk/priv/guest-ppc32/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc32/toIR.c 2005-08-30 02:29:42 UTC (rev 1368)
+++ trunk/priv/guest-ppc32/toIR.c 2005-09-06 09:10:09 UTC (rev 1369)
@@ -3396,42 +3396,44 @@
=20
=20
=20
-//zz /*
-//zz Integer Load/Store Reverse Instructions
-//zz */
-//zz static Bool dis_int_ldst_rev ( UInt theInstr )
-//zz {
-//zz /* X-Form */
-//zz UChar opc1 =3D toUChar((theInstr >> 26) & 0x3F); /* theInstr=
[26:31] */
-//zz UChar Rd_addr =3D toUChar((theInstr >> 21) & 0x1F); /* theInstr=
[21:25] */
-//zz UChar Rs_addr =3D toUChar((theInstr >> 21) & 0x1F); /* theInstr=
[21:25] */
-//zz UChar Ra_addr =3D toUChar((theInstr >> 16) & 0x1F); /* theInstr=
[16:20] */
-//zz UChar Rb_addr =3D toUChar((theInstr >> 11) & 0x1F); /* theInstr=
[11:15] */
-//zz UInt opc2 =3D (theInstr >> 1) & 0x3FF; /* theInstr=
[1:10] */
-//zz UChar b0 =3D toUChar((theInstr >> 0) & 1); /* theInstr=
[0] */
-//zz =20
-//zz IRTemp EA =3D newTemp(Ity_I32);
-//zz IRTemp Rd =3D newTemp(Ity_I32);
-//zz IRTemp Rs =3D newTemp(Ity_I32);
-//zz IRTemp byte0 =3D newTemp(Ity_I32);
-//zz IRTemp byte1 =3D newTemp(Ity_I32);
-//zz IRTemp byte2 =3D newTemp(Ity_I32);
-//zz IRTemp byte3 =3D newTemp(Ity_I32);
-//zz IRTemp tmp16 =3D newTemp(Ity_I16);
-//zz IRTemp tmp32 =3D newTemp(Ity_I32);
-//zz=20
-//zz if (opc1 !=3D 0x1F || b0 !=3D 0) {
-//zz vex_printf("dis_int_ldst_rev(PPC32)(opc1|b0)\n");
-//zz return False;
-//zz }
-//zz =20
-//zz if (Ra_addr =3D=3D 0) {
-//zz assign( EA, getIReg(Rb_addr));
-//zz } else {
-//zz assign( EA, binop(Iop_Add32, getIReg(Ra_addr), getIReg(Rb_add=
r)) );
-//zz }
-//zz =20
-//zz switch (opc2) {
+/*
+ Integer Load/Store Reverse Instructions
+*/
+static Bool dis_int_ldst_rev ( UInt theInstr )
+{
+ /* X-Form */
+ UChar opc1 =3D toUChar((theInstr >> 26) & 0x3F); /* theInstr[26:3=
1] */
+ UChar Rd_addr =3D toUChar((theInstr >> 21) & 0x1F); /* theInstr[21:2=
5] */
+// UChar Rs_addr =3D toUChar((theInstr >> 21) & 0x1F); /* theInstr[21=
:25] */
+ UChar Ra_addr =3D toUChar((theInstr >> 16) & 0x1F); /* theInstr[16:2=
0] */
+ UChar Rb_addr =3D toUChar((theInstr >> 11) & 0x1F); /* theInstr[11:1=
5] */
+ UInt opc2 =3D (theInstr >> 1) & 0x3FF; /* theInstr[1:10=
] */
+ UChar b0 =3D toUChar((theInstr >> 0) & 1); /* theInstr[0] =
*/
+ =20
+ IRTemp EA =3D newTemp(Ity_I32);
+// IRTemp Rd =3D newTemp(Ity_I32);
+// IRTemp Rs =3D newTemp(Ity_I32);
+// IRTemp byte0 =3D newTemp(Ity_I32);
+// IRTemp byte1 =3D newTemp(Ity_I32);
+// IRTemp byte2 =3D newTemp(Ity_I32);
+// IRTemp byte3 =3D newTemp(Ity_I32);
+// IRTemp tmp16 =3D newTemp(Ity_I16);
+// IRTemp tmp32 =3D newTemp(Ity_I32);
+ IRTemp w1 =3D newTemp(Ity_I32);
+ IRTemp w2 =3D newTemp(Ity_I32);
+
+ if (opc1 !=3D 0x1F || b0 !=3D 0) {
+ vex_printf("dis_int_ldst_rev(PPC32)(opc1|b0)\n");
+ return False;
+ }
+ =20
+ if (Ra_addr =3D=3D 0) {
+ assign( EA, getIReg(Rb_addr));
+ } else {
+ assign( EA, binop(Iop_Add32, getIReg(Ra_addr), getIReg(Rb_addr)) )=
;
+ }
+ =20
+ switch (opc2) {
//zz case 0x316: // lhbrx (Load Half Word Byte-Reverse Indexed, PPC32=
p449)
//zz vassert(0);
//zz=20
@@ -3443,25 +3445,26 @@
//zz mkexpr(byte0)) );
//zz putIReg( Rd_addr, mkexpr(Rd));
//zz break;
-//zz =20
-//zz case 0x216: // lwbrx (Load Word Byte-Reverse Indexed, PPC32 p459=
)
-//zz vassert(0);
-//zz=20
-//zz DIP("lwbrx r%d,r%d,r%d\n", Rd_addr, Ra_addr, Rb_addr);
-//zz assign( byte0, loadBE(Ity_I8, mkexpr(EA)) );
-//zz assign( byte1, loadBE(Ity_I8, binop(Iop_Add32, mkexpr(EA),mkU=
32(1))) );
-//zz assign( byte2, loadBE(Ity_I8, binop(Iop_Add32, mkexpr(EA),mkU=
32(2))) );
-//zz assign( byte3, loadBE(Ity_I8, binop(Iop_Add32, mkexpr(EA),mkU=
32(3))) );
-//zz assign( Rd, binop(Iop_Or32,
-//zz binop(Iop_Or32,
-//zz binop(Iop_Shl32, mkexpr(byte3), mkU8(=
24)),
-//zz binop(Iop_Shl32, mkexpr(byte2), mkU8(=
16))),
-//zz binop(Iop_Or32,
-//zz binop(Iop_Shl32, mkexpr(byte1), mkU8(=
8)),
-//zz mkexpr(byte0))) );
-//zz putIReg( Rd_addr, mkexpr(Rd));
-//zz break;
-//zz =20
+ =20
+ case 0x216: // lwbrx (Load Word Byte-Reverse Indexed, PPC32 p459)
+ DIP("lwbrx r%d,r%d,r%d\n", Rd_addr, Ra_addr, Rb_addr);
+ assign( w1, loadBE(Ity_I32, mkexpr(EA)) );
+ assign( w2,
+ binop(Iop_Or32,
+ binop(Iop_Shl32, mkexpr(w1), mkU8(24)),
+ binop(Iop_Or32,
+ binop(Iop_And32, binop(Iop_Shl32, mkexpr(w1), mkU8(8)),=20
+ mkU32(0x00FF0000)),
+ binop(Iop_Or32,
+ binop(Iop_And32, binop(Iop_Shr32, mkexpr(w1), mkU8(8)),
+ mkU32(0x0000FF00)),
+ binop(Iop_And32, binop(Iop_Shr32, mkexpr(w1), mkU8(24)),
+ mkU32(0x000000FF) )
+ )))
+ );
+ putIReg( Rd_addr, mkexpr(w2));
+ break;
+ =20
//zz case 0x396: // sthbrx (Store Half Word Byte-Reverse Indexed, PPC=
32 p523)
//zz vassert(0);
//zz=20
@@ -3498,13 +3501,13 @@
//zz binop(Iop_Shr32, mkexpr(byte3), mkU8(24))=
)) );
//zz storeBE( mkexpr(EA), mkexpr(tmp32) );
//zz break;
-//zz =20
-//zz default:
-//zz vex_printf("dis_int_ldst_rev(PPC32)(opc2)\n");
-//zz return False;
-//zz }
-//zz return True;
-//zz }
+ =20
+ default:
+ vex_printf("dis_int_ldst_rev(PPC32)(opc2)\n");
+ return False;
+ }
+ return True;
+}
=20
=20
=20
@@ -6411,12 +6414,12 @@
if (dis_int_store( theInstr )) goto decode_success;
goto decode_failure;
=20
-//zz /* Integer Load and Store with Byte Reverse Instructions */
-//zz case 0x316: case 0x216: case 0x396: // lhbrx, lwbrx, sthbrx
-//zz case 0x296: // stwbrx
-//zz if (dis_int_ldst_rev( theInstr )) goto decode_success;
-//zz goto decode_failure;
-//zz =20
+ /* Integer Load and Store with Byte Reverse Instructions */
+ case 0x316: case 0x216: case 0x396: // lhbrx, lwbrx, sthbrx
+ case 0x296: // stwbrx
+ if (dis_int_ldst_rev( theInstr )) goto decode_success;
+ goto decode_failure;
+ =20
//zz /* Integer Load and Store String Instructions */
//zz case 0x255: case 0x215: case 0x2D5: // lswi, lswx, stswi
//zz case 0x295: // stswx
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