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From: <sv...@va...> - 2005-08-10 18:22:56
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Author: sewardj
Date: 2005-08-10 19:22:54 +0100 (Wed, 10 Aug 2005)
New Revision: 1330
Log:
merge r1324 (Implement PREFETCH{W} m8).
Modified:
branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c
Modified: branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c 2005-08-10 18:18:36 U=
TC (rev 1329)
+++ branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c 2005-08-10 18:22:54 U=
TC (rev 1330)
@@ -13064,6 +13064,25 @@
DIP("j%s-32 0x%llx\n", name_AMD64Condcode(opc - 0x80), d64);
break;
=20
+ /* =3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- PREFETCH =3D-=3D-=3D-=3D-=3D=
-=3D-=3D-=3D-=3D-=3D */
+ case 0x0D: /* 0F 0D /0 -- prefetch mem8 */
+ /* 0F 0D /1 -- prefetchw mem8 */
+ if (have66orF2orF3(pfx)) goto decode_failure;
+ modrm =3D getUChar(delta);
+ if (epartIsReg(modrm)) goto decode_failure;
+ if (gregLO3ofRM(modrm) !=3D 0 && gregLO3ofRM(modrm) !=3D 1)
+ goto decode_failure;
+
+ addr =3D disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ delta +=3D alen;
+
+ switch (gregLO3ofRM(modrm)) {
+ case 0: DIP("prefetch %s\n", dis_buf); break;
+ case 1: DIP("prefetchw %s\n", dis_buf); break;
+ default: vassert(0); /*NOTREACHED*/
+ }
+ break;
+
/* =3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- RDTSC -=3D-=3D-=3D-=3D-=3D=
-=3D-=3D-=3D-=3D-=3D-=3D */
=20
case 0x31: /* RDTSC */
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