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From: <sv...@va...> - 2005-08-10 18:18:40
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Author: sewardj
Date: 2005-08-10 19:18:36 +0100 (Wed, 10 Aug 2005)
New Revision: 1329
Log:
merge r1323 (DC /3 (FCOMP double-real)).
Modified:
branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c
Modified: branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c 2005-08-10 18:14:49 U=
TC (rev 1328)
+++ branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c 2005-08-10 18:18:36 U=
TC (rev 1329)
@@ -5150,22 +5150,23 @@
//.. mkU32(0x4500)
//.. ));
//.. break; =20
-//..=20
-//.. case 3: /* FCOMP double-real */
-//.. DIP("fcompl %s\n", dis_buf);
-//.. /* This forces C1 to zero, which isn't right. */
-//.. put_C3210(=20
-//.. binop( Iop_And32,
-//.. binop(Iop_Shl32,=20
-//.. binop(Iop_CmpF64,=20
-//.. get_ST(0),
-//.. loadLE(Ity_F64,mkexpr(addr)))=
,
-//.. mkU8(8)),
-//.. mkU32(0x4500)
-//.. ));
-//.. fp_pop();
-//.. break; =20
=20
+ case 3: /* FCOMP double-real */
+ DIP("fcompl %s\n", dis_buf);
+ /* This forces C1 to zero, which isn't right. */
+ put_C3210(=20
+ unop(Iop_32Uto64,
+ binop( Iop_And32,
+ binop(Iop_Shl32,=20
+ binop(Iop_CmpF64,=20
+ get_ST(0),
+ loadLE(Ity_F64,mkexpr(addr))),
+ mkU8(8)),
+ mkU32(0x4500)
+ )));
+ fp_pop();
+ break; =20
+
case 4: /* FSUB double-real */
fp_do_op_mem_ST_0 ( addr, "sub", dis_buf, Iop_SubF64, Tru=
e );
break;
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