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From: <sv...@va...> - 2005-07-24 06:29:30
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Author: sewardj
Date: 2005-07-24 07:29:00 +0100 (Sun, 24 Jul 2005)
New Revision: 1297
Log:
More isel cases.
Modified:
trunk/priv/host-ppc32/isel.c
Modified: trunk/priv/host-ppc32/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc32/isel.c 2005-07-23 20:34:51 UTC (rev 1296)
+++ trunk/priv/host-ppc32/isel.c 2005-07-24 06:29:00 UTC (rev 1297)
@@ -1730,6 +1730,19 @@
//.. }
//.. }
=20
+
+ /* CmpNEZ64 */
+ if (e->tag =3D=3D Iex_Unop=20
+ && e->Iex.Unop.op =3D=3D Iop_CmpNEZ64) {
+ HReg hi, lo;
+ HReg tmp =3D newVRegI(env);
+ iselInt64Expr( &hi, &lo, env, e->Iex.Unop.arg );
+ addInstr(env, mk_iMOVds_RR(tmp, lo));
+ addInstr(env, PPC32Instr_Alu32(Palu_OR, tmp, tmp, PPC32RH_Reg(hi))=
);
+ addInstr(env, PPC32Instr_Cmp32(False/*sign*/,7/*cr*/,tmp,PPC32RH_I=
mm(False,0)));
+ return mk_PPCCondCode( Pct_FALSE, Pcf_7EQ );
+ }
+
/* var */
if (e->tag =3D=3D Iex_Tmp) {
HReg r_src =3D lookupIRTemp(env, e->Iex.Tmp.tmp);
@@ -1897,28 +1910,28 @@
//.. *rLo =3D tLo;
//.. return;
//.. }
-//..=20
-//.. /* Or64/And64/Xor64 */
-//.. case Iop_Or64:
-//.. case Iop_And64:
-//.. case Iop_Xor64: {
-//.. HReg xLo, xHi, yLo, yHi;
-//.. HReg tLo =3D newVRegI(env);
-//.. HReg tHi =3D newVRegI(env);
-//.. X86AluOp op =3D e->Iex.Binop.op=3D=3DIop_Or64 ? Xalu_OR
-//.. : e->Iex.Binop.op=3D=3DIop_And64 ? Xalu_A=
ND
-//.. : Xalu_XOR;
-//.. iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
-//.. addInstr(env, mk_iMOVsd_RR(xHi, tHi));
-//.. addInstr(env, mk_iMOVsd_RR(xLo, tLo));
-//.. iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
-//.. addInstr(env, X86Instr_Alu32R(op, X86RMI_Reg(yHi), tHi)=
);
-//.. addInstr(env, X86Instr_Alu32R(op, X86RMI_Reg(yLo), tLo)=
);
-//.. *rHi =3D tHi;
-//.. *rLo =3D tLo;
-//.. return;
-//.. }
-//..=20
+
+ /* Or64/And64/Xor64 */
+ case Iop_Or64:
+ case Iop_And64:
+ case Iop_Xor64: {
+ HReg xLo, xHi, yLo, yHi;
+ HReg tLo =3D newVRegI(env);
+ HReg tHi =3D newVRegI(env);
+ PPC32AluOp op =3D e->Iex.Binop.op=3D=3DIop_Or64 ? Palu_OR
+ : e->Iex.Binop.op=3D=3DIop_And64 ? Palu_AND
+ : Palu_XOR;
+ iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
+ addInstr(env, mk_iMOVds_RR(tHi, xHi));
+ addInstr(env, mk_iMOVds_RR(tLo, xLo));
+ iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
+ addInstr(env, PPC32Instr_Alu32(op, tHi, tHi, PPC32RH_Reg(yHi=
)));
+ addInstr(env, PPC32Instr_Alu32(op, tLo, tHi, PPC32RH_Reg(yLo=
)));
+ *rHi =3D tHi;
+ *rLo =3D tLo;
+ return;
+ }
+
//.. /* Add64/Sub64 */
//.. case Iop_Add64:
//.. case Iop_Sub64: {
@@ -2290,20 +2303,20 @@
return;
}
=20
-//.. /* could do better than this, but for now ... */
-//.. case Iop_1Sto64: {
-//.. HReg tLo =3D newVRegI(env);
-//.. HReg tHi =3D newVRegI(env);
-//.. X86CondCode cond =3D iselCondCode(env, e->Iex.Unop.arg)=
;
-//.. addInstr(env, X86Instr_Set32(cond,tLo));
-//.. addInstr(env, X86Instr_Sh32(Xsh_SHL, 31, X86RM_Reg(tLo)=
));
-//.. addInstr(env, X86Instr_Sh32(Xsh_SAR, 31, X86RM_Reg(tLo)=
));
-//.. addInstr(env, mk_iMOVsd_RR(tLo, tHi));
-//.. *rHi =3D tHi;
-//.. *rLo =3D tLo;
-//.. return;
-//.. }
-//..=20
+ /* could do better than this, but for now ... */
+ case Iop_1Sto64: {
+ HReg tLo =3D newVRegI(env);
+ HReg tHi =3D newVRegI(env);
+ PPC32CondCode cond =3D iselCondCode(env, e->Iex.Unop.arg);
+ addInstr(env, PPC32Instr_Set32(cond,tLo));
+ addInstr(env, PPC32Instr_Alu32(Palu_SHL, tLo, tLo, PPC32RH_I=
mm(False,31)));
+ addInstr(env, PPC32Instr_Alu32(Palu_SAR, tLo, tLo, PPC32RH_I=
mm(False,31)));
+ addInstr(env, mk_iMOVds_RR(tHi, tLo));
+ *rHi =3D tHi;
+ *rLo =3D tLo;
+ return;
+ }
+
//.. /* Not64(e) */
//.. case Iop_Not64: {
//.. HReg tLo =3D newVRegI(env);
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