|
From: <sv...@va...> - 2005-06-29 19:05:13
|
Author: cerion
Date: 2005-06-29 20:05:08 +0100 (Wed, 29 Jun 2005)
New Revision: 1232
Log:
We have more than 59 allocateable regs now (duh)
+ Better insn printout for altivec load/store
Modified:
trunk/priv/host-ppc32/hdefs.c
Modified: trunk/priv/host-ppc32/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc32/hdefs.c 2005-06-29 19:01:32 UTC (rev 1231)
+++ trunk/priv/host-ppc32/hdefs.c 2005-06-29 19:05:08 UTC (rev 1232)
@@ -181,7 +181,7 @@
void getAllocableRegs_PPC32 ( Int* nregs, HReg** arr )
{
UInt i=3D0;
- *nregs =3D 59;
+ *nregs =3D 90;
*arr =3D LibVEX_Alloc(*nregs * sizeof(HReg));
// GPR0 =3D scratch reg where possible - some ops interpret as value =
zero
// GPR1 =3D stack pointer
@@ -281,6 +281,8 @@
(*arr)[i++] =3D hregPPC32_VR29();
(*arr)[i++] =3D hregPPC32_VR30();
(*arr)[i++] =3D hregPPC32_VR31();
+
+ vassert(i =3D=3D *nregs);
}
=20
=20
@@ -1227,21 +1229,21 @@
case Pin_AvLdSt: {
UChar sz =3D i->Pin.AvLdSt.sz;
if (i->Pin.AvLdSt.addr->tag =3D=3D Pam_IR) {
- vex_printf("{ ");
ppLoadImm(hregPPC32_GPR30(), i->Pin.AvLdSt.addr->Pam.RR.index);
- vex_printf(" }");
+ vex_printf(" ; ");
}
- if (i->Pin.AvLdSt.isLoad) {
+ if (i->Pin.AvLdSt.isLoad)
vex_printf("lv%sx ", sz=3D=3D8 ? "eb" : sz=3D=3D16 ? "eh" : sz=3D=
=3D32 ? "ew" : "");
- ppHRegPPC32(i->Pin.AvLdSt.reg);
- vex_printf(",");
- ppPPC32AMode(i->Pin.AvLdSt.addr);
- } else {
+ else
vex_printf("stv%sx ", sz=3D=3D8 ? "eb" : sz=3D=3D16 ? "eh" : sz=
=3D=3D32 ? "ew" : "");
- ppHRegPPC32(i->Pin.AvLdSt.reg);
- vex_printf(",");
- ppPPC32AMode(i->Pin.AvLdSt.addr);
- }
+ ppHRegPPC32(i->Pin.AvLdSt.reg);
+ vex_printf(",");
+ if (i->Pin.AvLdSt.addr->tag =3D=3D Pam_IR)
+ vex_printf("%%r30");
+ else=20
+ ppHRegPPC32(i->Pin.AvLdSt.addr->Pam.RR.index);
+ vex_printf(",");
+ ppHRegPPC32(i->Pin.AvLdSt.addr->Pam.RR.base);
return;
}
case Pin_AvUnary:
|