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From: <sv...@va...> - 2005-05-06 11:50:23
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Author: sewardj
Date: 2005-05-06 12:50:13 +0100 (Fri, 06 May 2005)
New Revision: 1166
Modified:
trunk/priv/guest-amd64/toIR.c
Log:
Make some more x87 instructions work.
Modified: trunk/priv/guest-amd64/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-amd64/toIR.c 2005-05-06 01:43:56 UTC (rev 1165)
+++ trunk/priv/guest-amd64/toIR.c 2005-05-06 11:50:13 UTC (rev 1166)
@@ -4264,37 +4264,37 @@
//.. {
//.. put_C3210( binop(Iop_And32, get_C3210(), mkU32(~X86G_FC_MASK_C2)=
) );
//.. }
-//..=20
-//..=20
-//.. /* ------------------------------------------------------- */
-//.. /* Given all that stack-mangling junk, we can now go ahead
-//.. and describe FP instructions.=20
-//.. */
-//..=20
-//.. /* ST(0) =3D ST(0) `op` mem64/32(addr)
-//.. Need to check ST(0)'s tag on read, but not on write.
-//.. */
-//.. static
-//.. void fp_do_op_mem_ST_0 ( IRTemp addr, UChar* op_txt, UChar* dis_buf=
,=20
-//.. IROp op, Bool dbl )
-//.. {
-//.. DIP("f%s%c %s\n", op_txt, dbl?'l':'s', dis_buf);
-//.. if (dbl) {
-//.. put_ST_UNCHECKED(0,=20
-//.. binop( op,=20
-//.. get_ST(0),=20
-//.. loadLE(Ity_F64,mkexpr(addr))
-//.. ));
-//.. } else {
-//.. put_ST_UNCHECKED(0,=20
-//.. binop( op,=20
-//.. get_ST(0),=20
-//.. unop(Iop_F32toF64, loadLE(Ity_F32,mkexpr(addr)))
-//.. ));
-//.. }
-//.. }
=20
=20
+/* ------------------------------------------------------- */
+/* Given all that stack-mangling junk, we can now go ahead
+ and describe FP instructions.=20
+*/
+
+/* ST(0) =3D ST(0) `op` mem64/32(addr)
+ Need to check ST(0)'s tag on read, but not on write.
+*/
+static
+void fp_do_op_mem_ST_0 ( IRTemp addr, UChar* op_txt, UChar* dis_buf,=20
+ IROp op, Bool dbl )
+{
+ DIP("f%s%c %s\n", op_txt, dbl?'l':'s', dis_buf);
+ if (dbl) {
+ put_ST_UNCHECKED(0,=20
+ binop( op,=20
+ get_ST(0),=20
+ loadLE(Ity_F64,mkexpr(addr))
+ ));
+ } else {
+ put_ST_UNCHECKED(0,=20
+ binop( op,=20
+ get_ST(0),=20
+ unop(Iop_F32toF64, loadLE(Ity_F32,mkexpr(addr)))
+ ));
+ }
+}
+
+
/* ST(0) =3D mem64/32(addr) `op` ST(0)
Need to check ST(0)'s tag on read, but not on write.
*/
@@ -4401,10 +4401,10 @@
=20
switch (gregLO3ofRM(modrm)) {
=20
-//.. case 0: /* FADD single-real */
-//.. fp_do_op_mem_ST_0 ( addr, "add", dis_buf, Iop_AddF64=
, False );
-//.. break;
-//..=20
+ case 0: /* FADD single-real */
+ fp_do_op_mem_ST_0 ( addr, "add", dis_buf, Iop_AddF64, Fal=
se );
+ break;
+
//.. case 1: /* FMUL single-real */
//.. fp_do_op_mem_ST_0 ( addr, "mul", dis_buf, Iop_MulF64=
, False );
//.. break;
@@ -4516,9 +4516,9 @@
fp_do_op_ST_ST ( "div", Iop_DivF64, modrm - 0xF0, 0, Fals=
e );
break;
=20
-//.. case 0xF8 ... 0xFF: /* FDIVR %st(?),%st(0) */
-//.. fp_do_oprev_ST_ST ( "divr", Iop_DivF64, modrm - 0xF8=
, 0, False );
-//.. break;
+ case 0xF8 ... 0xFF: /* FDIVR %st(?),%st(0) */
+ fp_do_oprev_ST_ST ( "divr", Iop_DivF64, modrm - 0xF8, 0, =
False );
+ break;
=20
default:
goto decode_fail;
@@ -5007,15 +5007,15 @@
delta++;
switch (modrm) {
=20
-//.. case 0xC0 ... 0xC7: /* FCMOVB ST(i), ST(0) */
-//.. r_src =3D (UInt)modrm - 0xC0;
-//.. DIP("fcmovb %%st(%d), %%st(0)\n", r_src);
-//.. put_ST_UNCHECKED(0,=20
-//.. IRExpr_Mux0X(=20
-//.. unop(Iop_1Uto8,
-//.. mk_x86g_calculate_conditio=
n(X86CondB)),=20
-//.. get_ST(0), get_ST(r_src)) );
-//.. break;
+ case 0xC0 ... 0xC7: /* FCMOVB ST(i), ST(0) */
+ r_src =3D (UInt)modrm - 0xC0;
+ DIP("fcmovb %%st(%d), %%st(0)\n", r_src);
+ put_ST_UNCHECKED(0,=20
+ IRExpr_Mux0X(=20
+ unop(Iop_1Uto8,
+ mk_amd64g_calculate_condition(A=
MD64CondB)),=20
+ get_ST(0), get_ST(r_src)) );
+ break;
=20
case 0xC8 ... 0xCF: /* FCMOVE(Z) ST(i), ST(0) */
r_src =3D (UInt)modrm - 0xC8;
@@ -5155,15 +5155,15 @@
delta++;
switch (modrm) {
=20
-//.. case 0xC0 ... 0xC7: /* FCMOVNB ST(i), ST(0) */
-//.. r_src =3D (UInt)modrm - 0xC0;
-//.. DIP("fcmovnb %%st(%d), %%st(0)\n", r_src);
-//.. put_ST_UNCHECKED(0,=20
-//.. IRExpr_Mux0X(=20
-//.. unop(Iop_1Uto8,
-//.. mk_x86g_calculate_conditio=
n(X86CondNB)),=20
-//.. get_ST(0), get_ST(r_src)) );
-//.. break;
+ case 0xC0 ... 0xC7: /* FCMOVNB ST(i), ST(0) */
+ r_src =3D (UInt)modrm - 0xC0;
+ DIP("fcmovnb %%st(%d), %%st(0)\n", r_src);
+ put_ST_UNCHECKED(0,=20
+ IRExpr_Mux0X(=20
+ unop(Iop_1Uto8,
+ mk_amd64g_calculate_condition(A=
MD64CondNB)),=20
+ get_ST(0), get_ST(r_src)) );
+ break;
=20
case 0xC8 ... 0xCF: /* FCMOVNE(NZ) ST(i), ST(0) */
r_src =3D (UInt)modrm - 0xC8;
@@ -5241,9 +5241,9 @@
fp_do_ucomi_ST0_STi( (UInt)modrm - 0xE8, False );
break;
=20
-//.. case 0xF0 ... 0xF7: /* FCOMI %st(0),%st(?) */
-//.. fp_do_ucomi_ST0_STi( (UInt)modrm - 0xF0, False );
-//.. break;
+ case 0xF0 ... 0xF7: /* FCOMI %st(0),%st(?) */
+ fp_do_ucomi_ST0_STi( (UInt)modrm - 0xF0, False );
+ break;
=20
default:
goto decode_fail;
@@ -5755,10 +5755,10 @@
fp_do_ucomi_ST0_STi( (UInt)modrm - 0xE8, True );
break;
=20
-//.. case 0xF0 ... 0xF7: /* FCOMIP %st(0),%st(?) */
-//.. /* not really right since COMIP !=3D UCOMIP */
-//.. fp_do_ucomi_ST0_STi( (UInt)modrm - 0xF0, True );
-//.. break;
+ case 0xF0 ... 0xF7: /* FCOMIP %st(0),%st(?) */
+ /* not really right since COMIP !=3D UCOMIP */
+ fp_do_ucomi_ST0_STi( (UInt)modrm - 0xF0, True );
+ break;
=20
default:=20
goto decode_fail;
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