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From: <sv...@va...> - 2005-04-24 00:26:41
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Author: sewardj
Date: 2005-04-24 01:26:37 +0100 (Sun, 24 Apr 2005)
New Revision: 1139
Modified:
trunk/priv/host-amd64/isel.c
Log:
Handle a couple more memcheck-generated primops. With this, I can run
konqueror on memcheck on amd64.
Modified: trunk/priv/host-amd64/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/isel.c 2005-04-23 23:41:46 UTC (rev 1138)
+++ trunk/priv/host-amd64/isel.c 2005-04-24 00:26:37 UTC (rev 1139)
@@ -991,31 +991,20 @@
return hi16;
}
=20
-//.. if (e->Iex.Binop.op =3D=3D Iop_8HLto16) {
-//.. HReg hi8 =3D newVRegI(env);
-//.. HReg lo8 =3D newVRegI(env);
-//.. HReg hi8s =3D iselIntExpr_R(env, e->Iex.Binop.arg1);
-//.. HReg lo8s =3D iselIntExpr_R(env, e->Iex.Binop.arg2);
-//.. addInstr(env, mk_iMOVsd_RR(hi8s, hi8));
-//.. addInstr(env, mk_iMOVsd_RR(lo8s, lo8));
-//.. addInstr(env, X86Instr_Sh32(Xsh_SHL, 8, X86RM_Reg(hi8)));
-//.. addInstr(env, X86Instr_Alu32R(Xalu_AND, X86RMI_Imm(0xFF), =
lo8));
-//.. addInstr(env, X86Instr_Alu32R(Xalu_OR, X86RMI_Reg(lo8), hi=
8));
-//.. return hi8;
-//.. }
-//..=20
-//.. if (e->Iex.Binop.op =3D=3D Iop_16HLto32) {
-//.. HReg hi16 =3D newVRegI(env);
-//.. HReg lo16 =3D newVRegI(env);
-//.. HReg hi16s =3D iselIntExpr_R(env, e->Iex.Binop.arg1);
-//.. HReg lo16s =3D iselIntExpr_R(env, e->Iex.Binop.arg2);
-//.. addInstr(env, mk_iMOVsd_RR(hi16s, hi16));
-//.. addInstr(env, mk_iMOVsd_RR(lo16s, lo16));
-//.. addInstr(env, X86Instr_Sh32(Xsh_SHL, 16, X86RM_Reg(hi16)))=
;
-//.. addInstr(env, X86Instr_Alu32R(Xalu_AND, X86RMI_Imm(0xFFFF)=
, lo16));
-//.. addInstr(env, X86Instr_Alu32R(Xalu_OR, X86RMI_Reg(lo16), h=
i16));
-//.. return hi16;
-//.. }
+ if (e->Iex.Binop.op =3D=3D Iop_8HLto16) {
+ HReg hi8 =3D newVRegI(env);
+ HReg lo8 =3D newVRegI(env);
+ HReg hi8s =3D iselIntExpr_R(env, e->Iex.Binop.arg1);
+ HReg lo8s =3D iselIntExpr_R(env, e->Iex.Binop.arg2);
+ addInstr(env, mk_iMOVsd_RR(hi8s, hi8));
+ addInstr(env, mk_iMOVsd_RR(lo8s, lo8));
+ addInstr(env, AMD64Instr_Sh64(Ash_SHL, 8, AMD64RM_Reg(hi8)));
+ addInstr(env, AMD64Instr_Alu64R(
+ Aalu_AND, AMD64RMI_Imm(0xFF), lo8));
+ addInstr(env, AMD64Instr_Alu64R(
+ Aalu_OR, AMD64RMI_Reg(lo8), hi8));
+ return hi8;
+ }
=20
if (e->Iex.Binop.op =3D=3D Iop_MullS32
|| e->Iex.Binop.op =3D=3D Iop_MullS16
@@ -1282,7 +1271,7 @@
addInstr(env, AMD64Instr_Set64(cond,dst));
return dst;
}
-//.. case Iop_1Sto8:
+ case Iop_1Sto8:
case Iop_1Sto16:
case Iop_1Sto32:
case Iop_1Sto64: {
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