================================================= ./valgrind-new/drd/tests/pth_barrier_thr_cr.stderr.diff ================================================= --- pth_barrier_thr_cr.stderr.exp 2014-09-08 03:36:37.318466747 +0100 +++ pth_barrier_thr_cr.stderr.out 2014-09-08 03:51:47.444034935 +0100 @@ -1,4 +1,15 @@ +Thread 36: +Number of concurrent pthread_barrier_wait() calls exceeds the barrier count: barrier 0x........ + at 0x........: pthread_barrier_wait (drd_pthread_intercepts.c:?) + by 0x........: thread (pth_barrier_thr_cr.c:?) + by 0x........: vgDrd_thread_wrapper (drd_pthread_intercepts.c:?) + by 0x........: (within libpthread-?.?.so) + by 0x........: clone (in /...libc...) +barrier 0x........ was first observed at: + at 0x........: pthread_barrier_init (drd_pthread_intercepts.c:?) + by 0x........: main (pth_barrier_thr_cr.c:?) + Done. -ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0) +ERROR SUMMARY: 6 errors from 1 contexts (suppressed: 0 from 0) ================================================= ./valgrind-new/drd/tests/std_thread2.stderr.diff ================================================= --- std_thread2.stderr.exp 2014-09-08 03:36:37.333466458 +0100 +++ std_thread2.stderr.out 2014-09-08 03:53:32.167045054 +0100 @@ -1,4 +1,9 @@ +Conflicting store by thread 1 at 0x........ size 4 + at 0x........: allocate_stack (allocatestack.c:?) + by 0x........: pthread_create@@GLIBC_2.2.5(within libpthread-?.?.so) +Allocation context: BSS section of libc-2.14.1.so + Thread 2: Conflicting store by thread 2 at 0x........ size 4 at 0x........: main::{lambda()#1}::operator()() const (std_thread2.cpp:21) @@ -6,4 +11,4 @@ Done. -ERROR SUMMARY: 1 errors from 1 contexts (suppressed: 0 from 0) +ERROR SUMMARY: 2 errors from 2 contexts (suppressed: 0 from 0) ================================================= ./valgrind-old/cachegrind/tests/chdir.stderr.diff ================================================= --- chdir.stderr.exp 2014-09-08 03:17:43.464441469 +0100 +++ chdir.stderr.out 2014-09-08 03:27:36.457935009 +0100 @@ -1,4 +1,6 @@ +warning: specified LL cache: line_size 64 assoc 16 total_size 12,582,912 +warning: simulated LL cache: line_size 64 assoc 24 total_size 12,582,912 I refs: I1 misses: ================================================= ./valgrind-old/cachegrind/tests/clreq.stderr.diff ================================================= --- clreq.stderr.exp 2014-09-08 03:17:43.465441449 +0100 +++ clreq.stderr.out 2014-09-08 03:27:36.744929425 +0100 @@ -0,0 +1,2 @@ +warning: specified LL cache: line_size 64 assoc 16 total_size 12,582,912 +warning: simulated LL cache: line_size 64 assoc 24 total_size 12,582,912 ================================================= ./valgrind-old/cachegrind/tests/dlclose.stderr.diff ================================================= --- dlclose.stderr.exp 2014-09-08 03:17:43.464441469 +0100 +++ dlclose.stderr.out 2014-09-08 03:27:37.102922459 +0100 @@ -1,4 +1,6 @@ +warning: specified LL cache: line_size 64 assoc 16 total_size 12,582,912 +warning: simulated LL cache: line_size 64 assoc 24 total_size 12,582,912 I refs: I1 misses: ================================================= ./valgrind-old/cachegrind/tests/notpower2.stderr.diff ================================================= --- notpower2.stderr.exp 2014-09-08 03:17:43.465441449 +0100 +++ notpower2.stderr.out 2014-09-08 03:27:37.418916310 +0100 @@ -1,4 +1,6 @@ +warning: specified LL cache: line_size 64 assoc 16 total_size 12,582,912 +warning: simulated LL cache: line_size 64 assoc 24 total_size 12,582,912 I refs: I1 misses: ================================================= ./valgrind-old/cachegrind/tests/wrap5.stderr.diff ================================================= --- wrap5.stderr.exp 2014-09-08 03:17:43.465441449 +0100 +++ wrap5.stderr.out 2014-09-08 03:27:37.786909150 +0100 @@ -1,4 +1,6 @@ +warning: specified LL cache: line_size 64 assoc 16 total_size 12,582,912 +warning: simulated LL cache: line_size 64 assoc 24 total_size 12,582,912 I refs: I1 misses: ================================================= ./valgrind-old/cachegrind/tests/x86/fpu-28-108.stderr.diff ================================================= --- fpu-28-108.stderr.exp 2014-09-08 03:17:43.390442900 +0100 +++ fpu-28-108.stderr.out 2014-09-08 03:27:38.056903896 +0100 @@ -1,4 +1,6 @@ +warning: specified LL cache: line_size 64 assoc 16 total_size 12,582,912 +warning: simulated LL cache: line_size 64 assoc 24 total_size 12,582,912 I refs: I1 misses: ================================================= ./valgrind-old/callgrind/tests/notpower2-hwpref.stderr.diff ================================================= --- notpower2-hwpref.stderr.exp 2014-09-08 03:17:43.200446577 +0100 +++ notpower2-hwpref.stderr.out 2014-09-08 03:27:38.651892319 +0100 @@ -1,4 +1,6 @@ +warning: specified LL cache: line_size 64 assoc 16 total_size 12,582,912 +warning: simulated LL cache: line_size 64 assoc 24 total_size 12,582,912 Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw Collected : ================================================= ./valgrind-old/callgrind/tests/notpower2.stderr.diff ================================================= --- notpower2.stderr.exp 2014-09-08 03:17:43.200446577 +0100 +++ notpower2.stderr.out 2014-09-08 03:27:39.602873815 +0100 @@ -1,4 +1,6 @@ +warning: specified LL cache: line_size 64 assoc 16 total_size 12,582,912 +warning: simulated LL cache: line_size 64 assoc 24 total_size 12,582,912 Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw Collected : ================================================= ./valgrind-old/callgrind/tests/notpower2-use.stderr.diff ================================================= --- notpower2-use.stderr.exp 2014-09-08 03:17:43.200446577 +0100 +++ notpower2-use.stderr.out 2014-09-08 03:27:38.994885645 +0100 @@ -1,4 +1,6 @@ +warning: specified LL cache: line_size 64 assoc 16 total_size 12,582,912 +warning: simulated LL cache: line_size 64 assoc 24 total_size 12,582,912 Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw AcCost1 SpLoss1 AcCost2 SpLoss2 Collected : ================================================= ./valgrind-old/callgrind/tests/notpower2-wb.stderr.diff ================================================= --- notpower2-wb.stderr.exp 2014-09-08 03:17:43.199446596 +0100 +++ notpower2-wb.stderr.out 2014-09-08 03:27:39.281880061 +0100 @@ -1,4 +1,6 @@ +warning: specified LL cache: line_size 64 assoc 16 total_size 12,582,912 +warning: simulated LL cache: line_size 64 assoc 24 total_size 12,582,912 Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw ILdmr DLdmr DLdmw Collected : ================================================= ./valgrind-old/callgrind/tests/simwork1.stderr.diff ================================================= --- simwork1.stderr.exp 2014-09-08 03:17:43.199446596 +0100 +++ simwork1.stderr.out 2014-09-08 03:27:41.731832389 +0100 @@ -1,4 +1,6 @@ +warning: specified LL cache: line_size 64 assoc 16 total_size 12,582,912 +warning: simulated LL cache: line_size 64 assoc 24 total_size 12,582,912 Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw Collected : ================================================= ./valgrind-old/callgrind/tests/simwork2.stderr.diff ================================================= --- simwork2.stderr.exp 2014-09-08 03:17:43.201446557 +0100 +++ simwork2.stderr.out 2014-09-08 03:27:42.309821143 +0100 @@ -1,4 +1,6 @@ +warning: specified LL cache: line_size 64 assoc 16 total_size 12,582,912 +warning: simulated LL cache: line_size 64 assoc 24 total_size 12,582,912 Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw ILdmr DLdmr DLdmw Collected : ================================================= ./valgrind-old/callgrind/tests/simwork3.stderr.diff ================================================= --- simwork3.stderr.exp 2014-09-08 03:17:43.199446596 +0100 +++ simwork3.stderr.out 2014-09-08 03:27:43.035807017 +0100 @@ -1,4 +1,6 @@ +warning: specified LL cache: line_size 64 assoc 16 total_size 12,582,912 +warning: simulated LL cache: line_size 64 assoc 24 total_size 12,582,912 Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw AcCost1 SpLoss1 AcCost2 SpLoss2 Collected : ================================================= ./valgrind-old/callgrind/tests/simwork-both.stderr.diff ================================================= --- simwork-both.stderr.exp 2014-09-08 03:17:43.200446577 +0100 +++ simwork-both.stderr.out 2014-09-08 03:27:40.194862296 +0100 @@ -1,4 +1,6 @@ +warning: specified LL cache: line_size 64 assoc 16 total_size 12,582,912 +warning: simulated LL cache: line_size 64 assoc 24 total_size 12,582,912 Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw Bc Bcm Bi Bim Collected : ================================================= ./valgrind-old/callgrind/tests/simwork-cache.stderr.diff ================================================= --- simwork-cache.stderr.exp 2014-09-08 03:17:43.198446615 +0100 +++ simwork-cache.stderr.out 2014-09-08 03:27:41.123844220 +0100 @@ -1,4 +1,6 @@ +warning: specified LL cache: line_size 64 assoc 16 total_size 12,582,912 +warning: simulated LL cache: line_size 64 assoc 24 total_size 12,582,912 Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw Collected : ================================================= ./valgrind-old/callgrind/tests/threads-use.stderr.diff ================================================= --- threads-use.stderr.exp 2014-09-08 03:17:43.200446577 +0100 +++ threads-use.stderr.out 2014-09-08 03:27:45.311762731 +0100 @@ -1,4 +1,6 @@ +warning: specified LL cache: line_size 64 assoc 16 total_size 12,582,912 +warning: simulated LL cache: line_size 64 assoc 24 total_size 12,582,912 Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw AcCost1 SpLoss1 AcCost2 SpLoss2 Ge sysCount sysTime Collected :