I've been toying with the idea of implementing virtual I/O port memory
for UML. This would enable UML modules and processes to use the out/in
instructions just like ones on the host to access virtual soft-devices
which could be running as processes on the host (eg. virtual serial/
This would involve:
1) Sharing a page or so of memory between a host process and UML and
using it as I/O port memory inside UML
2) Trapping in/out instructions in the UML segv handler and changing
them to nops (after gaining write permission to the process text) and
mapping the instructions to mov's that write to the portmem (or outs
that write to real portmem if UML is running as root).
3) Implementing the ioperm, iopl syscalls in UML.
Besides portmem, this could also be used to transform other ring1/2
operations to work inside the UML kernel...
Or is there an easier/existing way of doing it?
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