#35 Timeout in amdstatus() too small
While working on a performance enhanced bus driver for FPGAs, I found that the timeout value used in amd.c/amdstatus() is too small. Erasing worked well with the jopcyc driver (performs bit-banging of the flash signals via BSR) but fails for the jmem driver (single-cycle, optimized for scan length).
In fact the timeout value of 100 when multiplied by usec(100) ensures a timeout of 10ms (or maybe more) which seems to time out too early when the delay of the bus driver is reduced significantly. The erase for my flash chip (Am29LV040B) requires 700ms max.
Solution: The timeout value should cover the maximum processing time of erase/write/whatever under best case timing. I.e. the value should be at least 7000 for the Am29LV040B. Other chips might require higher values for certain operations.
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Applied the described modification in r986.