Activity for Universal JTAG library, server and tools
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Andrew J Himelstieb posted a comment on discussion Using UrJTAG
Hello, I just wanted to touch base with the community and say that I have been using UrJTAG since 2010, and even added the program to the Fedora Linux Repositories. I'm in the process of adding a submission for UrJTAG to the Free Software Foundation's FSD or Free Software Directory. Using scancode and looking through the program's files, it looks like UrJTAG is in fact Free Software and uses a compatible License that fits within the 4 fundamental freedoms to be considered Free Software (Free as in...
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cagezor posted a comment on discussion Using UrJTAG
I have tested this and can confirm the 512 + gpio pin number works. Thank you for providing this invaluable information!
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Rtek1000 modified a comment on discussion Using UrJTAG
Hello, After much research, I was able to find the reason why jtag was unable to operate the computer's native parallel port (address 0x378). When running jtag with sudo, the error stopped occurring. user> sudo jtag jtag> cable DLC5 parallel 0x378 Ref.: https://urjtag.sourceforge.io/book/_jtag_commands.html I found something about adding the user to the group that has access to the parallel port, I don't know if it works with the cable init option above: Steps to Access a Parallel Port Accessing...
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Hello, After much research, I was able to find the reason why jtag was unable to operate the computer's native parallel port (address 0x378). When running jtag with sudo, the error stopped occurring. user> sudo jtag jtag> cable DLC5 parallel 0x378 Ref.: https://urjtag.sourceforge.io/book/_jtag_commands.html I found something about adding the user to the group that has access to the parallel port, I don't know if it works with the boot option above: Steps to Access a Parallel Port Accessing the parallel...
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Hello, I haven't confirmed yet, but it's possible that the pins have to be numbered with an offset of 512 (in the current version of Linux). Without an offset, an error is occurring in the jtag when trying to initialize the cable via gpio: jtag> cable gpio tdo=9 tdi=10 tck=11 tms=25 But using offset, no error occurs: cable gpio tdo=521 tdi=522 tck=523 tms=537 However, before initializing the jtag program, it is necessary to export the gpio pins: pi> echo 521 > /sys/class/gpio/export pi> echo 522...
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SuperJens created merge request #11 on Git
Fix frequency for dirtyjtag, build fix, new devices
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Arnim Läuger posted a comment on discussion Using UrJTAG
Hi, I have an extension for 1149.6 working with Xilinx BSDLs. It doesn't extract any extra information and just parses through the package file. I'll submit a patch soon.
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thinking2loud posted a comment on discussion Using UrJTAG
Hello, this subject has come up occasionally in various old threads, has anybody got the package file for IEEE 1149.6 (added a STD_1149_6_2003) to read into UrJTAG? Lots of stuff now calls for it. I have more than one BSDL file that works fine except for I have to comment out all 1149.6 junk so it will parse--don't need to actually use it.
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Geert Stappers posted a comment on discussion Using UrJTAG
On Tue, Feb 11, 2025 at 11:21:54AM -0000, kennedy cheskaki wrote: ... move the project to github so that issues can be solved easily Prove it
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kennedy cheskaki posted a comment on discussion Using UrJTAG
I doubt this will work on windows, esp due to the drivers. But on linux i'm also looking for the flags to enable dirtyjtag, they should move the project to github so that issues can be solved easily
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I doubt this will work on windows, esp due to the drivers. But on linux i'm also looking for the flags to enable dirtyjtag, they should move the project to github so that issues can be solved easily
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How to enable the dirtyjtag interface in compilation, I can't see how to enable this in the documatation.
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PetrolHead modified a comment on discussion Using UrJTAG
Im a total newbiee. But I cant get it to work on any of those platforms. I get missing dll's, and when I got those dll's ot dont start. I have no idea to get it started. Best Regards Conny
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Im a total newbiee. But I cant get it to work on any of those platforms. I get missing dll's, and when I got those dll's ot dont start. I have no idea to get it started. Best Regards Conny
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Hello, Unlike the sh7750, the sh7269 responded to the detect command and I was able to create the files, drivers for pins and bus, but I have some doubts. 1- Pin CS4 is shared with pin A22. But when trying to initialize the bus (initbus sh7269), it is requesting pin CS4 (which I did not declare on purpose). How can I get around this? 2- The file /bus/sh7727.c has hexadecimal addresses. Do these reference the memory map? Where can I find them?
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I couldn't make any more progress, I don't think it's actually possible to add this model.
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Hello, I found a post about adding support for SH7709S (SH3) to the old JTAG (before UrJTAG), and I managed to get it working with UrJTAG together with an Altera USB Blaster interface. The post is in Japanese, but Google managed to translate it well (pdf attached). http://www.mizore.jp/hoso/jtag/jtagtool.html I need to access the flash memory of the SH7750S (SH4). I have already managed to access the memory of the SH7709S (SH3). I tried to create a driver file for the sh7750, but it seems that the...
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Manuel F posted a comment on discussion Using UrJTAG
Hi Dave, I had the same problem. Probably there is a problem with the spaces in installation path. I installed it on C:\Users\<username>\urjtag and finally it worked. However the .exe is still not executable on my machine since libusb0.dll is missing. Trying to fix this problem now :P Greetings Manuel</username>
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David wang modified a comment on discussion Using UrJTAG
Please help
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Please help
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Asger Gitz-Johansen posted a comment on merge request #10
Note that I have only tested memory dumping. Not flashing yet.
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Add AT32UC3C0512C MCU
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Alex posted a comment on discussion Using UrJTAG
Solved. need compilation with bsdl support
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Hi. all bsdl files i try to test fail to error for example ep2c5 of altera t@linux:~$ jtag UrJTAG 0.10 #2007 Copyright (C) 2002, 2003 ETC s.r.o. Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors UrJTAG is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under certain conditions. There is absolutely no warranty for UrJTAG. warning: UrJTAG may damage your hardware! Type "quit" to exit, "help" for help. jtag>...
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joe boney posted a comment on discussion Using UrJTAG
I am looking for latest windows binaries (compatible with dirtyjtag) If someone can attach I would be grateful, thanks in advance
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Chris created ticket #133
Makefile.am patch
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Frederico Wilhelms posted a comment on discussion Using UrJTAG
Don't know if this helps, But I found out that you must power on the board before issuing "detect"., And additionaly, you must supply a "bsdl path <bsdlfiledefinitions>" or generate/convert urjtag definitions of the chip .</bsdlfiledefinitions>
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Johnichan created ticket #138
dr command hex conversion is wrong
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Hey, I the problem was fixed by using version 2055. I used digilent HS3 successfully using the command "cable DigilentHS1 pid=0x6014 vid=0x403 interface=0"
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Hey, I the problem was fixed by using version 2055. I used digilent HS3 successfully using the command "cable DigilentHS1 pid=0x6014 vid=0x403 interface=0"
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https://sourceforge.net/p/urjtag/git/ci/c0770d4bb0638d838b0cbd946cc37195850e1f7c/ was the version digilent hs1.( Not #1502)
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Let me tell my background before getting into the issue. I am a hardware designer, occassionally get into BGA soldering issues, which i use urjtag to debug. I learned C code only for urjtag modifications and compile. I am not an expert in the same. Now I recently wanted to use a urjtag fordebugging a bga soldering issue and as in design side, i don't get professional DFT tools. I try to manage with urjtag or topjtag(Still trying to make it working in eval period). I got digilent HS1 cable and wanted...
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Bingo.. I installed PYFTDI just for driver and then run jtag on sudo Johnz@pi4bp2Ram4GB:/home $ sudo /usr/bin/jtag UrJTAG 0.10 #2007 Copyright (C) 2002, 2003 ETC s.r.o. Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors UrJTAG is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under certain conditions. There is absolutely no warranty for UrJTAG. warning: UrJTAG may damage your hardware! Type "quit" to exit,...
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libusb libftdi problem in rpi4b bookworm arm64
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Let me try Debian on a Pi before worrying toomuch about cygwin drivers
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Does not looks good even after fixing the above issue by changing config.guess from automake 11.7 & adding popt to the cygwin https://stackoverflow.com/questions/23210522/undefined-references-cygwin-posix-to-win32-path-list-and-cygwin-posix-to-win32 $ make Making all in admin make[1]: Entering directory '/cygdrive/f/urjtag/drvr/ioperm-0.4/admin' if gcc -DPACKAGE_NAME=\"ioperm\" -DPACKAGE_TARNAME=\"ioperm\" -DPACKAGE_VERSION=\"0.4\" -DPACKAGE_STRING=\"ioperm\ 0.4\" -DPACKAGE_BUGREPORT=\"\" -DPACKAGE=\"ioperm\"...
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Thanks for quick response. Thinking that ioperm is very old, I thought it will never considering ioperm is very old. Now it goes upto little more and waiting for checking the maximum length of command line arguments... Let me see it after an hour or a retry. I found the stackoverflow to use x86_64-unknown-linux-gnu $ ./configure --build=x86_64-unknown-linux-gnu checking for a BSD-compatible install... /usr/bin/install -c checking whether build environment is sane... yes checking for gawk... gawk...
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On Sun, Oct 29, 2023 at 09:53:09PM -0000, Johnichan wrote: config.guess timestamp = 2002-01-02 configure: error: cannot guess build type; you must specify one Feed that line to DuckDuckGo or whatever search aid you have.
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Tried IOPERM from openwince but failed config.guess timestamp = 2002-01-02 uname -m = x86_64 uname -r = 3.4.9-1.x86_64 uname -s = CYGWIN_NT-10.0-19045 uname -v = 2023-09-06 11:19 UTC /usr/bin/uname -p = unknown /bin/uname -X = hostinfo = /bin/universe = /usr/bin/arch -k = /bin/arch = x86_64 /usr/bin/oslevel = /usr/convex/getsysinfo = UNAME_MACHINE = x86_64 UNAME_RELEASE = 3.4.9-1.x86_64 UNAME_SYSTEM = CYGWIN_NT-10.0-19045 UNAME_VERSION = 2023-09-06 11:19 UTC configure: error: cannot guess build type;...
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It compiles to exe, but breaks for ioperm.
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cygwin64 is asking cygioperm which is not part of cygwin64
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luq posted a comment on discussion Using UrJTAG
hello everyone to community. i am also stuck to similar promblem with chip BCM5354 can anyone share its config/ steppings file so that i could add it urjtag for working properly. Moreover can anyone tell bcm5352 configurations can be used for bcm5354 and if yes can anyone share stepping file settings. can anyone tell how to install tjtag on linux
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xaiver posted a comment on discussion Using UrJTAG
Subject basically is the whole thing I need help with. I am on Kubuntu 22.04 and I can get UrJTAG to see the cable and the driver, but when running detect nothing happens.The Xilinx Spartan-6 XC6SLX9 is the main SoC for a Zebra QLn 320 that is having some firmware issues and I am trying to dump a working FW and flash it to the damaged board. It has a 20 pin ribbon port labeled JTAG which I have going to a FPC-20P board to then go to another board to go from 20P to 10P to go to the Altera USB Blaster....
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Evgeny Azov posted a comment on discussion Using UrJTAG
Hi all! Where can I find a library for Python 3? Who can share? Where download? How to compile ?
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Patrick posted a comment on discussion Using UrJTAG
Using the latest urjtag compiled from the 2021 tarfile in the repo, I'm trying to connect to the flash on an OMAP-L138 processor board. I have the BSDL file properly loaded, but trying to initialize a prototype bus using the pin names from the BSDL file is failing: jtag> initbus prototype amsb=EMAA23_MMCSD0CLK_GP47 alsb=EMAA0_GP50 dmsb=EMAD15_GP37 dlsb=EMAD0_GP48 ncs=EMACS2n_GP315 nwe=EMAWEn_GP311 noe=EMAOEn_GP310 error: invalid parameter: parameter we=<signal> or nwe=<signal> is not defined I get...
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rusirius posted a comment on discussion Using UrJTAG
Having just discovered it, I am new to urjtag. I see that it is compatible with my Olimex ARM-USB-OCD-H so thought it worth giving a try. I initially installed via apt, connected the Olimex to USB and ran jtag. I then typed: cable ARM-USB-OCD-H but got a message telling me that the interface was not found. I then tried: cable ARM-USB-OCD-H vid=0x15ba pid=0x002b driver=ftdi-mpsse0 but got the same message. I then removed the version from the repository with apt remove and then apt purge and proceeded...
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jede posted a comment on discussion Using UrJTAG
Hello, I have a problem with detect and urJtag, and i don't know how to by pass this behavior. I use Altera 7128SLC84 (PLCC84). Detection is OK for this CPLD in Quartus software but urJtag detect the wrong cpld, how can i bypass this from jtag command line :in order to get right cpld ? Output : jtag> cable UsbBlaster Connected to libftdi driver. jtag> detect longueur IR: 10 Longueur de la chaîne: 1 Device Id: 00000111000100101000000011011101 (0x071280DD) Manufacturier: Altera (0x0DD) Part(0): EPM7128AETC100...
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Looking forward to the result of the git bisect session.
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man git bisect
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Summer Franks posted a comment on discussion Using UrJTAG
Correct, and I would add that both behave identically when urjtag is built from git: no errors, no crashes, and no device found on detect.
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So both arex86_64. The working one has kernel version 5.4.0-126-generic, the not-yet-working system has version5.15.0-46-generic.
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old: Linux SummerManny410 5.4.0-126-generic #142-Ubuntu SMP Fri Aug 26 12:12:57 UTC 2022 x86_64 x86_64 x86_64 GNU/Linux -usb:2 description: USB controller product: 7 Series/C216 Chipset Family USB Enhanced Host Controller #1 vendor: Intel Corporation physical id: 1d bus info: pci@0000:00:1d.0 version: 04 width: 32 bits clock: 33MHz capabilities: pm debug ehci bus_master cap_list configuration: driver=ehci-pci latency=0 resources: irq:23 memory:f3939000-f39393ff -usbhost product: EHCI Host Controller...
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new: Linux trabajo 5.15.0-46-generic #49~20.04.1-Ubuntu SMP Thu Aug 4 19:15:44 UTC 2022 x86_64 x86_64 x86_64 GNU/Linux -usb description: USB controller product: 100 Series/C230 Series Chipset Family USB 3.0 xHCI Controller vendor: Intel Corporation physical id: 14 bus info: pci@0000:00:14.0 version: 31 width: 64 bits clock: 33MHz capabilities: pm msi xhci bus_master cap_list configuration: driver=xhci_hcd latency=0 resources: irq:127 memory:f1220000-f122ffff -usbhost:0 product: xHCI Host Controller...
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Built libusb-1.0.26, libftdi1-1.5 and urjtag from git on old laptop, same result as new laptop: jtag> cable ARM-USB-OCD Connected to libftdi driver. jtag> detect jtag>
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Information that I miss is output of uname -a from the old working system and the new non-working system.
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Program received signal SIGBUS, Bus error. urj_vhdl_lex (yylval_param=yylval_param@entry=0x7fffffffce58, yyscanner=yyscanner@entry=0x55555561ff80) at vhdl_flex.c:1474 1474 vhdl_flex.c: No such file or directory. (gdb)
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(core dump on detect that is, without the bsdl file I get a normal unknown mfr/device detect and the jtag> prompt returns)
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Follow-on problem: on the old working system, if I point urjtag at the appropriate bsdl file (T20Q144 attached; Efinix T20 fpga), I get a core-dump. So I don't have any solution for programming my fpga.
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I should also add that I have the dongle in the udev rules on both systems, and that on the working system the led stays green on detect, and on the non-working one it turns red/orange. I can't find any docs on the led, but I assume it's connected right to the FT2232L, it also turns red if you don't plug the usb cable in fully, but it is green on the working system and the non-working one until you run detect, so I suspect libftdi is doing something it doesn't like but I have no idea how to debug...
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Hello, I have verified I have working hardware with my old laptop (lenovoT430/mint20.3/libusb-0.1.12-32/libusb-1.0.23-2build1/libftdi1-0.20-4build8/urjtag0.10+r2007-1.2build2), Olimex ARM-USB-OCD dongle (FT2232L) and a known working Intel/Altera MAX10 fpga. No issues on this system. The problem is all my code & dev tools are on my new laptop (lenovo T460p) and I can't for the life of me get urjtag to work on it. If I install the system repos I get the same exact versions of things as my old system,...
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jamexp.y: rewrite grammar using precedences
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tests/stapl/jamexp_shrd: add tests for expressions
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Lizeth Gallegos posted a comment on discussion Using UrJTAG
Hi I have been trying to install your UrJTAG application and I realized that what I need is at least the version 2017.10 but it is only the version 0.10. I am trying from Windows Is there any way to attach those files to the application? How can I attach those folders?
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Add unit tests to exercise all productions of the grammar in src/stapl/jamexp.c
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tests/tap/{basic.h, basic.c, macros.h}: Add files from git://git.eyrie.org/devel/c-tap-harness.git
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Add GNU bison input file jamexp.y and unit test program for generated jamexp.c
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src/stapl/jamexp.c: instrument code to report shift/reduce actions
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Vladimir modified a comment on discussion Using UrJTAG
Hi Geert, Thank you for your reply once again. I guess it's my fault for not opening another topic, albeit related. The first issue I had was establishing the correct JTAG communication between UrJTAG, via the RPi to the target (my Linksys EA6900). Granted, it would have been easier to grab a working router and figuring this out. I have a dated Linksys 54G which would eliminate the software and RPi GPO. Nevertheless, I found the root cause to the problem. This model of router jas a hidden jumper...
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Hi Geert, Thank you for your reply once again. I guess it's my fault for not opening another topic, albeit related. The first issue I had was establishing the correct JTAG communication between UrJTAG, via the RPi to the target (my Linksys EA6900). Granted, it would have been easier to grab a working router and figuring this out. I have a dated Linksys 54G which would eliminate the software and RPi GPO. Nevertheless, I found the root cause to the problem. This model of router jas a hidden jumper...
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Hi Geert, Thank you for your reply once again. I guess it's my fault for not opening another topic, albeit related. The first issue I had was establishing the correct JTAG communication between UrJTAG, via the RPi to the target (my Linksys EA6900). Granted, it would have been easier to grab a working router and figuring this out. I have a dated Linksys 54G which would eliminate the software and RPi GPO. Nevertheless, I found the root cause to the problem. This model of router jas a hidden jumper...
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base address relates to memory map of CPU scan relates to JTAG AFAIK is there for devices no relation between position in the memory map and position in the JTAG chain. Take a known good configuration for verifying from which address to read, them use that information for writing. Vladimir, here no hard feelings that this is the third time to move away from unknown factors, just respond with sharing your success with us.
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Ok, forget al of the above! is there a way to discover the external (NAND) flash base address via JTAG for this router? I simply want to flash the cfe.bin file which I luckely have backed up before bricking the router. It seems that I have to give it a base address for the flash, but this I don't have. How can I scan for it?
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So as I said in my initial post, the chip (Broadcom BCM4708A0 (800 MHz, 2 cores) is an Advanced ARM® Cortex™-A9 Dual-Core CPU and so the ID 0x4ba00477 relates to (mfg: 0x23b (ARM Ltd), part: 0xba00, ver: 0x4) and two cores: bcm4708a0.cpu0: hardware has 1 breakpoints, 1 watchpoints bcm4708a0.cpu1: hardware has 1 breakpoints, 1 watchpoints that's all I know so far... so the question is... Does UrJTAG support the ARM cortex daps?
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Problem solved!! (well partially) I've managed to fix the reading of the JTAG and now I get this... pi@Development:~ $ sudo -E jtag UrJTAG 2021.03 #588887c0 Copyright (C) 2002, 2003 ETC s.r.o. Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors UrJTAG is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under certain conditions. There is absolutely no warranty for UrJTAG. warning: UrJTAG may damage your hardware!...
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Oops, that Help us of by reducing unknown factors. should been Help us all by reducing unknown factors.
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I got it down to 62999 then I tried 62500 and it went berzerk! Initializing GPIO JTAG Chain jtag> frequency 64000 Setting TCK frequency to 64000 Hz requested frequency 64000, now calibrating delay loop new real frequency 69602, delay 0 done jtag> frequency 63000 Setting TCK frequency to 63000 Hz jtag> frequency 63000 Setting TCK frequency to 63000 Hz jtag> frequency 62999 Setting TCK frequency to 62999 Hz jtag> frequency 62500 Setting TCK frequency to 62500 Hz requested frequency 62500, now calibrating...
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Ok, point taken and I'll start on another linksys router I have lying around. Meanwhile, I have one question. when I initiate the frequency command for a low frequency, UrJTAG goes into a frenzy and the only way to stop it is to do a "^C" pi@Development:~ $ sudo -E jtag UrJTAG 2021.03 #588887c0 Copyright (C) 2002, 2003 ETC s.r.o. Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors UrJTAG is free software, covered by the GNU General Public License, and you are welcome to change...
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Verify with a working device that your new JTAG tool is working correct. State explicite that After a whole lot of debugging, is done with a known working device. Help us of by reducing unknown factors.
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Thanks for your response, Geert! After a whole lot of debugging, I believe it's something to do with the RPi (gpio). It seems that the gpio's timing is the issue here. my start up script is as follows... pi@Development:~ $ cat .jtag/rc cable gpio tdo=9 tdi=10 tck=11 tms=25 # This is the layout on my Rpi 3b+ frequency 1200000 # Not sure what this refers to ? detect initbus ejtag # Commands to send "instruction IDCODE::shift ir::shift dr::dr" as a part of the startup script instruction IDCODE shift...
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Thanks for your response, Geert! After a whole lot of debugging, I believe it's something to do with the RPi (gpio). It seems that the gpio's timing is the issue here. my start up script is as follows... pi@Development:~ $ cat .jtag/rc cable gpio tdo=9 tdi=10 tck=11 tms=25 # This is the layout on my Rpi 3b+ frequency 1200000 # Not sure what this refers to ? detect initbus ejtag # Commands to send "instruction IDCODE::shift ir::shift dr::dr" as a part of the startup script instruction IDCODE shift...
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Verify with a working device that your new JTAG tool is working correct.
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Hi again, The next thing I tried was to do a discovery on the target and it didn't look right, either. pi@Development:~ $ sudo -E jtag UrJTAG 2021.03 #588887c0 Copyright (C) 2002, 2003 ETC s.r.o. Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors UrJTAG is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under certain conditions. There is absolutely no warranty for UrJTAG. warning: UrJTAG may damage your...
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I've managed to totally bricked my EA6900 router, to the point that I've lost the ability to communicate to the router via the serial interface. It seems that I've wiped out the CFE and my last resort, therefore, is replacing the CFE via JTAG. Luckily, I have backed up the CFE.bin file, so I believe that I can replace it back via JTAG. The issue is that there is little information on the SoC CPU in the router (bcm4708a0) The router details are as follows: CPU1: Broadcom BCM4708A0 (800 MHz, 2 cores)...
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I've managed to totally bricked my EA6900 router, to the point that I've lost the ability to communicate to the router via the serial interface. It seems that I've wiped out the CFE and my last resort, therefore, is replacing the CFE via JTAG. Luckily, I have backed up the CFE.bin file, so I believe that I can replace it back via JTAG. The issue is that there is little information on the SoC CPU in the router (bcm4708a0) The router details are as follows: CPU1: Broadcom BCM4708A0 (800 MHz, 2 cores)...
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Tomjal posted a comment on discussion Using UrJTAG
Anybody..
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Hi, I'm new to this, I just spent my whole 2 days learning JTAG and UrJtag, and at this point I'm very close to giving up but something inside of me is screaming "it's so close!" After 2 days, I finally managed to get my Lynx L22 connected to UrJtag with some problems left. Here's what I have: 1. UrJtag running in Ubuntu 2. Lynx L22 with bad firmware, it has 6 Pin Digilent JTAG port. it uses Xilinx XC18V02. 3. Altera USB Blaster - 10 pin port 4. Instruction file from the manufacturer (.VBS) 5. Firmware...
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Hi, I'm new to this, I just spent my whole 2 days learning JTAG and UrJtag, and at this point I'm very close to giving up but something inside of me is screaming "it's so close!" After 2 days, I finally managed to get my Lynx L22 connected to UrJtag with some problems left. Here's what I have: 1. UrJtag running in Ubuntu 2. Lynx L22 with bad firmware, it has 6 Pin Digilent JTAG port. it uses Xilinx XC18V02. 3. Altera USB Blaster - 10 pin port 4. Instruction file from the manufacturer (.VBS) 5. Firmware...
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Hi, I'm new to this, I just spent my whole 2 days learning JTAG and UrJtag, and at this point I'm very close to giving up but something inside of me is screaming "it's so close!" After 2 days, I finally managed to get my Lynx L22 connected to UrJtag with some problems left. Here's what I have: 1. UrJtag running in Ubuntu 2. Lynx L22 with bad firmware, it has 6 Pin Digilent JTAG port 3. Altera USB Blaster - 10 pin port 4. Instruction file from the manufacturer (.VBS) 5. Firmware files from manufacturer...
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gautaz posted a comment on discussion Using UrJTAG
Totally agree, that is precisely the reason why I wanted to get rid of the proprietary software :-).
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On Sun, May 22, 2022 at 07:25:38PM -0000, gautaz wrote: the manufacturer proprietary software is protected by a license that is now invalid. I have a valid USB token but as the license is deprecated, its a dead end for now. Yes, libre software does have advantages. Groeten Geert Stappers -- Silence is hard to parse
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Fair enough. In the meantime, I've hit another wall, the manufacturer proprietary software is protected by a license that is now invalid. I have a valid USB token but as the license is deprecated, it's a dead end for now.
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Fair enough. In the meantime, I've hit another wall, the manufacturer proprietary software is protected by a license that is now invalid. I have a valid USB token but as the license is deprecated, its a dead end for now.
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Hi @gautaz, I could not resist to ignore you. I did choose to ignore the "Is there any chance that UrJTAG might support this adapter?" question. The "Hope this isn't off topic for this discussion board" as responsed with something like *"it is OK to ask who joins me". Sorry for the confusion that it did trigger. Enjoy your JT 37x7 journey. Geert "silence is hard to parse" Stappers
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Hi @stappers, I am not sure about how to interpret your post, sorry. Who asked this valid question? As for anyone with the same hardware, I am in the process of trying to reverse engineer the protocol used by the manufacturer in its windows application (over USB for a start then perhaps over ethernet). This will probably take some time (currently installing windows XP VM, then manufacturer application, then wireshark to capture the USB coms).
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On Sun, May 22, 2022 at 02:25:02PM -0000, gautaz wrote: Hello everyone, ... JT 37x7 box ... Hope this isn't off topic for this discussion board, I did recieve the valid question of Who has the same hardware and wants to travell with me? Groeten Geert Stappers -- Silence is hard to parse
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I did recieve the valid question: Who has the same hardware and wants to travel with me?
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I did recieve the valid question: Who has the same hardware and want to travel with me?
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Hello everyone, A former employer of mine dumped a few boxes with these BSC some years ago and I scavenged one of these (https://www.jtag.com/product/jt-37x7-datablaster-usb-firewire-ethernet/). At this time I had no time to devote to this hardware so it was waiting silently in my basement. This weekend I wanted to hack a MIPS SoC which seems quite uncooperative and it reminded me of this JTAG adapter in my basement. I am quite new to JTAG (I am currently mostly documenting myself by reading things...
