[tuxdroid-svn] r559 - in firmware: fuxrf/trunk tuxrf/trunk
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[tuxdroid-svn] r559 - in firmware: fuxrf/trunk tuxrf/trunk
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From: jaguarondi <c2m...@c2...> - 2007-10-01 10:38:16
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Author: jaguarondi
Date: 2007-10-01 12:38:14 +0200 (Mon, 01 Oct 2007)
New Revision: 559
Modified:
firmware/fuxrf/trunk/bootloader.c
firmware/fuxrf/trunk/bootloader.h
firmware/fuxrf/trunk/defines.h
firmware/fuxrf/trunk/device.c
firmware/fuxrf/trunk/init.c
firmware/fuxrf/trunk/init.h
firmware/fuxrf/trunk/misc.c
firmware/fuxrf/trunk/misc.h
firmware/fuxrf/trunk/prot.c
firmware/fuxrf/trunk/prot.h
firmware/fuxrf/trunk/rf_ctrl.c
firmware/fuxrf/trunk/rf_ctrl.h
firmware/fuxrf/trunk/spi.c
firmware/fuxrf/trunk/varis.c
firmware/fuxrf/trunk/varis.h
firmware/tuxrf/trunk/bootloader.c
firmware/tuxrf/trunk/bootloader.h
firmware/tuxrf/trunk/defines.h
firmware/tuxrf/trunk/device.c
firmware/tuxrf/trunk/init.c
firmware/tuxrf/trunk/init.h
firmware/tuxrf/trunk/misc.c
firmware/tuxrf/trunk/misc.h
firmware/tuxrf/trunk/prot.c
firmware/tuxrf/trunk/prot.h
firmware/tuxrf/trunk/rf_ctrl.c
firmware/tuxrf/trunk/rf_ctrl.h
firmware/tuxrf/trunk/sleep.c
firmware/tuxrf/trunk/sleep.h
firmware/tuxrf/trunk/spi.c
firmware/tuxrf/trunk/varis.c
firmware/tuxrf/trunk/varis.h
firmware/tuxrf/trunk/version.h
Log:
* Reindented with:
indent -nut -i4 -bad -bap -sob -sc -bl -bli0 -cli0 -cbi4 -nce -ncdw -ss -bls
-npsl -ncs -npcs -nprs -saf -sai -saw -nbfda -nhnl -l80
Modified: firmware/fuxrf/trunk/bootloader.c
===================================================================
--- firmware/fuxrf/trunk/bootloader.c 2007-10-01 10:29:33 UTC (rev 558)
+++ firmware/fuxrf/trunk/bootloader.c 2007-10-01 10:38:14 UTC (rev 559)
@@ -29,23 +29,28 @@
TWCR = _BV(TWEA) | _BV(TWEN) | _BV(TWINT);
for (;;)
{
- i2cWaitForComplete(); /* wait the I2C address */
- if ((twStatus = TW_STATUS) != TW_SR_SLA_ACK) while(1);
+ i2cWaitForComplete(); /* wait the I2C address */
+ if ((twStatus = TW_STATUS) != TW_SR_SLA_ACK)
+ while (1) ;
TWCR = _BV(TWEA) | _BV(TWEN) | _BV(TWINT);
- i2cWaitForComplete(); /* wait the high byte of the page address */
- if ((twStatus = TW_STATUS) != TW_SR_DATA_ACK) while(1);
+ i2cWaitForComplete(); /* wait the high byte of the page address */
+ if ((twStatus = TW_STATUS) != TW_SR_DATA_ACK)
+ while (1) ;
pageAddress.b[1] = TWDR;
TWCR = _BV(TWEA) | _BV(TWEN) | _BV(TWINT);
- i2cWaitForComplete(); /* wait the low byte of the page address */
- if ((twStatus = TW_STATUS) != TW_SR_DATA_ACK) while(1);
+ i2cWaitForComplete(); /* wait the low byte of the page address */
+ if ((twStatus = TW_STATUS) != TW_SR_DATA_ACK)
+ while (1) ;
pageAddress.b[0] = TWDR;
- if (pageAddress.w & 0x003F) while(1); /* incorrect page address */
- if (pageAddress.w >= 0x0F00) while(1); /* don't overwrite the bootloader */
+ if (pageAddress.w & 0x003F)
+ while (1) ; /* incorrect page address */
+ if (pageAddress.w >= 0x0F00)
+ while (1) ; /* don't overwrite the bootloader */
address = pageAddress.w;
TWCR = _BV(TWEA) | _BV(TWEN) | _BV(TWINT);
- for (i=0; i<SPM_PAGESIZE; i++) /* fill the complete page with the next data */
+ for (i = 0; i < SPM_PAGESIZE; i++) /* fill the complete page with the next data */
{
- i2cWaitForComplete(); /* wait data */
+ i2cWaitForComplete(); /* wait data */
if ((twStatus = TW_STATUS) == TW_SR_DATA_ACK)
{
if ((i & 0x01) == 0)
@@ -55,22 +60,24 @@
else
{
data.b[1] = TWDR;
- boot_page_fill (address, data.w);
+ boot_page_fill(address, data.w);
address += 2;
}
TWCR = _BV(TWEA) | _BV(TWEN) | _BV(TWINT);
}
- else while(1); /* error in communication */
+ else
+ while (1) ; /* error in communication */
}
i2cWaitForComplete();
- if ((twStatus = TW_STATUS) != TW_SR_STOP) while(1); /* if no stop at this exact position, there's something wrong with the number of bytes sent, we cancel */
- TWCR = _BV(TWEA) | _BV(TWEN) | _BV(TWINT); /* clear the interrupt immediately so not to miss the next frame */
- boot_page_erase (pageAddress.w);
- boot_page_write (pageAddress.w); /* Store buffer in flash page */
+ if ((twStatus = TW_STATUS) != TW_SR_STOP)
+ while (1) ; /* if no stop at this exact position, there's something wrong with the number of bytes sent, we cancel */
+ TWCR = _BV(TWEA) | _BV(TWEN) | _BV(TWINT); /* clear the interrupt immediately so not to miss the next frame */
+ boot_page_erase(pageAddress.w);
+ boot_page_write(pageAddress.w); /* Store buffer in flash page */
}
}
void i2cWaitForComplete(void)
{
- while( !(TWCR & _BV(TWINT)) ); /* wait for i2c interface to complete operation */
+ while (!(TWCR & _BV(TWINT))) ; /* wait for i2c interface to complete operation */
}
Modified: firmware/fuxrf/trunk/bootloader.h
===================================================================
--- firmware/fuxrf/trunk/bootloader.h 2007-10-01 10:29:33 UTC (rev 558)
+++ firmware/fuxrf/trunk/bootloader.h 2007-10-01 10:38:14 UTC (rev 559)
@@ -1,3 +1,4 @@
+
/* KySoH's iTux agent
Copyright (c) 2006, C2ME S.A.
All rights reserved.
@@ -40,7 +41,8 @@
*/
#define I2C_BL_TWAR (0X33 << 1)
-void bootloader(void) __attribute__ ((section (".bootloader"))) __attribute__ ((naked));
-void i2cWaitForComplete(void) __attribute__ ((section (".bootloader")));
+void bootloader(void) __attribute__ ((section(".bootloader")))
+ __attribute__ ((naked));
+void i2cWaitForComplete(void) __attribute__ ((section(".bootloader")));
#endif /* _BOOTLOADER_H_ */
Modified: firmware/fuxrf/trunk/defines.h
===================================================================
--- firmware/fuxrf/trunk/defines.h 2007-10-01 10:29:33 UTC (rev 558)
+++ firmware/fuxrf/trunk/defines.h 2007-10-01 10:38:14 UTC (rev 559)
@@ -9,9 +9,9 @@
#include <avr/eeprom.h>
// Define the used HOPPING SCHEME
-#define HOPPING // No hopping, use signel channel TRX_CHANNEL. If no define use frequency hopping
+#define HOPPING // No hopping, use signel channel TRX_CHANNEL. If no define use frequency hopping
#define TRX_CHANNEL 90
-#define FHA // Use frequency hopping adaptativ
+#define FHA // Use frequency hopping adaptativ
#define WIFI
@@ -69,43 +69,43 @@
//----->Assembler Definitions<-----//
//----->Hardware Definitions<-----//
-#define set_clock __asm__ __volatile__ ("sbi 0x0B,4") //D.4# CLOCK PORTD.4
-#define clr_clock __asm__ __volatile__ ("cbi 0x0B,4") //D.4# CLOCK PORTD.4
-#define set_data __asm__ __volatile__ ("sbi 0x0B,1") //D.1# TXD/D PORTD.1
-#define clr_data __asm__ __volatile__ ("cbi 0x0B,1") //D.1# TXD/D PORTD.1
-#define set_enable __asm__ __volatile__ ("sbi 0x08,1")//C.1# ENABLE PORTC.1
-#define clr_enable __asm__ __volatile__ ("cbi 0x08,1")//C.1# ENABLE PORTC.1
-#define set_rxon __asm__ __volatile__ ("sbi 0x0B,5") //D.5# RXON PORTD.5
-#define clr_rxon __asm__ __volatile__ ("cbi 0x0B,5") //D.5# RXON PORTD.5
-#define set_txon __asm__ __volatile__ ("sbi 0x05,0") //B.0# TXON PORTB.0
-#define clr_txon __asm__ __volatile__ ("cbi 0x05,0") //B.0# TXON PORTB.0
-#define set_pupwr __asm__ __volatile__ ("sbi 0x0B,2") //D.2# PU_PWR PORTD.2
-#define clr_pupwr __asm__ __volatile__ ("cbi 0x0B,2") //D.2# PU_PWR PORTD.2
-#define set_nole __asm__ __volatile__ ("sbi 0x05,1") //B.1# OLE PORTB.1
-#define clr_nole __asm__ __volatile__ ("cbi 0x05,1") //B.1# OLE PORTB.1
-#define in_rxd input(PIND)&0x01 //# RXD PIND.0
+#define set_clock __asm__ __volatile__ ("sbi 0x0B,4") //D.4# CLOCK PORTD.4
+#define clr_clock __asm__ __volatile__ ("cbi 0x0B,4") //D.4# CLOCK PORTD.4
+#define set_data __asm__ __volatile__ ("sbi 0x0B,1") //D.1# TXD/D PORTD.1
+#define clr_data __asm__ __volatile__ ("cbi 0x0B,1") //D.1# TXD/D PORTD.1
+#define set_enable __asm__ __volatile__ ("sbi 0x08,1") //C.1# ENABLE PORTC.1
+#define clr_enable __asm__ __volatile__ ("cbi 0x08,1") //C.1# ENABLE PORTC.1
+#define set_rxon __asm__ __volatile__ ("sbi 0x0B,5") //D.5# RXON PORTD.5
+#define clr_rxon __asm__ __volatile__ ("cbi 0x0B,5") //D.5# RXON PORTD.5
+#define set_txon __asm__ __volatile__ ("sbi 0x05,0") //B.0# TXON PORTB.0
+#define clr_txon __asm__ __volatile__ ("cbi 0x05,0") //B.0# TXON PORTB.0
+#define set_pupwr __asm__ __volatile__ ("sbi 0x0B,2") //D.2# PU_PWR PORTD.2
+#define clr_pupwr __asm__ __volatile__ ("cbi 0x0B,2") //D.2# PU_PWR PORTD.2
+#define set_nole __asm__ __volatile__ ("sbi 0x05,1") //B.1# OLE PORTB.1
+#define clr_nole __asm__ __volatile__ ("cbi 0x05,1") //B.1# OLE PORTB.1
+#define in_rxd input(PIND)&0x01 //# RXD PIND.0
//----->Hardware Definitions<-----//
//----->RF-Config-Word-Defines<-----//
-#define TXEN 0x01 // XXX
-#define RXEN 0x00 // XXX
+#define TXEN 0x01 // XXX
+#define RXEN 0x00 // XXX
#define CH00TX 0x1B
#define CH00RX 0x1C
//----->RF-Config-Word-Defines<-----//
//----->RF-Timing-Defines<-----//
// T_SLOT == 1ms ==> every 1000us 48 Bytes of payload are exchanged
- #define POLL_LOOPS 1
- #define T_1ms 1728 // Exact -> 1000us
- #define T_PWR_UP_TX 69 // 69 == 40us (39.93)
- #define T_LOOP_TX 341 // 341 == 197us (197.34)
- #define T_START_TX 59 // 59 == 34us (34.14)
- #define T_TX2RX 1259 // 1259 == 728us (728.59)
- #define T_PWR_UP_RX 69 // 69 == 40us (39.93)
- #define T_LOOP_RX 139 // 139 == 80us (80.44)
- #define T_RX_ON 260 // 260 == 150us (150.46)
- #define T_MAX_PAC_RX 1088 // 1088 == 630us (629.62)
- #define T_RX2TX 172 // 172 == 100us (99.54)
+#define POLL_LOOPS 1
+#define T_1ms 1728 // Exact -> 1000us
+#define T_PWR_UP_TX 69 // 69 == 40us (39.93)
+#define T_LOOP_TX 341 // 341 == 197us (197.34)
+#define T_START_TX 59 // 59 == 34us (34.14)
+#define T_TX2RX 1259 // 1259 == 728us (728.59)
+#define T_PWR_UP_RX 69 // 69 == 40us (39.93)
+#define T_LOOP_RX 139 // 139 == 80us (80.44)
+#define T_RX_ON 260 // 260 == 150us (150.46)
+#define T_MAX_PAC_RX 1088 // 1088 == 630us (629.62)
+#define T_RX2TX 172 // 172 == 100us (99.54)
// ==> 48KB/second (384.000bps)
//----->RF-Timing-Defines<-----//
Modified: firmware/fuxrf/trunk/device.c
===================================================================
--- firmware/fuxrf/trunk/device.c 2007-10-01 10:29:33 UTC (rev 558)
+++ firmware/fuxrf/trunk/device.c 2007-10-01 10:38:14 UTC (rev 559)
@@ -30,7 +30,6 @@
VERSION_CMD, CPU_VER_JOIN(CPU_NUMBER, VER_MAJOR), VER_MINOR, VER_UPDATE,
};
-
/* Bootloader can be included with the program */
#define BOOTLOADER 1
@@ -38,9 +37,9 @@
#include "bootloader.h"
#endif
-
#ifdef WIFI
-const unsigned char OffsetTbl[] = { 3, 5, 7, 11, 13, 17, 19, 23, 29, 31, 37, 41 };
+const unsigned char OffsetTbl[] =
+ { 3, 5, 7, 11, 13, 17, 19, 23, 29, 31, 37, 41 };
#endif
//*****************************************************************************
@@ -59,49 +58,50 @@
int main(void)
{
#if (BOOTLOADER)
- if (!(PINB & 0x04)) /* if SPI_SS is cleared at startup */
- asm volatile ("rjmp bootloader" ::); /* jump to bootloader */
+ if (!(PINB & 0x04)) /* if SPI_SS is cleared at startup */
+ asm volatile ("rjmp bootloader"::); /* jump to bootloader */
#endif
- init_avr(); // System init
- init_varis(); // Init variables
- spiTransaction(); // Spi transaction to recieve
+ init_avr(); // System init
+ init_varis(); // Init variables
+ spiTransaction(); // Spi transaction to recieve
// spiConfigFrame[5] = 6;
// spiConfigFrame[6] = 32;
- generate_frequency_sequence (); // Generate hopping sequence
- init_frame_RF (); // Init RF frame
- sei();
- gfilter = eeprom_read_byte(&ee_filter); // Read gaussian filter into the eeprom
- if (gfilter == 0xFF) // No value program in the eeprom
- gfilter = 5;
- gfilter = (gfilter << 1); // Configure gaussian filter
- system_start_up(); // Start RF connection
- PORTD &= ~0x80; // On line radio
+ generate_frequency_sequence(); // Generate hopping sequence
+ init_frame_RF(); // Init RF frame
+ sei();
+ gfilter = eeprom_read_byte(&ee_filter); // Read gaussian filter into the eeprom
+ if (gfilter == 0xFF) // No value program in the eeprom
+ gfilter = 5;
+ gfilter = (gfilter << 1); // Configure gaussian filter
+ system_start_up(); // Start RF connection
+ PORTD &= ~0x80; // On line radio
- while (1) // Infinite main loop
+ while (1) // Infinite main loop
+ {
+#ifdef WIFI
+ if (FHAState == COMPUTE_FREQ)
{
-#ifdef WIFI
- if (FHAState == COMPUTE_FREQ)
- {
- while (1)
- {
- replaceFrequency += OffsetTbl[random_numb]; // Calculate next channel
+ while (1)
+ {
+ replaceFrequency += OffsetTbl[random_numb]; // Calculate next channel
if (replaceFrequency >= 93)
- replaceFrequency -= 91;
- random_numb++;
- if (random_numb == 12)
- random_numb = 0;
- if ((replaceFrequency < spiConfigFrame[5]) || (replaceFrequency > spiConfigFrame[6]))
- break;
- }
- FHAState = WAIT_ACK_CHF;
- }
+ replaceFrequency -= 91;
+ random_numb++;
+ if (random_numb == 12)
+ random_numb = 0;
+ if ((replaceFrequency < spiConfigFrame[5])
+ || (replaceFrequency > spiConfigFrame[6]))
+ break;
+ }
+ FHAState = WAIT_ACK_CHF;
+ }
#endif
- if (spi_enable) // Spi transaction ready
+ if (spi_enable) // Spi transaction ready
{
- spi_enable = 0; // Reset spi flag
- spiTransaction();
- }
+ spi_enable = 0; // Reset spi flag
+ spiTransaction();
}
+ }
}
Modified: firmware/fuxrf/trunk/init.c
===================================================================
--- firmware/fuxrf/trunk/init.c 2007-10-01 10:29:33 UTC (rev 558)
+++ firmware/fuxrf/trunk/init.c 2007-10-01 10:38:14 UTC (rev 559)
@@ -3,7 +3,6 @@
#include "varis.h"
#include "misc.h"
-
//*****************************************************************************
//* Project: RF-Firmware for ISM *
//* Function: init_avr *
@@ -17,59 +16,54 @@
//*****************************************************************************
void init_avr(void)
{
- //init of AVR ports
+ //init of AVR ports
//*************PORTB*************//
- //PORTB.0 -> OUT TXON
- //PORTB.1 -> OUT nOLE
- //PORTB.2 -> IN CS
- //PORTB.3 -> IN MOSI
- //PORTB.4 -> OUT MISO
- //PORTB.5 -> IN SCK
- //PORTB.6 -> XTAL1
- //PORTB.7 -> XTAL2 (output to RF - Chip)
- output(PORTB,0x20);
- output(DDRB,0x13);
+ //PORTB.0 -> OUT TXON
+ //PORTB.1 -> OUT nOLE
+ //PORTB.2 -> IN CS
+ //PORTB.3 -> IN MOSI
+ //PORTB.4 -> OUT MISO
+ //PORTB.5 -> IN SCK
+ //PORTB.6 -> XTAL1
+ //PORTB.7 -> XTAL2 (output to RF - Chip)
+ output(PORTB, 0x20);
+ output(DDRB, 0x13);
//*************PORTB*************//
//*************PORTC*************//
- //PORTC.0 -> OUT READY SPI
- //PORTC.1 -> OUT Enable
- //PORTC.2 -> OUT READY SPI
- //PORTC.3 -> OUT DEBUFG RF
- //PORTC.4 -> NOT USED, PULLED UP
- //PORTC.5 -> NOT USED, PULLED UP
- //PORTC.6 -> DEBUG - PIN
- output(PORTC,0x31);
- output(DDRC,0x1F);
+ //PORTC.0 -> OUT READY SPI
+ //PORTC.1 -> OUT Enable
+ //PORTC.2 -> OUT READY SPI
+ //PORTC.3 -> OUT DEBUFG RF
+ //PORTC.4 -> NOT USED, PULLED UP
+ //PORTC.5 -> NOT USED, PULLED UP
+ //PORTC.6 -> DEBUG - PIN
+ output(PORTC, 0x31);
+ output(DDRC, 0x1F);
//*************PORTC*************//
- //*************PORTD*************//
- //PORTD.0 -> IN RX_DATA
- //PORTD.1 -> OUT TX_DATA/Data
- //PORTD.2 -> OUT PU_TRX/PU_REG
- //PORTD.3 -> IN RESET LINE
- //PORTD.4 -> I/O CLK_REC/Clock
- //PORTD.5 -> OUT RXON
- //PORTD.6 -> NOT USED, PULLED UP
- //PORTD.7 -> OUT ON LINE
- output(PORTD,0xC0);
- output(DDRD,0xA6);
//*************PORTD*************//
+ //PORTD.0 -> IN RX_DATA
+ //PORTD.1 -> OUT TX_DATA/Data
+ //PORTD.2 -> OUT PU_TRX/PU_REG
+ //PORTD.3 -> IN RESET LINE
+ //PORTD.4 -> I/O CLK_REC/Clock
+ //PORTD.5 -> OUT RXON
+ //PORTD.6 -> NOT USED, PULLED UP
+ //PORTD.7 -> OUT ON LINE
+ output(PORTD, 0xC0);
+ output(DDRD, 0xA6);
+ //*************PORTD*************//
//***********init-needed-peripherals***************//
- output(UBRR0L,0x05);
+ output(UBRR0L, 0x05);
//***********init-needed-peripherals***************//
- SPCR=0x40; // Slave
- SPSR=0x00;
+ SPCR = 0x40; // Slave
+ SPSR = 0x00;
// Clear the SPI interrupt flag
- asm volatile /* Clear the SPI interrupt flag */
- (
- "in __tmp_reg__, %0" "\n\t"
- "in __tmp_reg__, %1" "\n\t"
- :
- : "I" (_SFR_IO_ADDR(SPSR)), "I" (_SFR_IO_ADDR(SPDR))
- );
+ asm volatile /* Clear the SPI interrupt flag */
+ ("in __tmp_reg__, %0" "\n\t" "in __tmp_reg__, %1"
+ "\n\t"::"I" (_SFR_IO_ADDR(SPSR)), "I"(_SFR_IO_ADDR(SPDR)));
}
-
//*****************************************************************************
//* Project: RF-Firmware for ISM *
//* Function: init_varis *
@@ -83,35 +77,35 @@
//*****************************************************************************
void init_varis(void)
{
- uc_8 i;
+ uc_8 i;
- i = input(SPL);
- i ^= 0xFF;
- extern ui_16 __bss_start;
- extern ui_16 __stack;
- uc_8 *ptr = (uc_8*)&__bss_start;
- while(ptr<(uc_8*)&__stack - i)
- {/*sub because of returning of subroutine*/
- *ptr++=0;
- } // Reduce 26 bytes
+ i = input(SPL);
+ i ^= 0xFF;
+ extern ui_16 __bss_start;
+ extern ui_16 __stack;
+ uc_8 *ptr = (uc_8 *) & __bss_start;
- rx_buffer_ready = 0x00;
- frameCmpt = 0; // Counter of RF frame
- frequencyIndex = 0; // Pointer for the table of frequency
- FHAState = INIT; // Init of status of FHA state machine
- statisticPointer = 0; // Pointer for the table with statistic for FHA
- spi_enable = 0; // Flag to start spi transaction
- errorFrame = 0; // Detect error in transmission
- commandStatus = 0; // Status of the command
- ACKmode = 0; // Wait an ACK
+ while (ptr < (uc_8 *) & __stack - i)
+ { /*sub because of returning of subroutine */
+ *ptr++ = 0;
+ } // Reduce 26 bytes
- prf_buffer_rx = rf_buffer_rx1; // Init pointer for RF transaction
- pspi_buffer_rx = rf_buffer_rx2; // Init pointer for SPI transaction
- prf_buffer_tx = rf_buffer_tx1; // Init pointer for RF transaction
- pspi_buffer_tx = rf_buffer_tx2; // Init pointer for SPI transaction
+ rx_buffer_ready = 0x00;
+ frameCmpt = 0; // Counter of RF frame
+ frequencyIndex = 0; // Pointer for the table of frequency
+ FHAState = INIT; // Init of status of FHA state machine
+ statisticPointer = 0; // Pointer for the table with statistic for FHA
+ spi_enable = 0; // Flag to start spi transaction
+ errorFrame = 0; // Detect error in transmission
+ commandStatus = 0; // Status of the command
+ ACKmode = 0; // Wait an ACK
+
+ prf_buffer_rx = rf_buffer_rx1; // Init pointer for RF transaction
+ pspi_buffer_rx = rf_buffer_rx2; // Init pointer for SPI transaction
+ prf_buffer_tx = rf_buffer_tx1; // Init pointer for RF transaction
+ pspi_buffer_tx = rf_buffer_tx2; // Init pointer for SPI transaction
}
-
//*****************************************************************************
//* Project: RF-Firmware for ISM *
//* Function: init_frame_RF *
@@ -123,48 +117,48 @@
//* Date: 26.06.07 *
//* Description: Init the TX buffers with the starting values *
//*****************************************************************************
-void init_frame_RF (void)
+void init_frame_RF(void)
{
- unsigned char i, header_rf;
+ unsigned char i, header_rf;
- header_rf = SMALLFRAME; // First byte header of the frame
- header_rf |= MASTERH;
+ header_rf = SMALLFRAME; // First byte header of the frame
+ header_rf |= MASTERH;
- if (spiConfigFrame[1] == 0xFF) // Special mode
+ if (spiConfigFrame[1] == 0xFF) // Special mode
+ {
+ if (spiConfigFrame[3] == 0xFF) // Request ID
{
- if (spiConfigFrame[3] == 0xFF) // Request ID
- {
- header_rf |= REQUESTID;
- }
- else // Change ID
- {
- header_rf |= CHANGEID;
- }
+ header_rf |= REQUESTID;
}
-
- for (i = 0; i < 11; i++)
+ else // Change ID
{
- rf_buffer_tx1[i] = 0x55; // Preamble
- rf_buffer_tx2[i] = 0x55; // Preamble
+ header_rf |= CHANGEID;
}
+ }
- for (i = 11; i < 13; i++)
- {
- rf_buffer_tx1[i] = 0xFF; // Synchro
- rf_buffer_tx2[i] = 0xFF; // Synchro
- }
+ for (i = 0; i < 11; i++)
+ {
+ rf_buffer_tx1[i] = 0x55; // Preamble
+ rf_buffer_tx2[i] = 0x55; // Preamble
+ }
- rf_buffer_tx1[14] = rf_buffer_tx2[14] = sof_ary[1] = spiConfigFrame[0]; // Set ID
- rf_buffer_tx1[15] = rf_buffer_tx2[15] = sof_ary[2] = spiConfigFrame[1];
- rf_buffer_tx1[16] = rf_buffer_tx2[16] = header_rf;
- if (spiConfigFrame[4] == 0x01) // Wake up from PC
- rf_buffer_tx1[17] = rf_buffer_tx2[17] = 0x20; // Second byte header of the frame
- else
- rf_buffer_tx1[17] = rf_buffer_tx2[17] = 0x00; // Second byte header of the frame
+ for (i = 11; i < 13; i++)
+ {
+ rf_buffer_tx1[i] = 0xFF; // Synchro
+ rf_buffer_tx2[i] = 0xFF; // Synchro
+ }
- rf_buffer_tx1[18] = rf_buffer_tx2[18] = spiConfigFrame[2]; // Hopping parameters Index (dummy) / Toy ID for init
- rf_buffer_tx1[19] = rf_buffer_tx2[19] = spiConfigFrame[3]; // Hopping parameters Channel (dummy) / Toy ID for init
- rf_buffer_tx1[20] = rf_buffer_tx2[20] = 0x55;
- calc_checksum (rf_buffer_tx1);
- calc_checksum (rf_buffer_tx2);
+ rf_buffer_tx1[14] = rf_buffer_tx2[14] = sof_ary[1] = spiConfigFrame[0]; // Set ID
+ rf_buffer_tx1[15] = rf_buffer_tx2[15] = sof_ary[2] = spiConfigFrame[1];
+ rf_buffer_tx1[16] = rf_buffer_tx2[16] = header_rf;
+ if (spiConfigFrame[4] == 0x01) // Wake up from PC
+ rf_buffer_tx1[17] = rf_buffer_tx2[17] = 0x20; // Second byte header of the frame
+ else
+ rf_buffer_tx1[17] = rf_buffer_tx2[17] = 0x00; // Second byte header of the frame
+
+ rf_buffer_tx1[18] = rf_buffer_tx2[18] = spiConfigFrame[2]; // Hopping parameters Index (dummy) / Toy ID for init
+ rf_buffer_tx1[19] = rf_buffer_tx2[19] = spiConfigFrame[3]; // Hopping parameters Channel (dummy) / Toy ID for init
+ rf_buffer_tx1[20] = rf_buffer_tx2[20] = 0x55;
+ calc_checksum(rf_buffer_tx1);
+ calc_checksum(rf_buffer_tx2);
}
Modified: firmware/fuxrf/trunk/init.h
===================================================================
--- firmware/fuxrf/trunk/init.h 2007-10-01 10:29:33 UTC (rev 558)
+++ firmware/fuxrf/trunk/init.h 2007-10-01 10:38:14 UTC (rev 559)
@@ -1,12 +1,10 @@
#ifndef INIT_H
#define INIT_H
-
-
#include "defines.h"
extern void init_avr(void);
extern void init_varis(void);
-extern void init_frame_RF (void);
+extern void init_frame_RF(void);
#endif
Modified: firmware/fuxrf/trunk/misc.c
===================================================================
--- firmware/fuxrf/trunk/misc.c 2007-10-01 10:29:33 UTC (rev 558)
+++ firmware/fuxrf/trunk/misc.c 2007-10-01 10:38:14 UTC (rev 559)
@@ -4,7 +4,6 @@
#include "misc.h"
#include "rf_ctrl.h"
-
//*****************************************************************************
//* Project: RF-Firmware for ISM *
//* Function: wait_n_10us *
@@ -18,22 +17,21 @@
//*****************************************************************************
void wait_n_10us(uc_8 val)
{
- uc_8 i,j;
+ uc_8 i, j;
- i = val;
- for(i = 0; i < val; i++)
+ i = val;
+ for (i = 0; i < val; i++)
+ {
+ for (j = 0; j < 16; j++)
{
- for(j = 0; j < 16; j++)
- {
- _NIX;
- _NIX;
- _NIX;
- _NIX;
- }
+ _NIX;
+ _NIX;
+ _NIX;
+ _NIX;
}
+ }
}
-
//*****************************************************************************
//* Project: RF-Firmware for ISM *
//* Function: get_random *
@@ -47,38 +45,37 @@
//*****************************************************************************
uc_8 get_random(void)
{
- uc_8 i,random;
+ uc_8 i, random;
- //init of the global variable random, this is done by using the noise
- //output of the RF-Chip when settlet up for receive without having
- //a transmitter, may check if RSSI is low to be sure there is only noise.
- //The RX_DATA pin of the ATR2406 is sampled.
+ //init of the global variable random, this is done by using the noise
+ //output of the RF-Chip when settlet up for receive without having
+ //a transmitter, may check if RSSI is low to be sure there is only noise.
+ //The RX_DATA pin of the ATR2406 is sampled.
- pwr_up_atr2406();
+ pwr_up_atr2406();
- set_rxon; // Set ATR2406 in RX mode
- for(i = 0;i < 0xFF; i++)
- {
- random = 0x00;
- _NIX;
- }
+ set_rxon; // Set ATR2406 in RX mode
+ for (i = 0; i < 0xFF; i++)
+ {
+ random = 0x00;
+ _NIX;
+ }
- for(i = 0;i < 0x41; i++) // Calculate random word
+ for (i = 0; i < 0x41; i++) // Calculate random word
+ {
+ if ((i & 0x07) == 0x00)
{
- if ((i&0x07) == 0x00)
- {
- random = random << 1;
- if ((in_rxd))
- {
- random |= 0x01;
- }
- }
+ random = random << 1;
+ if ((in_rxd))
+ {
+ random |= 0x01;
+ }
}
- pwr_dwn_atr2406();
- return random;
+ }
+ pwr_dwn_atr2406();
+ return random;
}
-
//*****************************************************************************
//* Project: RF-Firmware for ISM *
//* Function: get_random_channel *
@@ -90,27 +87,26 @@
//* Date: 10.07.06 *
//* Description: Random channel value needed for frequency hopping *
//*****************************************************************************
-uc_8 get_random_channel (void)
+uc_8 get_random_channel(void)
{
- uc_8 value;
+ uc_8 value;
- while (1)
- {
- value = get_random (); // Get a random value
- value &= 0x7F; // Truncate it to have a correct channel value
- if (value >= 93)
- value -= 60;
- if (value <= 1)
- value = 2;
+ while (1)
+ {
+ value = get_random(); // Get a random value
+ value &= 0x7F; // Truncate it to have a correct channel value
+ if (value >= 93)
+ value -= 60;
+ if (value <= 1)
+ value = 2;
#ifdef WIFI
- if ((value < spiConfigFrame[5]) || (value > spiConfigFrame[6]))
+ if ((value < spiConfigFrame[5]) || (value > spiConfigFrame[6]))
#endif
- break;
- }
- return value;
+ break;
+ }
+ return value;
}
-
//*****************************************************************************
//* Project: RF-Firmware for ISM *
//* Function: calc_checksum *
@@ -124,19 +120,19 @@
//*****************************************************************************
void calc_checksum(unsigned char *pbuffer)
{
- uc_8 i,tmp;
- uc_8 *ptr;
+ uc_8 i, tmp;
+ uc_8 *ptr;
- ptr = pbuffer + 16; // Get address of start of RF frame
- if (*(pbuffer + 16) & SMALLFRAME)
- i = 6;
- else
- i = 48;
- tmp = 0x00;
- while (i != 1)
- {
- i--;
- tmp ^= *ptr++; // Calculate CRC
- }
- *ptr = tmp;
+ ptr = pbuffer + 16; // Get address of start of RF frame
+ if (*(pbuffer + 16) & SMALLFRAME)
+ i = 6;
+ else
+ i = 48;
+ tmp = 0x00;
+ while (i != 1)
+ {
+ i--;
+ tmp ^= *ptr++; // Calculate CRC
+ }
+ *ptr = tmp;
}
Modified: firmware/fuxrf/trunk/misc.h
===================================================================
--- firmware/fuxrf/trunk/misc.h 2007-10-01 10:29:33 UTC (rev 558)
+++ firmware/fuxrf/trunk/misc.h 2007-10-01 10:38:14 UTC (rev 559)
@@ -1,14 +1,11 @@
#ifndef MISC_H
#define MISC_H
-
#include "defines.h"
-
extern void wait_n_10us(uc_8 val);
extern uc_8 get_random(void);
-extern uc_8 get_random_channel (void);
+extern uc_8 get_random_channel(void);
extern void calc_checksum(unsigned char *pbuffer);
-
#endif
Modified: firmware/fuxrf/trunk/prot.c
===================================================================
--- firmware/fuxrf/trunk/prot.c 2007-10-01 10:29:33 UTC (rev 558)
+++ firmware/fuxrf/trunk/prot.c 2007-10-01 10:38:14 UTC (rev 559)
@@ -5,7 +5,6 @@
#include "prot.h"
#include "rf_ctrl.h"
-
//*****************************************************************************
//* Project: RF-Firmware for ISM *
//* Function: generate_frequency_sequence *
@@ -17,34 +16,33 @@
//* Date: 10.07.06 *
//* Description: Define a frequency sequence for hopping *
//*****************************************************************************
-void generate_frequency_sequence (void)
+void generate_frequency_sequence(void)
{
- unsigned char i, j, out;
+ unsigned char i, j, out;
- frequencyTable [0] = get_random_channel ();
- for (i = 1; i < 20; i++)
+ frequencyTable[0] = get_random_channel();
+ for (i = 1; i < 20; i++)
{
out = 1;
while (out)
{
- frequencyTable [i] = get_random_channel ();
+ frequencyTable[i] = get_random_channel();
j = 0;
while (1)
{
- if (frequencyTable [i] == frequencyTable [j])
- break;
- j++;
+ if (frequencyTable[i] == frequencyTable[j])
+ break;
+ j++;
if (i == j)
{
- out = 0;
+ out = 0;
break;
}
- }
+ }
}
- }
+ }
}
-
//*****************************************************************************
//* Project: RF-Firmware for ISM *
//* Function: system_start_up *
@@ -58,55 +56,54 @@
//*****************************************************************************
void system_start_up(void)
{
- unsigned char i;
- unsigned char RFinitState; // Init state machine variable
+ unsigned char i;
+ unsigned char RFinitState; // Init state machine variable
- rf_status |= MASTER; // Set rf status like master
- channel = 0; // Init start channel
- pwr_dwn_atr2406();
- start_rf_timer(); // Start timer 1 interrupt, state machine of the rf link
- output(UCSR0A,0x00);
- output(UCSR0B,0x00);
- output(UCSR0C,0x00); // Enable RX UART
- output(OCR1A,0x0020); // Update timer
- RFinitState = WAIT_SLAVE; // Init state machine
+ rf_status |= MASTER; // Set rf status like master
+ channel = 0; // Init start channel
+ pwr_dwn_atr2406();
+ start_rf_timer(); // Start timer 1 interrupt, state machine of the rf link
+ output(UCSR0A, 0x00);
+ output(UCSR0B, 0x00);
+ output(UCSR0C, 0x00); // Enable RX UART
+ output(OCR1A, 0x0020); // Update timer
+ RFinitState = WAIT_SLAVE; // Init state machine
- while (1)
+ while (1)
+ {
+ if (rx_buffer_ready) // Valid receive frame
{
- if (rx_buffer_ready) // Valid receive frame
- {
- rx_buffer_ready = 0x00; // Reset recieve flag
- if (RFinitState == WAIT_SLAVE) // Wait SLAVE not logged
- {
- if (*(pspi_buffer_rx) == 0x82) // SLAVE not logged
+ rx_buffer_ready = 0x00; // Reset recieve flag
+ if (RFinitState == WAIT_SLAVE) // Wait SLAVE not logged
+ {
+ if (*(pspi_buffer_rx) == 0x82) // SLAVE not logged
{
- rf_status |= LOGGED; // Rf status is logged
- rf_buffer_tx1[16] = rf_buffer_tx2[16] |= LOGGEDH; // MASTER logged
+ rf_status |= LOGGED; // Rf status is logged
+ rf_buffer_tx1[16] = rf_buffer_tx2[16] |= LOGGEDH; // MASTER logged
// eeprom_write_byte(&ee_toy_id_h, toy_id_h); // Write toy id into the eeprom
// eeprom_write_byte(&ee_toy_id_h, toy_id_l);
- rf_buffer_tx1[17] = rf_buffer_tx2[17] &= ~0x20; // Remove wake up command if set
- RFinitState = WAIT_LOG;
- }
- }
- else if (RFinitState == WAIT_LOG)
- {
- if ((*(pspi_buffer_rx) & SLAVEH) && (*(pspi_buffer_rx) & LOGGEDH)) // SLAVE logged
- {
- rf_buffer_tx1[16] = rf_buffer_tx2[16] &= ~SMALLFRAME; // Use big frame
- for (i = 22; i < 63; i++)
- {
- rf_buffer_tx1[i] = 0x55; // Payload bytes
- rf_buffer_tx2[i] = 0x55; // Payload bytes
- }
- rf_status |= WAIT_HOPPING;
- break;
- }
- }
+ rf_buffer_tx1[17] = rf_buffer_tx2[17] &= ~0x20; // Remove wake up command if set
+ RFinitState = WAIT_LOG;
}
+ }
+ else if (RFinitState == WAIT_LOG)
+ {
+ if ((*(pspi_buffer_rx) & SLAVEH) && (*(pspi_buffer_rx) & LOGGEDH)) // SLAVE logged
+ {
+ rf_buffer_tx1[16] = rf_buffer_tx2[16] &= ~SMALLFRAME; // Use big frame
+ for (i = 22; i < 63; i++)
+ {
+ rf_buffer_tx1[i] = 0x55; // Payload bytes
+ rf_buffer_tx2[i] = 0x55; // Payload bytes
+ }
+ rf_status |= WAIT_HOPPING;
+ break;
+ }
+ }
}
+ }
}
-
//*****************************************************************************
//* Project: RF-Firmware for ISM *
//* Function: setup_pac *
@@ -118,96 +115,96 @@
//* Date: 26.06.07 *
//* Description: Build RF packet and manage some protocol function *
//*****************************************************************************
-void setup_pac (void)
+void setup_pac(void)
{
- unsigned char i;
- unsigned char *pbuffer_tx;
- unsigned char *pspibuffer_tx;
+ unsigned char i;
+ unsigned char *pbuffer_tx;
+ unsigned char *pspibuffer_tx;
- pspibuffer_tx = pspi_buffer_tx;
- pbuffer_tx = prf_buffer_tx;
- *(pbuffer_tx + 13) = channel; // Save current channel into the frame
+ pspibuffer_tx = pspi_buffer_tx;
+ pbuffer_tx = prf_buffer_tx;
+ *(pbuffer_tx + 13) = channel; // Save current channel into the frame
// *(pbuffer_tx + 14) = sof_ary[1]; // Put Toy id into the frame
// *(pbuffer_tx + 15) = sof_ary[2]; // Put Toy id into the frame
#ifdef HOPPING
- if (rf_status & WAIT_HOPPING)
+ if (rf_status & WAIT_HOPPING)
+ {
+ if (FHAState & WAIT_SYNCHRO) // Wait synchro time
{
- if (FHAState & WAIT_SYNCHRO) // Wait synchro time
- {
- *(pbuffer_tx + 22) = frameCmpt; // Load frame counter
+ *(pbuffer_tx + 22) = frameCmpt; // Load frame counter
frameCmpt++;
- rf_buffer_tx1[16] = rf_buffer_tx2[16] &= ~FHTRSEQ; // Update frame header
+ rf_buffer_tx1[16] = rf_buffer_tx2[16] &= ~FHTRSEQ; // Update frame header
if (frameCmpt & 0x10)
{
- FHAState = 0; // Reset status to do adaptative frequency hopping
+ FHAState = 0; // Reset status to do adaptative frequency hopping
rf_status &= ~WAIT_HOPPING;
- rf_status |= FHA_EFFECTIVE; // FHA is effective
+ rf_status |= FHA_EFFECTIVE; // FHA is effective
// PORTC |= 0x04; // Debug
}
}
- else if (FHAState & INIT) // Send hopping sequence to Slave
+ else if (FHAState & INIT) // Send hopping sequence to Slave
{
- for (i = 0; i < 20; i++)
- *(pbuffer_tx + 23 + i) = frequencyTable [i]; // Load frequency sequence in the frame
- *(pbuffer_tx + 16) |= FHTRSEQ; // Update frame header
- *(pbuffer_tx + 22) = frameCmpt; // Load frame counter
+ for (i = 0; i < 20; i++)
+ *(pbuffer_tx + 23 + i) = frequencyTable[i]; // Load frequency sequence in the frame
+ *(pbuffer_tx + 16) |= FHTRSEQ; // Update frame header
+ *(pbuffer_tx + 22) = frameCmpt; // Load frame counter
frameCmpt++;
- if (rx_buffer_ready) // Valid receive frame
- {
- rx_buffer_ready = 0x00; // Reset recieve flag
- if (*(pspi_buffer_rx) & FHAACKH) // ACK recieve from Slave
- FHAState = WAIT_SYNCHRO; // Go to the next state
- }
+ if (rx_buffer_ready) // Valid receive frame
+ {
+ rx_buffer_ready = 0x00; // Reset recieve flag
+ if (*(pspi_buffer_rx) & FHAACKH) // ACK recieve from Slave
+ FHAState = WAIT_SYNCHRO; // Go to the next state
}
}
+ }
#endif
#ifdef FHA
- if (rf_status & FHA_EFFECTIVE)
+ if (rf_status & FHA_EFFECTIVE)
+ {
+ if (FHAState & WAIT_ACK_CHF)
{
- if (FHAState & WAIT_ACK_CHF)
- {
- *(prf_buffer_tx + 16) |= FHTRSEQ; // Update frame header
- *(prf_buffer_tx + 18) = tempoIndexFreq;
- *(prf_buffer_tx + 19) = replaceFrequency;
- *(prf_buffer_tx + 20) = replaceFrequency + tempoIndexFreq; // Must be remove if new CRC
+ *(prf_buffer_tx + 16) |= FHTRSEQ; // Update frame header
+ *(prf_buffer_tx + 18) = tempoIndexFreq;
+ *(prf_buffer_tx + 19) = replaceFrequency;
+ *(prf_buffer_tx + 20) = replaceFrequency + tempoIndexFreq; // Must be remove if new CRC
- if ((rx_buffer_ready) && (*(pspi_buffer_rx) & FHAACKH)) // Valid receive frame
+ if ((rx_buffer_ready) && (*(pspi_buffer_rx) & FHAACKH)) // Valid receive frame
{
// PORTC |= 0x04; // Debug
- rx_buffer_ready = 0; // Reset recieve flag
- *(prf_buffer_tx + 16) &= ~FHTRSEQ; // Update frame header
- *(pspi_buffer_tx + 16) &= ~FHTRSEQ;
+ rx_buffer_ready = 0; // Reset recieve flag
+ *(prf_buffer_tx + 16) &= ~FHTRSEQ; // Update frame header
+ *(pspi_buffer_tx + 16) &= ~FHTRSEQ;
FHAState = DO_UPDATE;
}
- }
}
+ }
#endif
- if (*(pbuffer_tx + 17) & 0x02) // Redundance
+ if (*(pbuffer_tx + 17) & 0x02) // Redundance
+ {
+ for (i = 27; i < 44; i++) // Copy audio for redundance
{
- for (i = 27 ;i < 44 ; i++) // Copy audio for redundance
- {
- *(pspibuffer_tx + 18 + i) = *(pbuffer_tx + i);
- }
- *(pspibuffer_tx + 17) |= 0x04; // Update header
+ *(pspibuffer_tx + 18 + i) = *(pbuffer_tx + i);
}
- else
- {
- *(pspibuffer_tx + 17) &= ~0x04; // Update header
- }
+ *(pspibuffer_tx + 17) |= 0x04; // Update header
+ }
+ else
+ {
+ *(pspibuffer_tx + 17) &= ~0x04; // Update header
+ }
- if (commandStatus == 0x01) // Command in progress
- {
- for (i = 0; i < 4; i++) // Copy command into the frame
- *(pbuffer_tx + 23 + i) = commandBuffer[i];
- *(pbuffer_tx + 17) |= 0x08; // Update header
- commandCmpt++;
- if (commandCmpt == 25)
- commandStatus = 0x03; // Command fail
+ if (commandStatus == 0x01) // Command in progress
+ {
+ for (i = 0; i < 4; i++) // Copy command into the frame
+ *(pbuffer_tx + 23 + i) = commandBuffer[i];
+ *(pbuffer_tx + 17) |= 0x08; // Update header
+ commandCmpt++;
+ if (commandCmpt == 25)
+ commandStatus = 0x03; // Command fail
}
- else
- *(pbuffer_tx + 17) &= ~0x08; // Update header
+ else
+ *(pbuffer_tx + 17) &= ~0x08; // Update header
- calc_checksum (pbuffer_tx); // Compute checksum
+ calc_checksum(pbuffer_tx); // Compute checksum
}
Modified: firmware/fuxrf/trunk/prot.h
===================================================================
--- firmware/fuxrf/trunk/prot.h 2007-10-01 10:29:33 UTC (rev 558)
+++ firmware/fuxrf/trunk/prot.h 2007-10-01 10:38:14 UTC (rev 559)
@@ -1,16 +1,10 @@
#ifndef PROT_H
#define PROT_H
-
-
#include "defines.h"
-
-
-extern void generate_frequency_sequence (void);
+extern void generate_frequency_sequence(void);
extern void system_start_up(void);
-extern void setup_pac (void);
+extern void setup_pac(void);
-
-
#endif
Modified: firmware/fuxrf/trunk/rf_ctrl.c
===================================================================
--- firmware/fuxrf/trunk/rf_ctrl.c 2007-10-01 10:29:33 UTC (rev 558)
+++ firmware/fuxrf/trunk/rf_ctrl.c 2007-10-01 10:38:14 UTC (rev 559)
@@ -8,7 +8,8 @@
#include "prot.h"
#ifndef WIFI
-const unsigned char OffsetTbl[] = { 3, 5, 7, 11, 13, 17, 19, 23, 29, 31, 37, 41 };
+const unsigned char OffsetTbl[] =
+ { 3, 5, 7, 11, 13, 17, 19, 23, 29, 31, 37, 41 };
#endif
//*****************************************************************************
@@ -24,220 +25,218 @@
//* Description: State machine to generate all the needed timings for the *
//* RF - Software flow. *
//*****************************************************************************
-SIGNAL (SIG_OUTPUT_COMPARE1A)
+SIGNAL(SIG_OUTPUT_COMPARE1A)
{
- rfStateCount++; // Increment state machine counter
+ rfStateCount++; // Increment state machine counter
- if (rfStateCount == 0x01) // Start ATR2406
- {
- // --> Critical timing section. Don't add code! <--
- output(OCR1A,input(OCR1A)+T_PWR_UP_TX); // Update timer (40 S)
- pwr_up_atr2406(); // Start ATR2406
- // --> End of critical timing section <--
+ if (rfStateCount == 0x01) // Start ATR2406
+ {
+ // --> Critical timing section. Don't add code! <--
+ output(OCR1A, input(OCR1A) + T_PWR_UP_TX); // Update timer (40 S)
+ pwr_up_atr2406(); // Start ATR2406
+ // --> End of critical timing section <--
#ifndef HOPPING
- channel = TRX_CHANNEL; // Set the channel
+ channel = TRX_CHANNEL; // Set the channel
#endif
#ifdef HOPPING
- if (rf_status & FHA_EFFECTIVE) // FHA effective
- {
- channel = frequencyTable[frequencyIndex]; // Next new channel
- frequencyIndex++; // Increment index
- if (frequencyIndex == 20)
- {
- frequencyIndex = 0; // Reset index
+ if (rf_status & FHA_EFFECTIVE) // FHA effective
+ {
+ channel = frequencyTable[frequencyIndex]; // Next new channel
+ frequencyIndex++; // Increment index
+ if (frequencyIndex == 20)
+ {
+ frequencyIndex = 0; // Reset index
#ifdef FHA
- if (FHAState & DO_UPDATE) // Update bad channel
- {
+ if (FHAState & DO_UPDATE) // Update bad channel
+ {
// PORTC |= 0x04; // Debug
- frequencyTable[tempoIndexFreq] = replaceFrequency; // Replace bad frequency in the table
- FHAState = 0; // Reset status
- frequencyStatistic[tempoIndexFreq] = 0; // Reset Statistic
+ frequencyTable[tempoIndexFreq] = replaceFrequency; // Replace bad frequency in the table
+ FHAState = 0; // Reset status
+ frequencyStatistic[tempoIndexFreq] = 0; // Reset Statistic
// PORTC &= ~0x04; // Debug
- }
- statisticPointer++; // Calculate static pointer
- if (statisticPointer == 1000)
- statisticPointer = 0; // Reset static pointer
-#endif
- }
- }
- else // FHA start sequence
- {
- channel += 6; // Next new channel
- if (channel > 94)
- channel = 0;
}
+ statisticPointer++; // Calculate static pointer
+ if (statisticPointer == 1000)
+ statisticPointer = 0; // Reset static pointer
#endif
+ }
}
- else if (rfStateCount == 0x02) // Config ATR2406
+ else // FHA start sequence
{
- // --> Critical timing section. Don't add code! <--
- output(OCR1A,input(OCR1A)+T_LOOP_TX); // Update timer (120 S).
- init_atr2406(channel,TXEN); // Configure ATR2406 to desired channel.
- // --> End of critical timing section <--
- *(prf_buffer_tx + 13) = channel; // Save current channel into the frame
- if (rf_status & LOGGED)
- setup_pac (); // Build packet
- if (*(prf_buffer_tx + 16) & SMALLFRAME) // Calculate packet lenght
- tx_pac_len = 23;
- else
- tx_pac_len = 65;
+ channel += 6; // Next new channel
+ if (channel > 94)
+ channel = 0;
}
- else if (rfStateCount == 0x03) // Set TX on
- {
- // --> Critical timing section. Don't add code! <--
- output(OCR1A,(input(OCR1A)+T_START_TX)); // Update timer (34 S)
- set_txon; // Set TX on
- // --> End of critical timing section <--
- output(UCSR0A,0x40); // // Usart Transmit conplete (interrupt no activated)
- output(UCSR0B,0x08); // Transmit enable
- }
- else if (rfStateCount == 0x04) // Start transmission
- {
- // --> Critical timing section. Don't add code! <--
- output(OCR1A,(input(OCR1A)+T_TX2RX)); // Update timer (804 S)
- rf_tx_counter = 0x00; // Reset the pointer of frame
- output(UCSR0C,0x46); // Synchronous usart + 8 bits
- output(UCSR0B,0x28); // Interrupt enable if empty + Transmit enable
- output(UDR0,0x55); // Start transmission of the packet
- output(UDR0,0x55); // Double buffered!!
- // --> End of critical timing section <--
- }
- else if (rfStateCount == 0x05) // Start ATR2406
- {
+#endif
+ }
+ else if (rfStateCount == 0x02) // Config ATR2406
+ {
// --> Critical timing section. Don't add code! <--
- output(OCR1A,input(OCR1A)+T_PWR_UP_RX); // Update timer (40 S)
- pwr_up_atr2406(); // Start ATR2406
- // --> End of critical timing section <--
+ output(OCR1A, input(OCR1A) + T_LOOP_TX); // Update timer (120 S).
+ init_atr2406(channel, TXEN); // Configure ATR2406 to desired channel.
+ // --> End of critical timing section <--
+ *(prf_buffer_tx + 13) = channel; // Save current channel into the frame
+ if (rf_status & LOGGED)
+ setup_pac(); // Build packet
+ if (*(prf_buffer_tx + 16) & SMALLFRAME) // Calculate packet lenght
+ tx_pac_len = 23;
+ else
+ tx_pac_len = 65;
+ }
+ else if (rfStateCount == 0x03) // Set TX on
+ {
+ // --> Critical timing section. Don't add code! <--
+ output(OCR1A, (input(OCR1A) + T_START_TX)); // Update timer (34 S)
+ set_txon; // Set TX on
+ // --> End of critical timing section <--
+ output(UCSR0A, 0x40); // // Usart Transmit conplete (interrupt no activated)
+ output(UCSR0B, 0x08); // Transmit enable
+ }
+ else if (rfStateCount == 0x04) // Start transmission
+ {
+ // --> Critical timing section. Don't add code! <--
+ output(OCR1A, (input(OCR1A) + T_TX2RX)); // Update timer (804 S)
+ rf_tx_counter = 0x00; // Reset the pointer of frame
+ output(UCSR0C, 0x46); // Synchronous usart + 8 bits
+ output(UCSR0B, 0x28); // Interrupt enable if empty + Transmit enable
+ output(UDR0, 0x55); // Start transmission of the packet
+ output(UDR0, 0x55); // Double buffered!!
+ // --> End of critical timing section <--
+ }
+ else if (rfStateCount == 0x05) // Start ATR2406
+ {
+ // --> Critical timing section. Don't add code! <--
+ output(OCR1A, input(OCR1A) + T_PWR_UP_RX); // Update timer (40 S)
+ pwr_up_atr2406(); // Start ATR2406
+ // --> End of critical timing section <--
#ifndef HOPPING
- channel = TRX_CHANNEL; // Set the channel
+ channel = TRX_CHANNEL; // Set the channel
#endif
- }
- else if (rfStateCount == 0x06) // Config ATR2406
- {
- // --> Critical timing section. Don't add code! <--
- output(OCR1A,input(OCR1A)+T_LOOP_RX); // Update timer (80 S)
- init_atr2406(channel,RXEN); // Configure ATR2406 to desired channel
- output(DDRD,input(DDRD)&0xEF); // XCK PIN set to input!!
- // --> End of critical timing section <--
+ }
+ else if (rfStateCount == 0x06) // Config ATR2406
+ {
+ // --> Critical timing section. Don't add code! <--
+ output(OCR1A, input(OCR1A) + T_LOOP_RX); // Update timer (80 S)
+ init_atr2406(channel, RXEN); // Configure ATR2406 to desired channel
+ output(DDRD, input(DDRD) & 0xEF); // XCK PIN set to input!!
+ // --> End of critical timing section <--
#ifdef FHA
- if ((rf_status & FHA_EFFECTIVE) && (statisticPointer == 0)) // Analyse channel statistic
- frequencyStatistic[frequencyIndex] = 0; // Reset statistic
+ if ((rf_status & FHA_EFFECTIVE) && (statisticPointer == 0)) // Analyse channel statistic
+ frequencyStatistic[frequencyIndex] = 0; // Reset statistic
#endif
- rf_rx_counter = 0x00; // Reset the pointer of frame
- rf_rx_state = 0x00; // Reset RX state machine
- rx_buffer_ready = 0x00; // Reset ready rx buffer flag
- checksum = 0x00; // Reset checksum
- }
- else if (rfStateCount == 0x07) // Set RX on
+ rf_rx_counter = 0x00; // Reset the pointer of frame
+ rf_rx_state = 0x00; // Reset RX state machine
+ rx_buffer_ready = 0x00; // Reset ready rx buffer flag
+ checksum = 0x00; // Reset checksum
+ }
+ else if (rfStateCount == 0x07) // Set RX on
+ {
+ // --> Critical timing section. Don't add code! <--
+ output(OCR1A, input(OCR1A) + T_RX_ON); // Update timer (150 S)
+ set_rxon; // Set RX on
+ // --> End of critical timing section <--
+ sof_ary[0] = channel; // Setup SOFs!!
+ }
+ else if (rfStateCount == 0x08) // Start reception
+ {
+ // --> Critical timing section. Don't add code! <--
+ output(OCR1A, input(OCR1A) + T_MAX_PAC_RX); // Update timer (650 S)
+ output(UCSR0A, 0x00); // Reset usart
+ output(UCSR0B, 0x90); // Interrupt on RX complete + RX enable
+ output(UCSR0C, 0x46); // Synchronous usart + 8 bits
+ // --> End of critical timing section <--
+ }
+ else if (rfStateCount == 0x09) // Wait RX complete and resync
+ {
+ // --> Critical timing section. Don't add code! <--
+ output(OCR1A, input(OCR1A) + T_RX2TX); // Resync MASTER
+ output(UCSR0A, 0x00); // Reset Usart
+ output(UCSR0B, 0x00);
+ output(UCSR0C, 0x00);
+ pwr_dwn_atr2406(); // Stop ATR2406
+ // --> Critical timing section. Don't add code! <--
+ rfStateCount = 0x00; // Reset timer 1 state machine
+
+ if ((rf_rx_state == 0xFF) && (checksum == 0x00)) // Correct recieve
{
- // --> Critical timing section. Don't add code! <--
- output(OCR1A,input(OCR1A)+T_RX_ON); // Update timer (150 S)
- set_rxon; // Set RX on
- // --> End of critical timing section <--
- sof_ary[0] = channel; // Setup SOFs!!
+ rx_buffer_ready = 0x01; // Set rx_buffer_ready flag
+ //DEBUG
+ PORTC ^= 0x08;
+ //DEBUG
+ watchdog = 0; // Reset watchdog variable
}
- else if (rfStateCount == 0x08) // Start reception
+ else // No correct recieve
{
- // --> Critical timing section. Don't add code! <--
- output(OCR1A,input(OCR1A)+T_MAX_PAC_RX); // Update timer (650 S)
- output(UCSR0A,0x00); // Reset usart
- output(UCSR0B,0x90); // Interrupt on RX complete + RX enable
- output(UCSR0C,0x46); // Synchronous usart + 8 bits
- // --> End of critical timing section <--
- }
- else if (rfStateCount == 0x09) // Wait RX complete and resync
- {
- // --> Critical timing section. Don't add code! <--
- output(OCR1A,input(OCR1A)+T_RX2TX); // Resync MASTER
- output(UCSR0A,0x00); // Reset Usart
- output(UCSR0B,0x00);
- output(UCSR0C,0x00);
- pwr_dwn_atr2406(); // Stop ATR2406
- // --> Critical timing section. Don't add code! <--
- rfStateCount = 0x00; // Reset timer 1 state machine
-
-
- if ((rf_rx_state==0xFF) && (checksum==0x00)) // Correct recieve
+ errorFrame = 1; // Mark bad frame
+ if (rf_status & LOGGED)
+ {
+ watchdog++;
+ if (watchdog == 255)
{
- rx_buffer_ready = 0x01; // Set rx_buffer_ready flag
- //DEBUG
- PORTC ^= 0x08;
- //DEBUG
- watchdog = 0; // Reset watchdog variable
+ PORTD |= 0x80; // Off line radio
}
- else // No correct recieve
- {
- errorFrame = 1; // Mark bad frame
- if (rf_status & LOGGED)
- ...
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