[tuxdroid-svn] r511 - firmware/tuxcore/trunk
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[tuxdroid-svn] r511 - firmware/tuxcore/trunk
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From: jaguarondi <c2m...@c2...> - 2007-09-12 09:21:44
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Author: jaguarondi
Date: 2007-09-12 11:21:16 +0200 (Wed, 12 Sep 2007)
New Revision: 511
Modified:
firmware/tuxcore/trunk/global.h
firmware/tuxcore/trunk/main.c
Log:
* Cleaned the main tick timer interrupt and initialization. Added flags for
4ms, 100ms and 1s ticks. All actions triggered by these ticks have been moved
from the interrupt into the main loop. Counters and flags are now static to
main.c.
This affects a couple of functions as the timing will be a bit less accurate
though I don't think this will be noticeable.
Modified: firmware/tuxcore/trunk/global.h
===================================================================
--- firmware/tuxcore/trunk/global.h 2007-09-12 09:14:40 UTC (rev 510)
+++ firmware/tuxcore/trunk/global.h 2007-09-12 09:21:16 UTC (rev 511)
@@ -162,13 +162,6 @@
extern volatile GSTATUS gStatus;
/*
- * Software timers
- */
-extern uint8_t t4ms_tim; /* 4ms main tick timer */
-extern uint8_t t100ms_tim; /* 100ms tick timer */
-extern uint8_t t1s_tim; /* 1s tick timer XXX unused */
-
-/*
* intflags
* Flags that are set inside interrupts, and reset outside when processed
*/
Modified: firmware/tuxcore/trunk/main.c
===================================================================
--- firmware/tuxcore/trunk/main.c 2007-09-12 09:14:40 UTC (rev 510)
+++ firmware/tuxcore/trunk/main.c 2007-09-12 09:21:16 UTC (rev 511)
@@ -49,83 +49,90 @@
#include "config.h"
#include "debug.h"
+/*
+ * DEBUG: if stack debugging is enabled in debug.h, this macro initializes the
+ * ram with a constant value in order to catch stack overflow by examining the
+ * stack at a breakpoint.
+ */
+DBG_STACK_INIT
+
+/** \brief Bool type. */
+typedef enum
+{
+ TRUE = 1,
+ FALSE = 0,
+} bool;
+
+/**
+ * \name Software timers
+ * The main tick has a period of 4ms and is driven by a hardware timer
+ * interrupt. Counters are used to get 100ms and 1s ticks.
+ * @{ */
+/** Flag set each 4ms. */
+static bool t4ms_flag;
+/** Flag set each 100ms. */
+static bool t100ms_flag;
+/** Flag set each 1s. */
+static bool t1s_flag;
+/** f4ms counter used to get the 100ms tick. */
+static uint8_t t4ms_cnt;
+/** 100ms counter used to get the 1s tick. */
+static uint8_t t100ms_cnt;
+/*! @} */
+
void initIO(void);
void closeIO(void);
-void timer2Init(void);
void updateStatus(void);
void sleep(void);
/*
* External variables
+ * XXX to be removed from here
*/
volatile GSTATUS gStatus;
extern volatile uint8_t i2c_pause;
-/*
- * Software timers
- */
-uint8_t t4ms_tim; /* 4ms main tick timer */
-uint8_t t100ms_tim; /* 100ms tick timer */
-uint8_t t1s_tim; /* 1s tick timer */
+/**
+ \brief Main tick timer intitialization
+ \fn main_tick_init
-/*
- * If stack debugging is enabled, this macro initializes the ram with a
- * constant value in order to catch stack overflow by examining the stack at a
- * breakpoint.
- */
-DBG_STACK_INIT
+ Main tick period: 4ms
+ Prescaler: 256
+ The timer clock will be F_CPU/256 = 31.250 kHz
+ CTC mode of operation
+ Compare value: (F_CPU * 4) / (256UL * 1000)) = 125
+*/
+/** Compare value of the main tick timer. */
+#define MAIN_TICK_COMPARE 125
+void main_tick_init(void)
+{
+ TCCR2A = _BV(WGM21);
+ TCCR2B = _BV(CS22) | _BV(CS21);
+ TCNT2 = 0x00;
+ OCR2A = MAIN_TICK_COMPARE;
+ TIMSK2 = _BV(OCIE2A);
+}
-/*
- * Timer2 overflow interrupt will be called each 4ms
- * and will provide 100ms and 1s counters
- *
- * Ext int counters will also be managed
+/**
+ \brief Main tick timer interrupt.
+ This interrupt is called each 4ms on the timer2 compare match. 100ms and 1s
+ ticks are also computed from software counters. Flags are set on each
+ different ticks: 4ms flag, 100ms flag and 1s flag.
*/
ISR(SIG_OUTPUT_COMPARE2A)
{
- t4ms_tim++;
-
- motor_control();
-
- /* Every 100ms, update status and send it to the computer */
- if (t4ms_tim == 25)
+ t4ms_cnt++;
+ t4ms_flag = TRUE;
+ if (t4ms_cnt == 25)
{
- t4ms_tim = 0;
- /* Every 1s */
- if (++t100ms_tim == 10)
+ t4ms_cnt = 0;
+ t100ms_flag = TRUE;
+ if (++t100ms_cnt == 10)
{
- t100ms_tim = 0;
- t1s_tim++;
- ir_send_flg = 1;
+ t100ms_cnt = 0;
+ t1s_flag = TRUE;
}
-
- updateStatusFlag = 1;
- if (event_timer)
- {
- event_timer--;
- event_manager_flag = 1;
- }
}
-
- if (i2c_pause)
- i2c_pause--; /* delay after a nack */
- /* Communication */
-// commandProcessFlag = 1;
-
- if (ir_delay)
- ir_delay--;
-
- /* Led blinking */
- if (led_delay)
- {
- led_delay--;
- if (!led_delay)
- {
- toggleLeds();
- if (--led_blinking_cnt)
- led_delay = led_blinking_pw;
- }
- }
}
/*
@@ -137,7 +144,7 @@
initPosSwitches();
initMotors();
initIR();
- timer2Init();
+ main_tick_init();
initIO();
config_init();
@@ -152,6 +159,46 @@
*/
for (;;)
{
+ if (t4ms_flag)
+ {
+ t4ms_flag = FALSE;
+ motor_control();
+
+ if (i2c_pause)
+ i2c_pause--; /* delay after a nack */
+ /* Communication */
+ // commandProcessFlag = 1;
+
+ if (ir_delay)
+ ir_delay--;
+
+ /* Led blinking */
+ if (led_delay)
+ {
+ led_delay--;
+ if (!led_delay)
+ {
+ toggleLeds();
+ if (--led_blinking_cnt)
+ led_delay = led_blinking_pw;
+ }
+ }
+ }
+ if (t100ms_flag)
+ {
+ t100ms_flag = FALSE;
+ updateStatusFlag = 1; /* XXX to move */
+ if (event_timer) /* XXX to move */
+ {
+ event_timer--;
+ event_manager_flag = 1;
+ }
+ }
+ if (t1s_flag)
+ {
+ t1s_flag = FALSE;
+ ir_send_flg = 1;
+ }
/*
* Communication: updating status, receiving and sending commands
*/
@@ -241,27 +288,6 @@
turnIrOff();
}
-/*
- * timer 2 intitialisation
- *
- * Main tick timer every 4ms. A 8 bits software counter
- * will provide ticks at 100ms and 1s
- *
- * CTC mode of operation, compare at 125 == 4ms
- * Prescaler F_CPU/256 : 31.250 kHz
- */
-#define MAIN_TICK 4 // ms
-#define TIM2_CMP 125 //((F_CPU * MAIN_TICK) / (256UL * 1000))
-
-void timer2Init(void)
-{
- TCCR2A = _BV(WGM21);
- TCCR2B = _BV(CS22) | _BV(CS21);
- TCNT2 = 0x00;
- OCR2A = TIM2_CMP;
- TIMSK2 = _BV(OCIE2A);
-}
-
#define STATUS_BYTE_SIZE 20
void updateStatus(void)
{
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