[tuxdroid-svn] r1317 - firmware/rf/trunk

[jaguarondi <c2m...@c2...>]

Author: jaguarondi
Date: 2008-07-09 11:47:18 +0200 (Wed, 09 Jul 2008)
New Revision: 1317

Modified:
   firmware/rf/trunk/defines.h
   firmware/rf/trunk/rf_ctrl.c
Log:
* Some more minor stuff before changing the timings of the RF frame.

Modified: firmware/rf/trunk/defines.h
===================================================================
--- firmware/rf/trunk/defines.h	2008-07-09 09:04:09 UTC (rev 1316)
+++ firmware/rf/trunk/defines.h	2008-07-09 09:47:18 UTC (rev 1317)
@@ -50,6 +50,9 @@
 #define MASTER 0x40
 #define SLAVE 0x80
 
+/*
+ * RF-Specifc-Defines
+ */
 /* I/O ports for the ATR2406 */
 #define CLOCK_PORT PORTD
 #define CLOCK_DDR DDRD
@@ -90,28 +93,27 @@
 
 #define in_rxd (PIND & 0x01)
 
-//Hardware Definitions
-
-//----->RF-Specifc-Defines<-----//
 /* S[SC] of channel 0 in TX mode, p. 10 of datasheet */
 #define CH00TX 27
 /* S[SC] of channel 0 in RX mode, p. 10 of datasheet */
 #define CH00RX 28
 
-//T_SLOT == 1ms ==> every 1000us 48Bytes of payload are exchanged
-#define POLL_LOOPS	 4
-#define T_1ms		 1728      //exact -> 1000us
-#define T_PWR_UP_TX	 69		   //69 == 40us(39.93)
-#define T_LOOP_TX    363       //363 == 210us(210.07)
-#define T_TX2RX      1296      //1296 == 750us(749.99)
-#define T_PWR_UP_RX	 69		   //69 == 40us(39.93)
-#define T_LOOP_RX    276       //276 == 160us(159.72)
-#define T_RX_ON      87        //87 == 50us(50.35)
-#define T_MAX_PAC_RX 1124      //1124 == 650us(650.46)
-#define T_RX2TX      172       //172 == 100us(99.54)
-#define T_TS_SOLL	 979       //979 == 566.32us(566.55)
+/*
+ * T_SLOT == 1ms ==> every 1000us 48 Bytes of payload are exchanged
+ */
+#define POLL_LOOPS 4
+#define T_1ms 1728 //exact -> 1000us
+#define T_PWR_UP_TX 69 //69 == 40us(39.93)
+#define T_LOOP_TX 363 //363 == 210us(210.07)
+#define T_TX2RX 1296 //1296 == 750us(749.99)
+#define T_PWR_UP_RX 69 //69 == 40us(39.93)
+#define T_LOOP_RX 276 //276 == 160us(159.72)
+#define T_RX_ON 87 //87 == 50us(50.35)
+#define T_MAX_PAC_RX 1124 //1124 == 650us(650.46)
+#define T_RX2TX 172 //172 == 100us(99.54)
+#define T_TS_SOLL 979 //979 == 566.32us(566.55)
 #define T_START_SYNC 1086//1065 - 31 //(1065 - 31) == 616.32us(616.09) [31 == calc time!!(17.94us)]
-#define T_SYNC		 1086//1065      //1065 == 616.32(616.32)
+#define T_SYNC 1086//1065 //1065 == 616.32(616.32)
 // ==> 48KB/second (384.000bps)
 
 #endif /* DEFINES_H */

Modified: firmware/rf/trunk/rf_ctrl.c
===================================================================
--- firmware/rf/trunk/rf_ctrl.c	2008-07-09 09:04:09 UTC (rev 1316)
+++ firmware/rf/trunk/rf_ctrl.c	2008-07-09 09:47:18 UTC (rev 1317)
@@ -48,18 +48,17 @@
 
 ISR (SIG_OUTPUT_COMPARE1A)
 {
-    rf_state = (rf_state + 1) & 7;
     switch(rf_state)
     {
     /*
      * TX
      */
-    case 0x01:
+    case 0x00:
         /* Power up for TX. */
         pwr_up_atr2406();
         OCR1A = OCR1A+T_PWR_UP_TX;
         break;
-    case 0x02:
+    case 0x01:
         /* Configure in TX. */
 #ifdef NOHOPP
         channel = TRX_CHANNEL;
@@ -88,7 +87,7 @@
         //PACKET CALCULATIONS
 
         break;
-    case 0x03:
+    case 0x02:
         /* Start transmission. */
         OCR1A = OCR1A + T_TX2RX;
         rf_tx_counter = 0x00;
@@ -125,7 +124,7 @@
     /*
      * RX
      */
-    case 0x04:
+    case 0x03:
         /* End of TX, power up for RX. */
 
         /* Request a SPI communication. */
@@ -139,7 +138,7 @@
         pwr_up_atr2406();
         OCR1A = OCR1A+T_PWR_UP_RX;
         break;
-    case 0x05:
+    case 0x04:
         /* Configure in RX mode. */
 #ifdef NOHOPP
         channel = TRX_CHANNEL;
@@ -166,14 +165,14 @@
         //PIN configuration for input or output
         DDRD = DDRD&0xEF;//XCK PIN set to input!!
         break;
-    case 0x06:
+    case 0x05:
         /* Start receiving. */
         OCR1A = OCR1A+T_RX_ON;
         set_rxon();//power up RF-Chip in receive mode
         //Setup SOFs!!
         sof_ary[0] = channel;
         break;
-    case 0x07:
+    case 0x06:
         /* Used to resync probably. */
         checksum = 0x00;
         UCSR0A = 0x00;
@@ -181,7 +180,7 @@
         UCSR0C = 0x46;
         OCR1A = OCR1A+T_MAX_PAC_RX;
         break;
-    case 0x00:
+    case 0x07:
         /* RX complete, check what we got. */
         UCSR0A = 0x00;
         UCSR0B = 0x00;
@@ -216,28 +215,21 @@
         }
         break;
     }
+    rf_state = (rf_state + 1) & 7;
 }
 
-//*****************************************************************************
-//* Project: RF-Firmware for ISM                                              *
-//* Function: pwr_up_atr2406                                                  *
-//* Parameters: None                                                          *
-//* Returns: None                                                             *
-//* Action: init Timer1                                                       *
-//* Duration: tbd                                                             *
-//* Size: tbd                                                                 *
-//* Date: 31.01.06                                                            *
-//* Description: Basic setup and start of the RF - Timer (Timer1)             *
-//*****************************************************************************
+/*
+ * Setup 16 bit timer1 which is used to generate all RF related timings.
+ * We're using a crystal @ sys_clk = 13.824 MHz
+ */
 void start_rf_timer(void)
 {
-    //setup 16 bit timer1 to generate all rf related timings
     TCNT1H = 0x00;
     TCNT1L = 0x00;
     TCCR1A = 0x00;
-    TCCR1B = 0x02;//clocksource enabled @ sys_clk/8 ==> 1 click == 578,704ns
-    TIMSK1 = 0x02;//enable compare A irq
-    TIFR1 = 0x02; //clear all flags
+    TCCR1B = 0x02; /* sys_clk/8 ==> 1 click = 578,704ns */
+    TIMSK1 = 0x02; /* Enable compare A IRQ */
+    TIFR1 = 0x02; /* Clear all flags */
 }
 
 //*****************************************************************************