Update:
I looked into the netlist some more. It looks like the netlist is still functional. The proper net connections are made in addition to the hierarchical pins being added as connections.

I haven't verified that all connections are correct in my netlist yet, but it seems that the fix may only be to not add hierarchical symbol pins to the list of pins under a net. For example, if R1 resides in hierarchical element H1, and R1.1 is connected to the "INPUT" pin in the hierarchical symbol, which is GND in the high level schematic, R1_H1.1 should be in the GND net. Right now, H1.x also appears in the GND net, where x is whatever pin number the "INPUT" pin ended up under.

However, if the layout package merges nets that have common pins, then having duplicate hierarchical symbol pin numbers could merge nets where they should not be merged. Ensuring that there are only unique numbers for the pins in a hierarchical net would prevent this possibility.