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|
From: Konrad R. W. <kon...@or...> - 2011-08-31 19:05:08
|
From: Liang Tang <lia...@or...>
Which by default will be x86_acpi_suspend_lowlevel.
This registration allows us to register another callback
if there is a need to use another platform specific callback.
CC: Thomas Gleixner <tg...@li...>
CC: "H. Peter Anvin" <hp...@zy...>
CC: x8...@ke...
CC: Len Brown <len...@in...>
CC: Joseph Cihula <jos...@in...>
CC: Shane Wang <sha...@in...>
CC: lin...@li...
CC: lin...@vg...
CC: Len Brown <len...@in...>
Signed-off-by: Konrad Rzeszutek Wilk <kon...@or...>
Signed-off-by: Liang Tang <lia...@or...>
---
arch/x86/include/asm/acpi.h | 2 +-
arch/x86/kernel/acpi/boot.c | 2 ++
arch/x86/kernel/acpi/sleep.c | 4 ++--
arch/x86/kernel/acpi/sleep.h | 2 ++
drivers/acpi/sleep.c | 2 ++
5 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h
index 49864a1..a5f0b73 100644
--- a/arch/x86/include/asm/acpi.h
+++ b/arch/x86/include/asm/acpi.h
@@ -118,7 +118,7 @@ static inline void acpi_disable_pci(void)
}
/* Low-level suspend routine. */
-extern int acpi_suspend_lowlevel(void);
+extern int (*acpi_suspend_lowlevel)(void);
extern const unsigned char acpi_wakeup_code[];
#define acpi_wakeup_address (__pa(TRAMPOLINE_SYM(acpi_wakeup_code)))
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index d191b4c..92f4f38 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -44,6 +44,7 @@
#include <asm/mpspec.h>
#include <asm/smp.h>
+#include "sleep.h" /* To include x86_acpi_suspend_lowlevel */
static int __initdata acpi_force = 0;
u32 acpi_rsdt_forced;
int acpi_disabled;
@@ -555,6 +556,7 @@ int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
int (*__acpi_override_sleep)(u8 sleep_state, u32 pm1a_ctrl,
u32 pm1b_ctrl, bool *skip_rest) = NULL;
+int (*acpi_suspend_lowlevel)(void) = x86_acpi_suspend_lowlevel;
/*
* success: return IRQ number (>=0)
* failure: return < 0
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 103b6ab..4d2d0b1 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -25,12 +25,12 @@ static char temp_stack[4096];
#endif
/**
- * acpi_suspend_lowlevel - save kernel state
+ * x86_acpi_suspend_lowlevel - save kernel state
*
* Create an identity mapped page table and copy the wakeup routine to
* low memory.
*/
-int acpi_suspend_lowlevel(void)
+int x86_acpi_suspend_lowlevel(void)
{
struct wakeup_header *header;
/* address in low memory of the wakeup routine. */
diff --git a/arch/x86/kernel/acpi/sleep.h b/arch/x86/kernel/acpi/sleep.h
index 416d4be..4d3feb5 100644
--- a/arch/x86/kernel/acpi/sleep.h
+++ b/arch/x86/kernel/acpi/sleep.h
@@ -13,3 +13,5 @@ extern unsigned long acpi_copy_wakeup_routine(unsigned long);
extern void wakeup_long64(void);
extern void do_suspend_lowlevel(void);
+
+extern int x86_acpi_suspend_lowlevel(void);
diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
index 6c94960..a6da454 100644
--- a/drivers/acpi/sleep.c
+++ b/drivers/acpi/sleep.c
@@ -254,6 +254,8 @@ static int acpi_suspend_enter(suspend_state_t pm_state)
break;
case ACPI_STATE_S3:
+ if (!acpi_suspend_lowlevel)
+ return -ENODEV;
error = acpi_suspend_lowlevel();
if (error)
return error;
--
1.7.4.1
|
|
From: Konrad R. W. <kon...@or...> - 2011-08-31 19:04:39
|
The ACPI suspend path makes a call to tboot_sleep right before
it writes the PM1A, PM1B values. We replace the direct call to
tboot via an registration callback similar to __acpi_register_gsi.
CC: Thomas Gleixner <tg...@li...>
CC: "H. Peter Anvin" <hp...@zy...>
CC: x8...@ke...
CC: Len Brown <len...@in...>
CC: Joseph Cihula <jos...@in...>
CC: Shane Wang <sha...@in...>
CC: xen...@li...
CC: lin...@li...
CC: tbo...@li...
CC: lin...@vg...
Signed-off-by: Konrad Rzeszutek Wilk <kon...@or...>
---
arch/x86/include/asm/acpi.h | 3 +++
arch/x86/kernel/acpi/boot.c | 3 +++
arch/x86/kernel/tboot.c | 13 +++++++++----
drivers/acpi/acpica/hwsleep.c | 12 ++++++++++--
include/linux/tboot.h | 3 ++-
5 files changed, 27 insertions(+), 7 deletions(-)
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h
index 610001d..49864a1 100644
--- a/arch/x86/include/asm/acpi.h
+++ b/arch/x86/include/asm/acpi.h
@@ -98,6 +98,9 @@ void acpi_pic_sci_set_trigger(unsigned int, u16);
extern int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
int trigger, int polarity);
+extern int (*__acpi_override_sleep)(u8 sleep_state, u32 pm1a_ctrl,
+ u32 pm1b_ctrl, bool *skip_rest);
+
static inline void disable_acpi(void)
{
acpi_disabled = 1;
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 4558f0d..d191b4c 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -552,6 +552,9 @@ static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi,
int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
int trigger, int polarity) = acpi_register_gsi_pic;
+int (*__acpi_override_sleep)(u8 sleep_state, u32 pm1a_ctrl,
+ u32 pm1b_ctrl, bool *skip_rest) = NULL;
+
/*
* success: return IRQ number (>=0)
* failure: return < 0
diff --git a/arch/x86/kernel/tboot.c b/arch/x86/kernel/tboot.c
index 30ac65d..a18070c 100644
--- a/arch/x86/kernel/tboot.c
+++ b/arch/x86/kernel/tboot.c
@@ -41,7 +41,7 @@
#include <asm/setup.h>
#include <asm/e820.h>
#include <asm/io.h>
-
+#include <linux/acpi.h>
#include "acpi/realmode/wakeup.h"
/* Global pointer to shared data; NULL means no measured launch. */
@@ -270,7 +270,8 @@ static void tboot_copy_fadt(const struct acpi_table_fadt *fadt)
offsetof(struct acpi_table_facs, firmware_waking_vector);
}
-void tboot_sleep(u8 sleep_state, u32 pm1a_control, u32 pm1b_control)
+int tboot_sleep(u8 sleep_state, u32 pm1a_control, u32 pm1b_control,
+ bool *skip_rest)
{
static u32 acpi_shutdown_map[ACPI_S_STATE_COUNT] = {
/* S0,1,2: */ -1, -1, -1,
@@ -279,7 +280,7 @@ void tboot_sleep(u8 sleep_state, u32 pm1a_control, u32 pm1b_control)
/* S5: */ TB_SHUTDOWN_S5 };
if (!tboot_enabled())
- return;
+ return AE_OK;
tboot_copy_fadt(&acpi_gbl_FADT);
tboot->acpi_sinfo.pm1a_cnt_val = pm1a_control;
@@ -290,10 +291,12 @@ void tboot_sleep(u8 sleep_state, u32 pm1a_control, u32 pm1b_control)
if (sleep_state >= ACPI_S_STATE_COUNT ||
acpi_shutdown_map[sleep_state] == -1) {
pr_warning("unsupported sleep state 0x%x\n", sleep_state);
- return;
+ return AE_ERROR;
}
tboot_shutdown(acpi_shutdown_map[sleep_state]);
+
+ return AE_OK;
}
static atomic_t ap_wfs_count;
@@ -343,6 +346,8 @@ static __init int tboot_late_init(void)
atomic_set(&ap_wfs_count, 0);
register_hotcpu_notifier(&tboot_cpu_notifier);
+
+ __acpi_override_sleep = tboot_sleep;
return 0;
}
diff --git a/drivers/acpi/acpica/hwsleep.c b/drivers/acpi/acpica/hwsleep.c
index 2ac28bb..31d1198 100644
--- a/drivers/acpi/acpica/hwsleep.c
+++ b/drivers/acpi/acpica/hwsleep.c
@@ -45,7 +45,6 @@
#include <acpi/acpi.h>
#include "accommon.h"
#include "actables.h"
-#include <linux/tboot.h>
#define _COMPONENT ACPI_HARDWARE
ACPI_MODULE_NAME("hwsleep")
@@ -343,8 +342,17 @@ acpi_status asmlinkage acpi_enter_sleep_state(u8 sleep_state)
ACPI_FLUSH_CPU_CACHE();
- tboot_sleep(sleep_state, pm1a_control, pm1b_control);
+ if (__acpi_override_sleep) {
+ bool skip_rest = false;
+ status = __acpi_override_sleep(sleep_state, pm1a_control,
+ pm1b_control, &skip_rest);
+
+ if (ACPI_FAILURE(status))
+ return_ACPI_STATUS(status);
+ if (skip_rest)
+ return_ACPI_STATUS(AE_OK);
+ }
/* Write #2: Write both SLP_TYP + SLP_EN */
status = acpi_hw_write_pm1_control(pm1a_control, pm1b_control);
diff --git a/include/linux/tboot.h b/include/linux/tboot.h
index 1dba6ee..19badbd 100644
--- a/include/linux/tboot.h
+++ b/include/linux/tboot.h
@@ -143,7 +143,8 @@ static inline int tboot_enabled(void)
extern void tboot_probe(void);
extern void tboot_shutdown(u32 shutdown_type);
-extern void tboot_sleep(u8 sleep_state, u32 pm1a_control, u32 pm1b_control);
+extern int tboot_sleep(u8 sleep_state, u32 pm1a_control, u32 pm1b_control,
+ bool *skip);
extern struct acpi_table_header *tboot_get_dmar_table(
struct acpi_table_header *dmar_tbl);
extern int tboot_force_iommu(void);
--
1.7.4.1
|
|
From: Konrad R. W. <kon...@or...> - 2011-08-31 19:04:26
|
The MSI restore function will become a function pointer in an
x86_msi_ops struct. It defaults to the implementation in the
io_apic.c and msi.c. We piggyback on the indirection mechanism
introduced by "x86: Introduce x86_msi_ops".
Cc: x8...@ke...
Cc: Thomas Gleixner <tg...@li...>
Cc: "H. Peter Anvin" <hp...@zy...>
Signed-off-by: Konrad Rzeszutek Wilk <kon...@or...>
---
arch/x86/include/asm/pci.h | 9 +++++++++
arch/x86/include/asm/x86_init.h | 1 +
arch/x86/kernel/x86_init.c | 1 +
drivers/pci/msi.c | 29 +++++++++++++++++++++++++++--
4 files changed, 38 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index d498943..df75d07 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -112,19 +112,28 @@ static inline void x86_teardown_msi_irq(unsigned int irq)
{
x86_msi.teardown_msi_irq(irq);
}
+static inline void x86_restore_msi_irqs(struct pci_dev *dev, int irq)
+{
+ x86_msi.restore_msi_irqs(dev, irq);
+}
#define arch_setup_msi_irqs x86_setup_msi_irqs
#define arch_teardown_msi_irqs x86_teardown_msi_irqs
#define arch_teardown_msi_irq x86_teardown_msi_irq
+#define arch_restore_msi_irqs x86_restore_msi_irqs
/* implemented in arch/x86/kernel/apic/io_apic. */
int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
void native_teardown_msi_irq(unsigned int irq);
+void native_restore_msi_irqs(struct pci_dev *dev, int irq);
/* default to the implementation in drivers/lib/msi.c */
#define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
+#define HAVE_DEFAULT_MSI_RESTORE_IRQS
void default_teardown_msi_irqs(struct pci_dev *dev);
+void default_restore_msi_irqs(struct pci_dev *dev, int irq);
#else
#define native_setup_msi_irqs NULL
#define native_teardown_msi_irq NULL
#define default_teardown_msi_irqs NULL
+#define default_restore_msi_irqs NULL
#endif
#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index d3d8590..7af18be 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -174,6 +174,7 @@ struct x86_msi_ops {
int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
void (*teardown_msi_irq)(unsigned int irq);
void (*teardown_msi_irqs)(struct pci_dev *dev);
+ void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
};
extern struct x86_init_ops x86_init;
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index 6f164bd..bd1fe10 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -110,4 +110,5 @@ struct x86_msi_ops x86_msi = {
.setup_msi_irqs = native_setup_msi_irqs,
.teardown_msi_irq = native_teardown_msi_irq,
.teardown_msi_irqs = default_teardown_msi_irqs,
+ .restore_msi_irqs = default_restore_msi_irqs,
};
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 2f10328..f1fd801 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -85,6 +85,31 @@ void default_teardown_msi_irqs(struct pci_dev *dev)
}
#endif
+#ifndef arch_restore_msi_irqs
+# define arch_restore_msi_irqs default_restore_msi_irqs
+# define HAVE_DEFAULT_MSI_RESTORE_IRQS
+#endif
+
+#ifdef HAVE_DEFAULT_MSI_RESTORE_IRQS
+void default_restore_msi_irqs(struct pci_dev *dev, int irq)
+{
+ struct msi_desc *entry;
+
+ entry = NULL;
+ if (dev->msix_enabled) {
+ list_for_each_entry(entry, &dev->msi_list, list) {
+ if (irq == entry->irq)
+ break;
+ }
+ } else if (dev->msi_enabled) {
+ entry = irq_get_msi_desc(irq);
+ }
+
+ if (entry)
+ write_msi_msg(irq, &entry->msg);
+}
+#endif
+
static void msi_set_enable(struct pci_dev *dev, int pos, int enable)
{
u16 control;
@@ -359,7 +384,7 @@ static void __pci_restore_msi_state(struct pci_dev *dev)
pci_intx_for_msi(dev, 0);
msi_set_enable(dev, pos, 0);
- write_msi_msg(dev->irq, &entry->msg);
+ arch_restore_msi_irqs(dev, dev->irq);
pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
msi_mask_irq(entry, msi_capable_mask(control), entry->masked);
@@ -387,7 +412,7 @@ static void __pci_restore_msix_state(struct pci_dev *dev)
pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
list_for_each_entry(entry, &dev->msi_list, list) {
- write_msi_msg(entry->irq, &entry->msg);
+ arch_restore_msi_irqs(dev, entry->irq);
msix_mask_irq(entry, entry->masked);
}
--
1.7.4.1
|
|
From: Cihula, J. <jos...@in...> - 2011-08-30 18:43:45
|
> From: Martin Schneider [mailto:mar...@go...] > Sent: Monday, August 29, 2011 7:55 AM Please use the tboot-devel mailing list for discussions and questions; tboot-changelog is just for automated notifications from the source code control system. > Hi list, > > I am new to tboot / Intel TXT technology and have some questions, mainly concerning the role of > the TPM in the Intel TXT architecture. > > Up to now I went through the "Intel Safer computing Initiative" book by David Grawrock and think I > have a basic understanding what SINIT > does: Preparing a secure launch environment for a hypervisor and doing some measurements which are > put to the TPM of the system. When my understanding is correct, tboot is a specific implementation > for SINIT for being used with the XEN hypervisor...? I would say that tboot is a specific implementation of an MLE (Measured Launched Environment). Tboot encapsulates (most of) the TXT-specific knowledge so that it can launch an OS or VMM that is only minimally aware of TXT. Tboot works with Linux/KVM as well as with Xen. > What I absolutely do not understand is the role of the TPM in the architecture. Besides holding > the measurement values of the SHA-1 fingerprints from SINIT (PCR17) and the hypervisor (PCR18) I > do not see the need for the TPM. I does not enforce anything or make anything more secure? Or am I > mistaken here? Actually the TPM is only useful when I want to do some kind of remote attestation > of my environment. > The big problem I see is, that I can not use e.g. tboot when no TPM is available? Or am I > mistaken? The TPM is fundamental to the TXT architecture. Without a secure location for the measurements made by the TXT hardware, firmware, and software there would be no secure way of knowing that TXT was actually used for a launch. An MLE that does not use the TPM measurements for remote attestation or sealing cannot really be sure that it was launched with TXT. > My next big question is: what is different if I use tboot and when I do not. Where is the security > plus? If tboot, or some other TXT MLE, is not used then you are left with a static root of trust based in BIOS. David Grawrock's book should describe the differences between dynamic and static roots of trust (it is a bit much to go into via email). > It would be very kind of you to de-confuse me a little or point me to some useful reading > material... > > Best regards > Martin > > ------------------------------------------------------------------------------ > EMC VNX: the world's simplest storage, starting under $10K The only unified storage solution that > offers unified management Up to 160% more powerful than alternatives and 25% more efficient. > Guaranteed. http://p.sf.net/sfu/emc-vnx-dev2dev > _______________________________________________ > Tboot-changelog mailing list > Tbo...@li... > https://lists.sourceforge.net/lists/listinfo/tboot-changelog |
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From: <Cha...@gd...> - 2011-07-27 01:25:53
|
Hi, I am attempting to get tboot running on a Dell 640 laptop - Sandy Bridge chip set, so it requires a version 2 policy. My problem is that when I attempt to follow the steps for generating the LCP listed in lcptools2.txt, I get an error on the next to last step this is: Lcp_crtpollist -addsig -sig list_2.sig -out list_2_sig.lst This gives the following errors: Error: failed to verify list: error:04070006A:rsa routines:RSA_padding_check_PKCS1_type_1:block type is not 01 Error: signature file does not match policy list When I ran the program with some debug stuff in it, it appears that it is running past the end of the list_2_sig.lst file, attempting to verify a signature that is not there (because of the -nosig 3 steps before. What am I doing wrong? Thanks Charles |
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From: Yash J. <yas...@gm...> - 2011-07-22 12:47:09
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Hello All, i am developing on core i3 and atom based processor and I have decided to go with the Intel's TXT. As far as i understand the trusted boot will allow me to stop booting if there is any malicious/unauthorised kernel trying to boot the machine. which does the software integrity measurement between boot-loader and kernel. so before I start, I have few dumb questions to be clarified, 1. If I enable the trusted boot and later on when I want to upgrade/change the kernel, so how I will reconfigure my boot-loader to understand. 2. If by any chance, if the hard disk gets replaced then how do I reconfigure trusted boot. 3. If by any chance, If there was a failure only in BIOS and i need to replace the BIOS how do i reset my configurations. 4. How does boot-loader is authenticated. In other words, will BIOS check the integrity of boot-loader at power on stage. Any document on installation guide and tboot configuration will also be helpful. Thanks and Regards, Yeshpal Jain. ---------- Forwarded message ---------- From: Cihula, Joseph <jos...@in...> Date: Fri, Jul 22, 2011 at 12:06 AM Subject: [tboot-devel] FW: Trusted Boot - New Bee To: "tbo...@li..." <tbo...@li...> For some reason I don't see the message in the listserv's pending queue and I never got it, so I'm posting it for you. Joe -----Original Message----- From: yash2learn [mailto:yas...@gm...] Sent: Wednesday, July 20, 2011 10:07 PM To: tbo...@li... Subject: Trusted Boot - New Bee Hello All, I am very new to trusted boot, i wanted to the difference between the trusted grub and trusted boot. also could you please pass some information on how to install trusted boot. Thanks and Regards, Yeshpal Jain. ------------------------------------------------------------------------------ 5 Ways to Improve & Secure Unified Communications Unified Communications promises greater efficiencies for business. UC can improve internal communications as well as offer faster, more efficient ways to interact with customers and streamline customer service. Learn more! http://www.accelacomm.com/jaw/sfnl/114/51426253/ _______________________________________________ tboot-devel mailing list tbo...@li... https://lists.sourceforge.net/lists/listinfo/tboot-devel |
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From: Cihula, J. <jos...@in...> - 2011-07-21 18:37:02
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For some reason I don't see the message in the listserv's pending queue and I never got it, so I'm posting it for you. Joe -----Original Message----- From: yash2learn [mailto:yas...@gm...] Sent: Wednesday, July 20, 2011 10:07 PM To: tbo...@li... Subject: Trusted Boot - New Bee Hello All, I am very new to trusted boot, i wanted to the difference between the trusted grub and trusted boot. also could you please pass some information on how to install trusted boot. Thanks and Regards, Yeshpal Jain. |
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From: Cihula, J. <jos...@in...> - 2011-07-18 16:44:16
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The location of SINIT Authenticated Code Module (ACM) files is being moved from the tboot SourceForge site to the following location: http://software.intel.com/en-us/articles/intel-trusted-execution-technology/ The content, license, etc. of the ACMs has not changed. New ACMs and updates to existing ACMs will only be posted to the new site. The ACM content on tboot SourceForge site will be removed Aug. 1. Joe |
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From: Ben G. <ben...@gm...> - 2011-07-14 02:23:21
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If it makes a difference, I am running the grub2 that ships with ubuntu 11.04 - which is 1.99 with a few ubuntu patches on top of it.
/btg
On Jul 13, 2011, at 9:58 PM, "Wei, Gang" <gan...@in...> wrote:
> I will look into this issue. Thanks for raising it.
>
> Jimmy
>
>
>> -----Original Message-----
>> From: Ben Guthro [mailto:be...@gu...]
>> Sent: Thursday, July 07, 2011 1:06 AM
>> To: tbo...@li...
>> Cc: Ken Kane
>> Subject: [tboot-devel] tboot, xen, grub2 infinite loop
>>
>> I am attempting to get tboot working with Xen-4.0.2, grub2, and the
>> 2nd_gen_i5_i7_SINIT_19.BIN module working, but have been having
>> limited results, with things seeming to hang when loading xen
>>
>> I've traced this back to tboot/common/elf.c in expand_elf_image()
>>
>> objdump shows that tboot gets loaded at the following:
>>
>> start address 0x00803000
>>
>> Program Header:
>> LOAD off 0x00001000 vaddr 0x00803000 paddr 0x00803000 align
>> 2**12
>> filesz 0x00022000 memsz 0x0007ae60 flags rwx
>>
>>
>> ...and xen at the following:
>>
>> start address 0x00100000
>>
>> Program Header:
>> LOAD off 0x00000080 vaddr 0x00100000 paddr 0x00100000 align 2**6
>> filesz 0x00172000 memsz 0x002b8000 flags rwx
>>
>>
>> In the for loop in expand_elf_image, when it is doing the memcpy, and
>> memset - it seems to overwrite the heap, and get into an infinite loop
>>
>>
>> Is anyone else running into issues like this?
>>
>> Any suggestions, or ideas would be greatly appreciated.
>>
>>
>> Ben Guthro
>>
>>
>>
>> My grub entry looks like the following:
>>
>> menuentry "TXT: test1" {
>> saved_entry=0
>> save_env saved_entry
>> set root=(MyVG-MyBootDisk)
>> multiboot /tboot.gz logging=vga,memory serial=115200,8n1,0x4000,19
>> module /xen.gz com1=115200,8n1,magic console=com1
>> iommu=required dom0_mem=1024MB cpufreq=xen cpuidle
>> earlyprintk=xenboot
>> loglvl=all
>> module /vmlinuz-2.6.38 root=/dev/mapper/MyRootDisk ro quiet
>> splash xencons=tty console=hvc0
>> module /initrd.img-2.6.38
>> module /2nd_gen_i5_i7_SINIT_19.BIN
>> }
>>
>> tboot debug looks like the following:
>>
>> diff -r 17221ef98ed6 tboot/common/elf.c
>> --- a/tboot/common/elf.c
>> +++ b/tboot/common/elf.c
>> @@ -163,16 +163,29 @@
>>
>> /* assumed that already passed is_elf_image() check */
>>
>> +
>> /* load elf image into memory */
>> for ( int i = 0; i < elf->e_phnum; i++ ) {
>> elf_program_header_t *ph = (elf_program_header_t *)
>> ((void *)elf + elf->e_phoff + i*elf->e_phentsize);
>> -
>> + printk("i=%d\n", i);
>> + printk(" elf = 0x%x\n", (int)&elf);
>> + printk(" elf.e_phnum = 0x%x\n", elf->e_phnum);
>> + printk(" elf.p_phentsize = 0x%x\n", elf->e_phentsize);
>> + printk(" elf.p_phoff = 0x%x\n", elf->e_phoff);
>> + printk(" ph.p_filesz = 0x%x\n", ph->p_filesz);
>> + printk(" ph.p_memsz = 0x%x\n", ph->p_memsz);
>> + printk(" ph.p_addr = 0x%x\n", ph->p_paddr);
>> + printk(" ph.p_offset = 0x%x\n", ph->p_offset);
>> if ( ph->p_type == PT_LOAD ) {
>> memcpy((void *)ph->p_paddr, (void *)elf + ph->p_offset,
>> ph->p_filesz);
>> +#if 0
>> memset((void *)(ph->p_paddr + ph->p_filesz), 0,
>> ph->p_memsz - ph->p_filesz);
>> +#else
>> + break;
>> +#endif
>> }
>> }
>>
>>
>> And finally, my tboot debug output:
>>
>> TBOOT: ******************* TBOOT *******************
>> TBOOT: 2011-07-06 08:00 -0400 1:17221ef98ed6
>> TBOOT: *********************************************
>> TBOOT: command line: serial=115200,8n1,0x4000,19
>> TBOOT: BSP is cpu 0
>> TBOOT: original e820 map:
>> TBOOT: 0000000000000000 - 000000000009d800 (1)
>> TBOOT: 000000000009d800 - 00000000000a0000 (2)
>> TBOOT: 00000000000e0000 - 0000000000100000 (2)
>> TBOOT: 0000000000100000 - 00000000ba59f000 (1)
>> TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
>> TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
>> TBOOT: 00000000bab9f000 - 00000000babff000 (3)
>> TBOOT: 00000000babff000 - 00000000bac00000 (1)
>> TBOOT: 00000000bac00000 - 00000000bfa00000 (2)
>> TBOOT: 00000000f8000000 - 00000000fc000000 (2)
>> TBOOT: 00000000fec00000 - 00000000fec01000 (2)
>> TBOOT: 00000000fed08000 - 00000000fed09000 (2)
>> TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
>> TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
>> TBOOT: 00000000fee00000 - 00000000fee01000 (2)
>> TBOOT: 00000000ffd20000 - 0000000100000000 (2)
>> TBOOT: 0000000100000000 - 000000013e600000 (1)
>> TBOOT: TPM is ready
>> TBOOT: TPM nv_locked: TRUE
>> TBOOT: TPM timeout values: A: 750, B: 750, C: 750, D: 750
>> TBOOT: reading Verified Launch Policy from TPM NV...
>> TBOOT: :512 bytes read
>> TBOOT: policy:
>> TBOOT: version: 2
>> TBOOT: policy_type: TB_POLTYPE_HALT
>> TBOOT: hash_alg: TB_HALG_SHA1
>> TBOOT: policy_control: 00000001 (EXTEND_PCR17)
>> TBOOT: num_entries: 1
>> TBOOT: policy entry[0]:
>> TBOOT: mod_num: any
>> TBOOT: pcr: none
>> TBOOT: hash_type: TB_HTYPE_ANY
>> TBOOT: num_hashes: 0
>> TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
>> TBOOT: CPU is SMX-capable
>> TBOOT: CPU is VMX-capable
>> TBOOT: SMX is enabled
>> TBOOT: TXT chipset and all needed capabilities present
>> TBOOT: TXT.ERRORCODE=0
>> TBOOT: LT.ESTS=0
>> TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
>> TBOOT: CPU is SMX-capable
>> TBOOT: CPU is VMX-capable
>> TBOOT: SMX is enabled
>> TBOOT: TXT chipset and all needed capabilities present
>> TBOOT: unsupported BIOS data version (4)
>> TBOOT: bios_data (@0xbaf20008, 0x56):
>> TBOOT: version: 4
>> TBOOT: bios_sinit_size: 0x0 (0)
>> TBOOT: lcp_pd_base: 0x0
>> TBOOT: lcp_pd_size: 0x0 (0)
>> TBOOT: num_logical_procs: 4
>> TBOOT: flags: 0x00000000
>> TBOOT: CR0 and EFLAGS OK
>> TBOOT: supports preserving machine check errors
>> TBOOT: CPU is ready for SENTER
>> TBOOT: disabling legacy USB SMIs
>> TBOOT: checking previous errors on the last boot.
>> last boot has error.
>> TBOOT: chipset ids: vendor: 0x8086, device: 0xb001, revision: 0x1
>> TBOOT: chipset production fused: 1
>> TBOOT: checking if module is an SINIT for this platform...
>> TBOOT: ACM info_table version mismatch (4)
>> TBOOT: 1 ACM chipset id entries:
>> TBOOT: vendor: 0x8086, device: 0xb001, flags: 0x1, revision:
>> 0x1, extended: 0x0
>> TBOOT: SINIT matches platform
>> TBOOT: copied SINIT (size=c000) to 0xbaf00000
>> TBOOT: AC mod base alignment OK
>> TBOOT: AC mod size OK
>> TBOOT: AC module header dump for SINIT:
>> TBOOT: type: 0x2 (ACM_TYPE_CHIPSET)
>> TBOOT: length: 0xa1 (161)
>> TBOOT: version: 0
>> TBOOT: chipset_id: 0xb001
>> TBOOT: flags: 0x0
>> TBOOT: pre_production: 0
>> TBOOT: debug_signed: 0
>> TBOOT: vendor: 0x8086
>> TBOOT: date: 0x20110506
>> TBOOT: size*4: 0xc000 (49152)
>> TBOOT: code_control: 0x0
>> TBOOT: entry point: 0x00000008:000034ce
>> TBOOT: scratch_size: 0x8f (143)
>> TBOOT: info_table:
>> TBOOT: uuid: {0x7fc03aaa, 0x46a7, 0x18db, 0xac2e,
>> {0x69, 0x8f, 0x8d, 0x41, 0x7f, 0x5a}}
>> TBOOT: ACM_UUID_V3
>> TBOOT: chipset_acm_type: 0x1 (SINIT)
>> TBOOT: version: 4
>> TBOOT: length: 0x2c (44)
>> TBOOT: chipset_id_list: 0x4ec
>> TBOOT: os_sinit_data_ver: 0x5
>> TBOOT: min_mle_hdr_ver: 0x00020000
>> TBOOT: capabilities: 0x0000000e
>> TBOOT: rlp_wake_getsec: 0
>> TBOOT: rlp_wake_monitor: 1
>> TBOOT: ecx_pgtbl: 1
>> TBOOT: acm_ver: 19
>> TBOOT: chipset list:
>> TBOOT: count: 1
>> TBOOT: entry 0:
>> TBOOT: flags: 0x1
>> TBOOT: vendor_id: 0x8086
>> TBOOT: device_id: 0xb001
>> TBOOT: revision_id: 0x1
>> TBOOT: extended_id: 0x0
>> TBOOT: file addresses:
>> TBOOT: &_start=0x803000
>> TBOOT: &_end=0x87de60
>> TBOOT: &_mle_start=0x803000
>> TBOOT: &_mle_end=0x822000
>> TBOOT: &_post_launch_entry=0x803020
>> TBOOT: &_txt_wakeup=0x8031f0
>> TBOOT: &g_mle_hdr=0x818980
>> TBOOT: MLE header:
>> TBOOT: uuid={0x9082ac5a, 0x476f, 0x74a7, 0x5c0f,
>> {0x55, 0xa2, 0xcb, 0x51, 0xb6, 0x42}}
>> TBOOT: length=34
>> TBOOT: version=00020001
>> TBOOT: entry_point=00000020
>> TBOOT: first_valid_page=00000000
>> TBOOT: mle_start_off=0
>> TBOOT: mle_end_off=1f000
>> TBOOT: capabilities: 0x00000007
>> TBOOT: rlp_wake_getsec: 1
>> TBOOT: rlp_wake_monitor: 1
>> TBOOT: ecx_pgtbl: 1
>> TBOOT: MLE start=803000, end=822000, size=1f000
>> TBOOT: ptab_size=3000, ptab_base=0x800000
>> TBOOT: unsupported BIOS data version (4)
>> TBOOT: bios_data (@0xbaf20008, 0x56):
>> TBOOT: version: 4
>> TBOOT: bios_sinit_size: 0x0 (0)
>> TBOOT: lcp_pd_base: 0x0
>> TBOOT: lcp_pd_size: 0x0 (0)
>> TBOOT: num_logical_procs: 4
>> TBOOT: flags: 0x00000000
>> TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbac00000
>> TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x13e600000
>> TBOOT: no LCP module found
>> TBOOT: os_sinit_data (@0xbaf3017e, 0x64):
>> TBOOT: version: 5
>> TBOOT: mle_ptab: 0x800000
>> TBOOT: mle_size: 0x1f000 (126976)
>> TBOOT: mle_hdr_base: 0x15980
>> TBOOT: vtd_pmr_lo_base: 0x0
>> TBOOT: vtd_pmr_lo_size: 0xbac00000
>> TBOOT: vtd_pmr_hi_base: 0x100000000
>> TBOOT: vtd_pmr_hi_size: 0x3e600000
>> TBOOT: lcp_po_base: 0x0
>> TBOOT: lcp_po_size: 0x0 (0)
>> TBOOT: capabilities: 0x00000002
>> TBOOT: rlp_wake_getsec: 0
>> TBOOT: rlp_wake_monitor: 1
>> TBOOT: ecx_pgtbl: 0
>> TBOOT: efi_rsdt_ptr: 0x0
>> TBOOT: setting MTRRs for acmod: base=0xbaf00000, size=0xc000,
>> num_pages=12
>> TBOOT: executing GETSEC[SENTER]...
>> TBOOT: ******************* TBOOT *******************
>> TBOOT: 2011-07-06 08:00 -0400 1:17221ef98ed6
>> TBOOT: *********************************************
>> TBOOT: command line: serial=115200,8n1,0x4000,19
>> TBOOT: BSP is cpu 0
>> TBOOT: original e820 map:
>> TBOOT: 0000000000000000 - 000000000009d800 (1)
>> TBOOT: 000000000009d800 - 00000000000a0000 (2)
>> TBOOT: 00000000000e0000 - 0000000000100000 (2)
>> TBOOT: 0000000000100000 - 00000000ba59f000 (1)
>> TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
>> TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
>> TBOOT: 00000000bab9f000 - 00000000babff000 (3)
>> TBOOT: 00000000babff000 - 00000000bac00000 (1)
>> TBOOT: 00000000bac00000 - 00000000bfa00000 (2)
>> TBOOT: 00000000f8000000 - 00000000fc000000 (2)
>> TBOOT: 00000000fec00000 - 00000000fec01000 (2)
>> TBOOT: 00000000fed08000 - 00000000fed09000 (2)
>> TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
>> TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
>> TBOOT: 00000000fee00000 - 00000000fee01000 (2)
>> TBOOT: 00000000ffd20000 - 0000000100000000 (2)
>> TBOOT: 0000000100000000 - 000000013e600000 (1)
>> TBOOT: TPM is ready
>> TBOOT: TPM nv_locked: TRUE
>> TBOOT: TPM timeout values: A: 750, B: 750, C: 750, D: 750
>> TBOOT: reading Verified Launch Policy from TPM NV...
>> TBOOT: :512 bytes read
>> TBOOT: policy:
>> TBOOT: version: 2
>> TBOOT: policy_type: TB_POLTYPE_HALT
>> TBOOT: hash_alg: TB_HALG_SHA1
>> TBOOT: policy_control: 00000001 (EXTEND_PCR17)
>> TBOOT: num_entries: 1
>> TBOOT: policy entry[0]:
>> TBOOT: mod_num: any
>> TBOOT: pcr: none
>> TBOOT: hash_type: TB_HTYPE_ANY
>> TBOOT: num_hashes: 0
>> TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
>> TBOOT: CPU is SMX-capable
>> TBOOT: CPU is VMX-capable
>> TBOOT: SMX is enabled
>> TBOOT: TXT chipset and all needed capabilities present
>> TBOOT: TXT.ERRORCODE=c0000001
>> TBOOT: AC module error : acm_type=1, progress=00, error=0
>> TBOOT: LT.ESTS=0
>> TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
>> TBOOT: CPU is SMX-capable
>> TBOOT: CPU is VMX-capable
>> TBOOT: SMX is enabled
>> TBOOT: TXT chipset and all needed capabilities present
>> TBOOT: unsupported BIOS data version (4)
>> TBOOT: bios_data (@0xbaf20008, 0x56):
>> TBOOT: version: 4
>> TBOOT: bios_sinit_size: 0x0 (0)
>> TBOOT: lcp_pd_base: 0x0
>> TBOOT: lcp_pd_size: 0x0 (0)
>> TBOOT: num_logical_procs: 4
>> TBOOT: flags: 0x00000000
>> TBOOT: measured launch succeeded
>> TBOOT: unsupported BIOS data version (4)
>> TBOOT: bios_data (@0xbaf20008, 0x56):
>> TBOOT: version: 4
>> TBOOT: bios_sinit_size: 0x0 (0)
>> TBOOT: lcp_pd_base: 0x0
>> TBOOT: lcp_pd_size: 0x0 (0)
>> TBOOT: num_logical_procs: 4
>> TBOOT: flags: 0x00000000
>> TBOOT: os_mle_data (@0xbaf2005e, 0x10120):
>> TBOOT: version: 2
>> TBOOT: mbi: 0x275110
>> TBOOT: os_sinit_data (@0xbaf3017e, 0x64):
>> TBOOT: version: 5
>> TBOOT: mle_ptab: 0x800000
>> TBOOT: mle_size: 0x1f000 (126976)
>> TBOOT: mle_hdr_base: 0x15980
>> TBOOT: vtd_pmr_lo_base: 0x0
>> TBOOT: vtd_pmr_lo_size: 0xbac00000
>> TBOOT: vtd_pmr_hi_base: 0x100000000
>> TBOOT: vtd_pmr_hi_size: 0x3e600000
>> TBOOT: lcp_po_base: 0x0
>> TBOOT: lcp_po_size: 0x0 (0)
>> TBOOT: capabilities: 0x00000002
>> TBOOT: rlp_wake_getsec: 0
>> TBOOT: rlp_wake_monitor: 1
>> TBOOT: ecx_pgtbl: 0
>> TBOOT: efi_rsdt_ptr: 0x0
>> TBOOT: sinit_mle_data (@0xbaf301e2, 0x22c):
>> TBOOT: version: 8
>> TBOOT: bios_acm_id:
>> 80 00 00 00 20 10 10 22 00 00 b0 01 ff ff ff ff ff ff ff ff
>> TBOOT: edx_senter_flags: 0x00000000
>> TBOOT: mseg_valid: 0x0
>> TBOOT: sinit_hash:
>> 10 2c 49 2f 97 29 1d e6 c1 79 59 18 08 0a 1f 54 24 7f e1 2c
>> TBOOT: mle_hash:
>> ef c3 94 df 2d 87 e0 00 78 0c ae 06 6b 77 4f dd f7 98 bb cf
>> TBOOT: stm_hash:
>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> TBOOT: lcp_policy_hash:
>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> TBOOT: lcp_policy_control: 0x00000000
>> TBOOT: rlp_wakeup_addr: 0xbaf01a20
>> TBOOT: num_mdrs: 7
>> TBOOT: mdrs_off: 0x9c
>> TBOOT: num_vtd_dmars: 232
>> TBOOT: vtd_dmars_off: 0x144
>> TBOOT: sinit_mdrs:
>> TBOOT: 0000000000000000 - 00000000000a0000 (GOOD)
>> TBOOT: 0000000000100000 - 0000000000f00000 (GOOD)
>> TBOOT: 0000000001000000 - 00000000baf00000 (GOOD)
>> TBOOT: 0000000000000000 - 0000000000000000 (GOOD)
>> TBOOT: 0000000100000000 - 000000013e600000 (GOOD)
>> TBOOT: 00000000bb000000 - 00000000bb800000 (SMRAM
>> NON-OVERLAY)
>> TBOOT: 00000000f8000000 - 00000000fc000000 (PCIE EXTENDED
>> CONFIG)
>> TBOOT: proc_scrtm_status: 0x00000000
>> TBOOT: RSDP (v2, LENOVO �$) @ 0x0f00e0
>> TBOOT: acpi_table_ioapic @ 0xbabe706c, .address = 0xfec00000
>> TBOOT: acpi_table_mcfg @ 0xbabe6000, .base_address = 0xf8000000
>> TBOOT: mtrr_def_type: e = 1, fe = 1, type = 0
>> TBOOT: mtrrs:
>> TBOOT: base mask type v
>> TBOOT: 0ffc00 fffc00 05 01
>> TBOOT: 000000 f80000 06 01
>> TBOOT: 080000 fc0000 06 01
>> TBOOT: 0bc000 ffc000 00 01
>> TBOOT: 0bb000 fff000 00 01
>> TBOOT: 0bac00 fffc00 00 01
>> TBOOT: 100000 fc0000 06 01
>> TBOOT: 13f000 fff000 00 01
>> TBOOT: 13e800 fff800 00 01
>> TBOOT: 13e600 fffe00 00 01
>> TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbac00000
>> TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x13e600000
>> TBOOT: MSR for SMM monitor control on BSP is 0x0.
>> TBOOT: verifying ILP is opt-out or has the same MSEG header with
>> TXT.MSEG.BASE
>> opt-out
>> TBOOT: : succeeded.
>> TBOOT: enabling SMIs on BSP
>> TBOOT: mle_join.entry_point = 8031f0
>> TBOOT: mle_join.seg_sel = 8
>> TBOOT: mle_join.gdt_base = 804000
>> TBOOT: mle_join.gdt_limit = 3f
>> TBOOT: joining RLPs to MLE with MONITOR wakeup
>> TBOOT: rlp_wakeup_addr = 0xbaf01a20
>> TBOOT: cpu 2 waking up from TXT sleep
>> TBOOT: waiting for all APs (3) to enter wait-for-sipi...
>> TBOOT: MSR for SMM monitor control on cpu 2 is 0x0
>> TBOOT: verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 2
>> : succeeded.
>> TBOOT: enabling SMIs on cpu 2
>> TBOOT: .VMXON done for cpu 2
>> TBOOT:
>> TBOOT: cpu 3 waking up from TXT sleep
>> TBOOT: launching mini-guest for cpu 2
>> TBOOT: MSR for SMM monitor control on cpu 3 is 0x0
>> TBOOT: verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 3
>> : succeeded.
>> TBOOT: enabling SMIs on cpu 3
>> TBOOT: VMXON done for cpu 3
>> TBOOT: launching mini-guest for cpu 3
>> TBOOT: cpu 1 waking up from TXT sleep
>> TBOOT: MSR for SMM monitor control on cpu 1 is 0x0
>> TBOOT: .verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 1
>> . : succeeded.
>> TBOOT: .enabling SMIs on cpu 1
>> TBOOT: .VMXON done for cpu 1
>> TBOOT: .launching mini-guest for cpu 1
>> TBOOT: .
>> TBOOT: all APs in wait-for-sipi
>> TBOOT: saved IA32_MISC_ENABLE = 0x00850088
>> TBOOT: set LT.CMD.SECRETS flag
>> TBOOT: opened TPM locality 1
>> TBOOT: DMAR table @ 0xbabe1000 saved.
>> TBOOT: no LCP module found
>> TBOOT: verifying module 0 of mbi (103000 - 27510b) in e820 table
>> (range from 0000000000103000 to 000000000027510c is in
>> E820_RAM)
>> TBOOT: : succeeded.
>> TBOOT: verifying module 1 of mbi (276000 - 68d9df) in e820 table
>> (range from 0000000000276000 to 000000000068d9e0 is in
>> E820_RAM)
>> TBOOT: : succeeded.
>> TBOOT: verifying module 2 of mbi (87e000 - 33101ff) in e820 table
>> (range from 000000000087e000 to 0000000003310200 is in
>> E820_RAM)
>> TBOOT: : succeeded.
>> TBOOT: protecting TXT heap (baf20000 - baffffff) in e820 table
>> TBOOT: protecting SINIT (baf00000 - baf1ffff) in e820 table
>> TBOOT: protecting TXT Private Space (fed20000 - fed2ffff) in e820 table
>> TBOOT: verifying e820 table against SINIT MDRs: verification succeeded.
>> TBOOT: verifying tboot and its page table (800000 - 87de5f) in e820 table
>> (range from 0000000000800000 to 000000000087de60 is in
>> E820_RAM)
>> TBOOT: : succeeded.
>> TBOOT: protecting tboot (800000 - 87dfff) in e820 table
>> TBOOT: adjusted e820 map:
>> TBOOT: 0000000000000000 - 000000000009d800 (1)
>> TBOOT: 000000000009d800 - 00000000000a0000 (2)
>> TBOOT: 00000000000e0000 - 0000000000100000 (2)
>> TBOOT: 0000000000100000 - 0000000000800000 (1)
>> TBOOT: 0000000000800000 - 000000000087e000 (5)
>> TBOOT: 000000000087e000 - 0000000000f00000 (1)
>> TBOOT: 0000000000f00000 - 0000000001000000 (2)
>> TBOOT: 0000000001000000 - 00000000ba59f000 (1)
>> TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
>> TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
>> TBOOT: 00000000bab9f000 - 00000000babff000 (3)
>> TBOOT: 00000000babff000 - 00000000bac00000 (1)
>> TBOOT: 00000000bac00000 - 00000000baf00000 (2)
>> TBOOT: 00000000baf00000 - 00000000baf20000 (2)
>> TBOOT: 00000000baf20000 - 00000000bb000000 (2)
>> TBOOT: 00000000bb000000 - 00000000bfa00000 (2)
>> TBOOT: 00000000f8000000 - 00000000fc000000 (2)
>> TBOOT: 00000000fec00000 - 00000000fec01000 (2)
>> TBOOT: 00000000fed08000 - 00000000fed09000 (2)
>> TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
>> TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
>> TBOOT: 00000000fed20000 - 00000000fed30000 (2)
>> TBOOT: 00000000fee00000 - 00000000fee01000 (2)
>> TBOOT: 00000000ffd20000 - 0000000100000000 (2)
>> TBOOT: 0000000100000000 - 000000013e600000 (1)
>> TBOOT: verifying module "com1=115200,8n1,magic console=com1
>> iommu=required dom0_mem=1024MB cpufreq=xen cpuidle
>> earlyprintk=xenboot
>> loglvl=all"...
>> TBOOT: OK : d9 b0 09 b5 e2 ff 12 17 a3 80 c5 f6 fd 05 0c 03 8f 36 2e dd
>> TBOOT: verifying module "root=/dev/mapper/NxVG-NxDisk6 ro quiet splash
>> xencons=tty console=hvc0"...
>> TBOOT: OK : 6f 47 e2 56 a4 f9 cf 82 77 ab c4 55 28 78 c3 0d a1 83 18 11
>> TBOOT: verifying module ""...
>> TBOOT: OK : 65 28 5f 70 c7 e8 ba e1 ee 8b d1 1a c3 9c f5 63 a0 5f d6 30
>> TBOOT: all modules are verified
>> TBOOT: pre_k_s3_state:
>> TBOOT: vtd_pmr_lo_base: 0x0
>> TBOOT: vtd_pmr_lo_size: 0xbac00000
>> TBOOT: vtd_pmr_hi_base: 0x100000000
>> TBOOT: vtd_pmr_hi_size: 0x3e600000
>> TBOOT: pol_hash: 14 c8 20 da 3e eb ae b2 78 d8 7f a7 15 88 8f 53 d7 b4 36
>> 8c
>> TBOOT: VL measurements:
>> TBOOT: PCR 17: 20 a4 55 4e 39 52 46 c6 46 d6 f1 92 cf 58 52 88 7f fd d0 07
>> TBOOT: PCR 18: d9 b0 09 b5 e2 ff 12 17 a3 80 c5 f6 fd 05 0c 03 8f 36 2e dd
>> TBOOT: PCRs before extending:
>> TBOOT: PCR 17: cf 48 95 86 8b 40 18 3e 6e 41 9c ad 15 ed 26 6a bd e2 24 e2
>> TBOOT: PCR 18: 37 97 eb ca 1f cc d6 5e 6d dd 42 8c a0 61 e0 f3 b6 e1 d6 86
>> TBOOT: PCRs after extending:
>> TBOOT: PCR 17: 55 a5 67 d8 aa 40 30 d2 f4 2f 96 bf 41 5e d7 77 43 3b a8 e7
>> TBOOT: PCR 18: 18 66 e8 52 fd dd 0f ba 50 b9 b3 da 4e fa 4e bf 17 2d 7c bb
>> TBOOT: tboot_shared data:
>> TBOOT: version: 5
>> TBOOT: log_addr: 0x00000000
>> TBOOT: shutdown_entry: 0x008031b0
>> TBOOT: shutdown_type: 0
>> TBOOT: tboot_base: 0x00803000
>> TBOOT: tboot_size: 0x7ae60
>> TBOOT: num_in_wfs: 3
>> TBOOT: no LCP module found
>> TBOOT: kernel is ELF format
>> TBOOT: i=0
>> TBOOT: elf = 0x825f2c
>> TBOOT: elf.e_phnum = 0x1
>> TBOOT: elf.p_phentsize = 0x20
>> TBOOT: elf.p_phoff = 0x34
>> TBOOT: ph.p_filesz = 0x172000
>> TBOOT: ph.p_memsz = 0x2b8000
>> TBOOT: ph.p_addr = 0x100000
>> TBOOT: ph.p_offset = 0x80
>> TBOOT: transfering control to kernel @0x48000000...
>> TBOOT: ******************* TBOOT *******************
>> TBOOT: 2011-07-06 08:00 -0400 1:17221ef98ed6
>> TBOOT: *********************************************
>> TBOOT: command line: serial=115200,8n1,0x4000,19
>> TBOOT: BSP is cpu 0
>> TBOOT: original e820 map:
>> TBOOT: 0000000000000000 - 000000000009d800 (1)
>> TBOOT: 000000000009d800 - 00000000000a0000 (2)
>> TBOOT: 00000000000e0000 - 0000000000100000 (2)
>> TBOOT: 0000000000100000 - 00000000ba59f000 (1)
>> TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
>> TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
>> TBOOT: 00000000bab9f000 - 00000000babff000 (3)
>> TBOOT: 00000000babff000 - 00000000bac00000 (1)
>> TBOOT: 00000000bac00000 - 00000000bfa00000 (2)
>> TBOOT: 00000000f8000000 - 00000000fc000000 (2)
>> TBOOT: 00000000fec00000 - 00000000fec01000 (2)
>> TBOOT: 00000000fed08000 - 00000000fed09000 (2)
>> TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
>> TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
>> TBOOT: 00000000fee00000 - 00000000fee01000 (2)
>> TBOOT: 00000000ffd20000 - 0000000100000000 (2)
>> TBOOT: 0000000100000000 - 000000013e600000 (1)
>> TBOOT: TPM is ready
>> TBOOT: TPM nv_locked: TRUE
>> TBOOT: TPM timeout values: A: 750, B: 750, C: 750, D: 750
>> TBOOT: reading Verified Launch Policy from TPM NV...
>> TBOOT: :512 bytes read
>> TBOOT: policy:
>> TBOOT: version: 2
>> TBOOT: policy_type: TB_POLTYPE_HALT
>> TBOOT: hash_alg: TB_HALG_SHA1
>> TBOOT: policy_control: 00000001 (EXTEND_PCR17)
>> TBOOT: num_entries: 1
>> TBOOT: policy entry[0]:
>> TBOOT: mod_num: any
>> TBOOT: pcr: none
>> TBOOT: hash_type: TB_HTYPE_ANY
>> TBOOT: num_hashes: 0
>> TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
>> TBOOT: CPU is SMX-capable
>> TBOOT: CPU is VMX-capable
>> TBOOT: SMX is enabled
>> TBOOT: TXT chipset and all needed capabilities present
>> TBOOT: TXT.ERRORCODE=0
>> TBOOT: LT.ESTS=0
>> TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
>> TBOOT: CPU is SMX-capable
>> TBOOT: CPU is VMX-capable
>> TBOOT: SMX is enabled
>> TBOOT: TXT chipset and all needed capabilities present
>> TBOOT: unsupported BIOS data version (4)
>> TBOOT: bios_data (@0xbaf20008, 0x56):
>> TBOOT: version: 4
>> TBOOT: bios_sinit_size: 0x0 (0)
>> TBOOT: lcp_pd_base: 0x0
>> TBOOT: lcp_pd_size: 0x0 (0)
>> TBOOT: num_logical_procs: 4
>> TBOOT: flags: 0x00000000
>> TBOOT: CR0 and EFLAGS OK
>> TBOOT: supports preserving machine check errors
>> TBOOT: CPU is ready for SENTER
>> TBOOT: disabling legacy USB SMIs
>> TBOOT: checking previous errors on the last boot.
>> last boot has error.
>> TBOOT: chipset ids: vendor: 0x8086, device: 0xb001, revision: 0x1
>> TBOOT: chipset production fused: 1
>> TBOOT: checking if module is an SINIT for this platform...
>> TBOOT: ACM info_table version mismatch (4)
>> TBOOT: 1 ACM chipset id entries:
>> TBOOT: vendor: 0x8086, device: 0xb001, flags: 0x1, revision:
>> 0x1, extended: 0x0
>> TBOOT: SINIT matches platform
>> TBOOT: copied SINIT (size=c000) to 0xbaf00000
>> TBOOT: AC mod base alignment OK
>> TBOOT: AC mod size OK
>> TBOOT: AC module header dump for SINIT:
>> TBOOT: type: 0x2 (ACM_TYPE_CHIPSET)
>> TBOOT: length: 0xa1 (161)
>> TBOOT: version: 0
>> TBOOT: chipset_id: 0xb001
>> TBOOT: flags: 0x0
>> TBOOT: pre_production: 0
>> TBOOT: debug_signed: 0
>> TBOOT: vendor: 0x8086
>> TBOOT: date: 0x20110506
>> TBOOT: size*4: 0xc000 (49152)
>> TBOOT: code_control: 0x0
>> TBOOT: entry point: 0x00000008:000034ce
>> TBOOT: scratch_size: 0x8f (143)
>> TBOOT: info_table:
>> TBOOT: uuid: {0x7fc03aaa, 0x46a7, 0x18db, 0xac2e,
>> {0x69, 0x8f, 0x8d, 0x41, 0x7f, 0x5a}}
>> TBOOT: ACM_UUID_V3
>> TBOOT: chipset_acm_type: 0x1 (SINIT)
>> TBOOT: version: 4
>> TBOOT: length: 0x2c (44)
>> TBOOT: chipset_id_list: 0x4ec
>> TBOOT: os_sinit_data_ver: 0x5
>> TBOOT: min_mle_hdr_ver: 0x00020000
>> TBOOT: capabilities: 0x0000000e
>> TBOOT: rlp_wake_getsec: 0
>> TBOOT: rlp_wake_monitor: 1
>> TBOOT: ecx_pgtbl: 1
>> TBOOT: acm_ver: 19
>> TBOOT: chipset list:
>> TBOOT: count: 1
>> TBOOT: entry 0:
>> TBOOT: flags: 0x1
>> TBOOT: vendor_id: 0x8086
>> TBOOT: device_id: 0xb001
>> TBOOT: revision_id: 0x1
>> TBOOT: extended_id: 0x0
>> TBOOT: file addresses:
>> TBOOT: &_start=0x803000
>> TBOOT: &_end=0x87de60
>> TBOOT: &_mle_start=0x803000
>> TBOOT: &_mle_end=0x822000
>> TBOOT: &_post_launch_entry=0x803020
>> TBOOT: &_txt_wakeup=0x8031f0
>> TBOOT: &g_mle_hdr=0x818980
>> TBOOT: MLE header:
>> TBOOT: uuid={0x9082ac5a, 0x476f, 0x74a7, 0x5c0f,
>> {0x55, 0xa2, 0xcb, 0x51, 0xb6, 0x42}}
>> TBOOT: length=34
>> TBOOT: version=00020001
>> TBOOT: entry_point=00000020
>> TBOOT: first_valid_page=00000000
>> TBOOT: mle_start_off=0
>> TBOOT: mle_end_off=1f000
>> TBOOT: capabilities: 0x00000007
>> TBOOT: rlp_wake_getsec: 1
>> TBOOT: rlp_wake_monitor: 1
>> TBOOT: ecx_pgtbl: 1
>> TBOOT: MLE start=803000, end=822000, size=1f000
>> TBOOT: ptab_size=3000, ptab_base=0x800000
>> TBOOT: unsupported BIOS data version (4)
>> TBOOT: bios_data (@0xbaf20008, 0x56):
>> TBOOT: version: 4
>> TBOOT: bios_sinit_size: 0x0 (0)
>> TBOOT: lcp_pd_base: 0x0
>> TBOOT: lcp_pd_size: 0x0 (0)
>> TBOOT: num_logical_procs: 4
>> TBOOT: flags: 0x00000000
>> TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbac00000
>> TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x13e600000
>> TBOOT: no LCP module found
>> TBOOT: os_sinit_data (@0xbaf3017e, 0x64):
>> TBOOT: version: 5
>> TBOOT: mle_ptab: 0x800000
>> TBOOT: mle_size: 0x1f000 (126976)
>> TBOOT: mle_hdr_base: 0x15980
>> TBOOT: vtd_pmr_lo_base: 0x0
>> TBOOT: vtd_pmr_lo_size: 0xbac00000
>> TBOOT: vtd_pmr_hi_base: 0x100000000
>> TBOOT: vtd_pmr_hi_size: 0x3e600000
>> TBOOT: lcp_po_base: 0x0
>> TBOOT: lcp_po_size: 0x0 (0)
>> TBOOT: capabilities: 0x00000002
>> TBOOT: rlp_wake_getsec: 0
>> TBOOT: rlp_wake_monitor: 1
>> TBOOT: ecx_pgtbl: 0
>> TBOOT: efi_rsdt_ptr: 0x0
>> TBOOT: setting MTRRs for acmod: base=0xbaf00000, size=0xc000,
>> num_pages=12
>> TBOOT: executing GETSEC[SENTER]...
>> TBOOT: ******************* TBOOT *******************
>> TBOOT: 2011-07-06 08:00 -0400 1:17221ef98ed6
>> TBOOT: *********************************************
>> TBOOT: command line: serial=115200,8n1,0x4000,19
>> TBOOT: BSP is cpu 0
>> TBOOT: original e820 map:
>> TBOOT: 0000000000000000 - 000000000009d800 (1)
>> TBOOT: 000000000009d800 - 00000000000a0000 (2)
>> TBOOT: 00000000000e0000 - 0000000000100000 (2)
>> TBOOT: 0000000000100000 - 00000000ba59f000 (1)
>> TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
>> TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
>> TBOOT: 00000000bab9f000 - 00000000babff000 (3)
>> TBOOT: 00000000babff000 - 00000000bac00000 (1)
>> TBOOT: 00000000bac00000 - 00000000bfa00000 (2)
>> TBOOT: 00000000f8000000 - 00000000fc000000 (2)
>> TBOOT: 00000000fec00000 - 00000000fec01000 (2)
>> TBOOT: 00000000fed08000 - 00000000fed09000 (2)
>> TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
>> TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
>> TBOOT: 00000000fee00000 - 00000000fee01000 (2)
>> TBOOT: 00000000ffd20000 - 0000000100000000 (2)
>> TBOOT: 0000000100000000 - 000000013e600000 (1)
>> TBOOT: TPM is ready
>> TBOOT: TPM nv_locked: TRUE
>> TBOOT: TPM timeout values: A: 750, B: 750, C: 750, D: 750
>> TBOOT: reading Verified Launch Policy from TPM NV...
>> TBOOT: :512 bytes read
>> TBOOT: policy:
>> TBOOT: version: 2
>> TBOOT: policy_type: TB_POLTYPE_HALT
>> TBOOT: hash_alg: TB_HALG_SHA1
>> TBOOT: policy_control: 00000001 (EXTEND_PCR17)
>> TBOOT: num_entries: 1
>> TBOOT: policy entry[0]:
>> TBOOT: mod_num: any
>> TBOOT: pcr: none
>> TBOOT: hash_type: TB_HTYPE_ANY
>> TBOOT: num_hashes: 0
>> TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
>> TBOOT: CPU is SMX-capable
>> TBOOT: CPU is VMX-capable
>> TBOOT: SMX is enabled
>> TBOOT: TXT chipset and all needed capabilities present
>> TBOOT: TXT.ERRORCODE=c0000001
>> TBOOT: AC module error : acm_type=1, progress=00, error=0
>> TBOOT: LT.ESTS=0
>> TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
>> TBOOT: CPU is SMX-capable
>> TBOOT: CPU is VMX-capable
>> TBOOT: SMX is enabled
>> TBOOT: TXT chipset and all needed capabilities present
>> TBOOT: unsupported BIOS data version (4)
>> TBOOT: bios_data (@0xbaf20008, 0x56):
>> TBOOT: version: 4
>> TBOOT: bios_sinit_size: 0x0 (0)
>> TBOOT: lcp_pd_base: 0x0
>> TBOOT: lcp_pd_size: 0x0 (0)
>> TBOOT: num_logical_procs: 4
>> TBOOT: flags: 0x00000000
>> TBOOT: measured launch succeeded
>> TBOOT: unsupported BIOS data version (4)
>> TBOOT: bios_data (@0xbaf20008, 0x56):
>> TBOOT: version: 4
>> TBOOT: bios_sinit_size: 0x0 (0)
>> TBOOT: lcp_pd_base: 0x0
>> TBOOT: lcp_pd_size: 0x0 (0)
>> TBOOT: num_logical_procs: 4
>> TBOOT: flags: 0x00000000
>> TBOOT: os_mle_data (@0xbaf2005e, 0x10120):
>> TBOOT: version: 2
>> TBOOT: mbi: 0x275110
>> TBOOT: os_sinit_data (@0xbaf3017e, 0x64):
>> TBOOT: version: 5
>> TBOOT: mle_ptab: 0x800000
>> TBOOT: mle_size: 0x1f000 (126976)
>> TBOOT: mle_hdr_base: 0x15980
>> TBOOT: vtd_pmr_lo_base: 0x0
>> TBOOT: vtd_pmr_lo_size: 0xbac00000
>> TBOOT: vtd_pmr_hi_base: 0x100000000
>> TBOOT: vtd_pmr_hi_size: 0x3e600000
>> TBOOT: lcp_po_base: 0x0
>> TBOOT: lcp_po_size: 0x0 (0)
>> TBOOT: capabilities: 0x00000002
>> TBOOT: rlp_wake_getsec: 0
>> TBOOT: rlp_wake_monitor: 1
>> TBOOT: ecx_pgtbl: 0
>> TBOOT: efi_rsdt_ptr: 0x0
>> TBOOT: sinit_mle_data (@0xbaf301e2, 0x22c):
>> TBOOT: version: 8
>> TBOOT: bios_acm_id:
>> 80 00 00 00 20 10 10 22 00 00 b0 01 ff ff ff ff ff ff ff ff
>> TBOOT: edx_senter_flags: 0x00000000
>> TBOOT: mseg_valid: 0x0
>> TBOOT: sinit_hash:
>> 10 2c 49 2f 97 29 1d e6 c1 79 59 18 08 0a 1f 54 24 7f e1 2c
>> TBOOT: mle_hash:
>> ef c3 94 df 2d 87 e0 00 78 0c ae 06 6b 77 4f dd f7 98 bb cf
>> TBOOT: stm_hash:
>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> TBOOT: lcp_policy_hash:
>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> TBOOT: lcp_policy_control: 0x00000000
>> TBOOT: rlp_wakeup_addr: 0xbaf01a20
>> TBOOT: num_mdrs: 7
>> TBOOT: mdrs_off: 0x9c
>> TBOOT: num_vtd_dmars: 232
>> TBOOT: vtd_dmars_off: 0x144
>> TBOOT: sinit_mdrs:
>> TBOOT: 0000000000000000 - 00000000000a0000 (GOOD)
>> TBOOT: 0000000000100000 - 0000000000f00000 (GOOD)
>> TBOOT: 0000000001000000 - 00000000baf00000 (GOOD)
>> TBOOT: 0000000000000000 - 0000000000000000 (GOOD)
>> TBOOT: 0000000100000000 - 000000013e600000 (GOOD)
>> TBOOT: 00000000bb000000 - 00000000bb800000 (SMRAM
>> NON-OVERLAY)
>> TBOOT: 00000000f8000000 - 00000000fc000000 (PCIE EXTENDED
>> CONFIG)
>> TBOOT: proc_scrtm_status: 0x00000000
>> TBOOT: RSDP (v2, LENOVO �$) @ 0x0f00e0
>> TBOOT: acpi_table_ioapic @ 0xbabe706c, .address = 0xfec00000
>> TBOOT: acpi_table_mcfg @ 0xbabe6000, .base_address = 0xf8000000
>> TBOOT: mtrr_def_type: e = 1, fe = 1, type = 0
>> TBOOT: mtrrs:
>> TBOOT: base mask type v
>> TBOOT: 0ffc00 fffc00 05 01
>> TBOOT: 000000 f80000 06 01
>> TBOOT: 080000 fc0000 06 01
>> TBOOT: 0bc000 ffc000 00 01
>> TBOOT: 0bb000 fff000 00 01
>> TBOOT: 0bac00 fffc00 00 01
>> TBOOT: 100000 fc0000 06 01
>> TBOOT: 13f000 fff000 00 01
>> TBOOT: 13e800 fff800 00 01
>> TBOOT: 13e600 fffe00 00 01
>> TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbac00000
>> TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x13e600000
>> TBOOT: MSR for SMM monitor control on BSP is 0x0.
>> TBOOT: verifying ILP is opt-out or has the same MSEG header with
>> TXT.MSEG.BASE
>> opt-out
>> TBOOT: : succeeded.
>> TBOOT: enabling SMIs on BSP
>> TBOOT: mle_join.entry_point = 8031f0
>> TBOOT: mle_join.seg_sel = 8
>> TBOOT: mle_join.gdt_base = 804000
>> TBOOT: mle_join.gdt_limit = 3f
>> TBOOT: joining RLPs to MLE with MONITOR wakeup
>> TBOOT: rlp_wakeup_addr = 0xbaf01a20
>> TBOOT: cpu 3 waking up from TXT sleep
>> TBOOT: waiting for all APs (3) to enter wait-for-sipi...
>> TBOOT: MSR for SMM monitor control on cpu 3 is 0x0
>> TBOOT: verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 3
>> : succeeded.
>> TBOOT: enabling SMIs on cpu 3
>> TBOOT: .VMXON done for cpu 3
>> TBOOT:
>> TBOOT: launching mini-guest for cpu 3
>> TBOOT: cpu 2 waking up from TXT sleep
>> TBOOT: MSR for SMM monitor control on cpu 2 is 0x0
>> TBOOT: verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 2
>> : succeeded.
>> TBOOT: enabling SMIs on cpu 2
>> TBOOT: VMXON done for cpu 2
>> TBOOT: launching mini-guest for cpu 2
>> TBOOT: cpu 1 waking up from TXT sleep
>> TBOOT: MSR for SMM monitor control on cpu 1 is 0x0
>> TBOOT: .verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 1
>> . : succeeded.
>> TBOOT: .enabling SMIs on cpu 1
>> TBOOT: .VMXON done for cpu 1
>> TBOOT: .launching mini-guest for cpu 1
>> TBOOT: .
>> TBOOT: all APs in wait-for-sipi
>> TBOOT: saved IA32_MISC_ENABLE = 0x00850088
>> TBOOT: set LT.CMD.SECRETS flag
>> TBOOT: opened TPM locality 1
>> TBOOT: DMAR table @ 0xbabe1000 saved.
>> TBOOT: no LCP module found
>> TBOOT: verifying module 0 of mbi (103000 - 27510b) in e820 table
>> (range from 0000000000103000 to 000000000027510c is in
>> E820_RAM)
>> TBOOT: : succeeded.
>> TBOOT: verifying module 1 of mbi (276000 - 68d9df) in e820 table
>> (range from 0000000000276000 to 000000000068d9e0 is in
>> E820_RAM)
>> TBOOT: : succeeded.
>> TBOOT: verifying module 2 of mbi (87e000 - 33101ff) in e820 table
>> (range from 000000000087e000 to 0000000003310200 is in
>> E820_RAM)
>> TBOOT: : succeeded.
>> TBOOT: protecting TXT heap (baf20000 - baffffff) in e820 table
>> TBOOT: protecting SINIT (baf00000 - baf1ffff) in e820 table
>> TBOOT: protecting TXT Private Space (fed20000 - fed2ffff) in e820 table
>> TBOOT: verifying e820 table against SINIT MDRs: verification succeeded.
>> TBOOT: verifying tboot and its page table (800000 - 87de5f) in e820 table
>> (range from 0000000000800000 to 000000000087de60 is in
>> E820_RAM)
>> TBOOT: : succeeded.
>> TBOOT: protecting tboot (800000 - 87dfff) in e820 table
>> TBOOT: adjusted e820 map:
>> TBOOT: 0000000000000000 - 000000000009d800 (1)
>> TBOOT: 000000000009d800 - 00000000000a0000 (2)
>> TBOOT: 00000000000e0000 - 0000000000100000 (2)
>> TBOOT: 0000000000100000 - 0000000000800000 (1)
>> TBOOT: 0000000000800000 - 000000000087e000 (5)
>> TBOOT: 000000000087e000 - 0000000000f00000 (1)
>> TBOOT: 0000000000f00000 - 0000000001000000 (2)
>> TBOOT: 0000000001000000 - 00000000ba59f000 (1)
>> TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
>> TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
>> TBOOT: 00000000bab9f000 - 00000000babff000 (3)
>> TBOOT: 00000000babff000 - 00000000bac00000 (1)
>> TBOOT: 00000000bac00000 - 00000000baf00000 (2)
>> TBOOT: 00000000baf00000 - 00000000baf20000 (2)
>> TBOOT: 00000000baf20000 - 00000000bb000000 (2)
>> TBOOT: 00000000bb000000 - 00000000bfa00000 (2)
>> TBOOT: 00000000f8000000 - 00000000fc000000 (2)
>> TBOOT: 00000000fec00000 - 00000000fec01000 (2)
>> TBOOT: 00000000fed08000 - 00000000fed09000 (2)
>> TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
>> TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
>> TBOOT: 00000000fed20000 - 00000000fed30000 (2)
>> TBOOT: 00000000fee00000 - 00000000fee01000 (2)
>> TBOOT: 00000000ffd20000 - 0000000100000000 (2)
>> TBOOT: 0000000100000000 - 000000013e600000 (1)
>> TBOOT: verifying module "com1=115200,8n1,magic console=com1
>> iommu=required dom0_mem=1024MB cpufreq=xen cpuidle
>> earlyprintk=xenboot
>> loglvl=all"...
>> TBOOT: OK : d9 b0 09 b5 e2 ff 12 17 a3 80 c5 f6 fd 05 0c 03 8f 36 2e dd
>> TBOOT: verifying module "root=/dev/mapper/NxVG-NxDisk6 ro quiet splash
>> xencons=tty console=hvc0"...
>> TBOOT: OK : 6f 47 e2 56 a4 f9 cf 82 77 ab c4 55 28 78 c3 0d a1 83 18 11
>> TBOOT: verifying module ""...
>> TBOOT: OK : 65 28 5f 70 c7 e8 ba e1 ee 8b d1 1a c3 9c f5 63 a0 5f d6 30
>> TBOOT: all modules are verified
>> TBOOT: pre_k_s3_state:
>> TBOOT: vtd_pmr_lo_base: 0x0
>> TBOOT: vtd_pmr_lo_size: 0xbac00000
>> TBOOT: vtd_pmr_hi_base: 0x100000000
>> TBOOT: vtd_pmr_hi_size: 0x3e600000
>> TBOOT: pol_hash: 14 c8 20 da 3e eb ae b2 78 d8 7f a7 15 88 8f 53 d7 b4 36
>> 8c
>> TBOOT: VL measurements:
>> TBOOT: PCR 17: 20 a4 55 4e 39 52 46 c6 46 d6 f1 92 cf 58 52 88 7f fd d0 07
>> TBOOT: PCR 18: d9 b0 09 b5 e2 ff 12 17 a3 80 c5 f6 fd 05 0c 03 8f 36 2e dd
>> TBOOT: PCRs before extending:
>> TBOOT: PCR 17: cf 48 95 86 8b 40 18 3e 6e 41 9c ad 15 ed 26 6a bd e2 24 e2
>> TBOOT: PCR 18: 37 97 eb ca 1f cc d6 5e 6d dd 42 8c a0 61 e0 f3 b6 e1 d6 86
>> TBOOT: PCRs after extending:
>> TBOOT: PCR 17: 55 a5 67 d8 aa 40 30 d2 f4 2f 96 bf 41 5e d7 77 43 3b a8 e7
>> TBOOT: PCR 18: 18 66 e8 52 fd dd 0f ba 50 b9 b3 da 4e fa 4e bf 17 2d 7c bb
>> TBOOT: tboot_shared data:
>> TBOOT: version: 5
>> TBOOT: log_addr: 0x00000000
>> TBOOT: shutdown_entry: 0x008031b0
>> TBOOT: shutdown_type: 0
>> TBOOT: tboot_base: 0x00803000
>> TBOOT: tboot_size: 0x7ae60
>> TBOOT: num_in_wfs: 3
>> TBOOT: no LCP module found
>> TBOOT: kernel is ELF format
>> TBOOT: i=0
>> TBOOT: elf = 0x825f2c
>> TBOOT: elf.e_phnum = 0x1
>> TBOOT: elf.p_phentsize = 0x20
>> TBOOT: elf.p_phoff = 0x34
>> TBOOT: ph.p_filesz = 0x172000
>> TBOOT: ph.p_memsz = 0x2b8000
>> TBOOT: ph.p_addr = 0x100000
>> TBOOT: ph.p_offset = 0x80
>> TBOOT: transfering control to kernel @0x48000000...
>>
>> ------------------------------------------------------------------------------
>> All of the data generated in your IT infrastructure is seriously valuable.
>> Why? It contains a definitive record of application performance, security
>> threats, fraudulent activity, and more. Splunk takes this data and makes
>> sense of it. IT sense. And common sense.
>> http://p.sf.net/sfu/splunk-d2d-c2
>> _______________________________________________
>> tboot-devel mailing list
>> tbo...@li...
>> https://lists.sourceforge.net/lists/listinfo/tboot-devel
|
|
From: Wei, G. <gan...@in...> - 2011-07-14 01:58:56
|
I will look into this issue. Thanks for raising it.
Jimmy
> -----Original Message-----
> From: Ben Guthro [mailto:be...@gu...]
> Sent: Thursday, July 07, 2011 1:06 AM
> To: tbo...@li...
> Cc: Ken Kane
> Subject: [tboot-devel] tboot, xen, grub2 infinite loop
>
> I am attempting to get tboot working with Xen-4.0.2, grub2, and the
> 2nd_gen_i5_i7_SINIT_19.BIN module working, but have been having
> limited results, with things seeming to hang when loading xen
>
> I've traced this back to tboot/common/elf.c in expand_elf_image()
>
> objdump shows that tboot gets loaded at the following:
>
> start address 0x00803000
>
> Program Header:
> LOAD off 0x00001000 vaddr 0x00803000 paddr 0x00803000 align
> 2**12
> filesz 0x00022000 memsz 0x0007ae60 flags rwx
>
>
> ...and xen at the following:
>
> start address 0x00100000
>
> Program Header:
> LOAD off 0x00000080 vaddr 0x00100000 paddr 0x00100000 align 2**6
> filesz 0x00172000 memsz 0x002b8000 flags rwx
>
>
> In the for loop in expand_elf_image, when it is doing the memcpy, and
> memset - it seems to overwrite the heap, and get into an infinite loop
>
>
> Is anyone else running into issues like this?
>
> Any suggestions, or ideas would be greatly appreciated.
>
>
> Ben Guthro
>
>
>
> My grub entry looks like the following:
>
> menuentry "TXT: test1" {
> saved_entry=0
> save_env saved_entry
> set root=(MyVG-MyBootDisk)
> multiboot /tboot.gz logging=vga,memory serial=115200,8n1,0x4000,19
> module /xen.gz com1=115200,8n1,magic console=com1
> iommu=required dom0_mem=1024MB cpufreq=xen cpuidle
> earlyprintk=xenboot
> loglvl=all
> module /vmlinuz-2.6.38 root=/dev/mapper/MyRootDisk ro quiet
> splash xencons=tty console=hvc0
> module /initrd.img-2.6.38
> module /2nd_gen_i5_i7_SINIT_19.BIN
> }
>
> tboot debug looks like the following:
>
> diff -r 17221ef98ed6 tboot/common/elf.c
> --- a/tboot/common/elf.c
> +++ b/tboot/common/elf.c
> @@ -163,16 +163,29 @@
>
> /* assumed that already passed is_elf_image() check */
>
> +
> /* load elf image into memory */
> for ( int i = 0; i < elf->e_phnum; i++ ) {
> elf_program_header_t *ph = (elf_program_header_t *)
> ((void *)elf + elf->e_phoff + i*elf->e_phentsize);
> -
> + printk("i=%d\n", i);
> + printk(" elf = 0x%x\n", (int)&elf);
> + printk(" elf.e_phnum = 0x%x\n", elf->e_phnum);
> + printk(" elf.p_phentsize = 0x%x\n", elf->e_phentsize);
> + printk(" elf.p_phoff = 0x%x\n", elf->e_phoff);
> + printk(" ph.p_filesz = 0x%x\n", ph->p_filesz);
> + printk(" ph.p_memsz = 0x%x\n", ph->p_memsz);
> + printk(" ph.p_addr = 0x%x\n", ph->p_paddr);
> + printk(" ph.p_offset = 0x%x\n", ph->p_offset);
> if ( ph->p_type == PT_LOAD ) {
> memcpy((void *)ph->p_paddr, (void *)elf + ph->p_offset,
> ph->p_filesz);
> +#if 0
> memset((void *)(ph->p_paddr + ph->p_filesz), 0,
> ph->p_memsz - ph->p_filesz);
> +#else
> + break;
> +#endif
> }
> }
>
>
> And finally, my tboot debug output:
>
> TBOOT: ******************* TBOOT *******************
> TBOOT: 2011-07-06 08:00 -0400 1:17221ef98ed6
> TBOOT: *********************************************
> TBOOT: command line: serial=115200,8n1,0x4000,19
> TBOOT: BSP is cpu 0
> TBOOT: original e820 map:
> TBOOT: 0000000000000000 - 000000000009d800 (1)
> TBOOT: 000000000009d800 - 00000000000a0000 (2)
> TBOOT: 00000000000e0000 - 0000000000100000 (2)
> TBOOT: 0000000000100000 - 00000000ba59f000 (1)
> TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
> TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
> TBOOT: 00000000bab9f000 - 00000000babff000 (3)
> TBOOT: 00000000babff000 - 00000000bac00000 (1)
> TBOOT: 00000000bac00000 - 00000000bfa00000 (2)
> TBOOT: 00000000f8000000 - 00000000fc000000 (2)
> TBOOT: 00000000fec00000 - 00000000fec01000 (2)
> TBOOT: 00000000fed08000 - 00000000fed09000 (2)
> TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
> TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
> TBOOT: 00000000fee00000 - 00000000fee01000 (2)
> TBOOT: 00000000ffd20000 - 0000000100000000 (2)
> TBOOT: 0000000100000000 - 000000013e600000 (1)
> TBOOT: TPM is ready
> TBOOT: TPM nv_locked: TRUE
> TBOOT: TPM timeout values: A: 750, B: 750, C: 750, D: 750
> TBOOT: reading Verified Launch Policy from TPM NV...
> TBOOT: :512 bytes read
> TBOOT: policy:
> TBOOT: version: 2
> TBOOT: policy_type: TB_POLTYPE_HALT
> TBOOT: hash_alg: TB_HALG_SHA1
> TBOOT: policy_control: 00000001 (EXTEND_PCR17)
> TBOOT: num_entries: 1
> TBOOT: policy entry[0]:
> TBOOT: mod_num: any
> TBOOT: pcr: none
> TBOOT: hash_type: TB_HTYPE_ANY
> TBOOT: num_hashes: 0
> TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
> TBOOT: CPU is SMX-capable
> TBOOT: CPU is VMX-capable
> TBOOT: SMX is enabled
> TBOOT: TXT chipset and all needed capabilities present
> TBOOT: TXT.ERRORCODE=0
> TBOOT: LT.ESTS=0
> TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
> TBOOT: CPU is SMX-capable
> TBOOT: CPU is VMX-capable
> TBOOT: SMX is enabled
> TBOOT: TXT chipset and all needed capabilities present
> TBOOT: unsupported BIOS data version (4)
> TBOOT: bios_data (@0xbaf20008, 0x56):
> TBOOT: version: 4
> TBOOT: bios_sinit_size: 0x0 (0)
> TBOOT: lcp_pd_base: 0x0
> TBOOT: lcp_pd_size: 0x0 (0)
> TBOOT: num_logical_procs: 4
> TBOOT: flags: 0x00000000
> TBOOT: CR0 and EFLAGS OK
> TBOOT: supports preserving machine check errors
> TBOOT: CPU is ready for SENTER
> TBOOT: disabling legacy USB SMIs
> TBOOT: checking previous errors on the last boot.
> last boot has error.
> TBOOT: chipset ids: vendor: 0x8086, device: 0xb001, revision: 0x1
> TBOOT: chipset production fused: 1
> TBOOT: checking if module is an SINIT for this platform...
> TBOOT: ACM info_table version mismatch (4)
> TBOOT: 1 ACM chipset id entries:
> TBOOT: vendor: 0x8086, device: 0xb001, flags: 0x1, revision:
> 0x1, extended: 0x0
> TBOOT: SINIT matches platform
> TBOOT: copied SINIT (size=c000) to 0xbaf00000
> TBOOT: AC mod base alignment OK
> TBOOT: AC mod size OK
> TBOOT: AC module header dump for SINIT:
> TBOOT: type: 0x2 (ACM_TYPE_CHIPSET)
> TBOOT: length: 0xa1 (161)
> TBOOT: version: 0
> TBOOT: chipset_id: 0xb001
> TBOOT: flags: 0x0
> TBOOT: pre_production: 0
> TBOOT: debug_signed: 0
> TBOOT: vendor: 0x8086
> TBOOT: date: 0x20110506
> TBOOT: size*4: 0xc000 (49152)
> TBOOT: code_control: 0x0
> TBOOT: entry point: 0x00000008:000034ce
> TBOOT: scratch_size: 0x8f (143)
> TBOOT: info_table:
> TBOOT: uuid: {0x7fc03aaa, 0x46a7, 0x18db, 0xac2e,
> {0x69, 0x8f, 0x8d, 0x41, 0x7f, 0x5a}}
> TBOOT: ACM_UUID_V3
> TBOOT: chipset_acm_type: 0x1 (SINIT)
> TBOOT: version: 4
> TBOOT: length: 0x2c (44)
> TBOOT: chipset_id_list: 0x4ec
> TBOOT: os_sinit_data_ver: 0x5
> TBOOT: min_mle_hdr_ver: 0x00020000
> TBOOT: capabilities: 0x0000000e
> TBOOT: rlp_wake_getsec: 0
> TBOOT: rlp_wake_monitor: 1
> TBOOT: ecx_pgtbl: 1
> TBOOT: acm_ver: 19
> TBOOT: chipset list:
> TBOOT: count: 1
> TBOOT: entry 0:
> TBOOT: flags: 0x1
> TBOOT: vendor_id: 0x8086
> TBOOT: device_id: 0xb001
> TBOOT: revision_id: 0x1
> TBOOT: extended_id: 0x0
> TBOOT: file addresses:
> TBOOT: &_start=0x803000
> TBOOT: &_end=0x87de60
> TBOOT: &_mle_start=0x803000
> TBOOT: &_mle_end=0x822000
> TBOOT: &_post_launch_entry=0x803020
> TBOOT: &_txt_wakeup=0x8031f0
> TBOOT: &g_mle_hdr=0x818980
> TBOOT: MLE header:
> TBOOT: uuid={0x9082ac5a, 0x476f, 0x74a7, 0x5c0f,
> {0x55, 0xa2, 0xcb, 0x51, 0xb6, 0x42}}
> TBOOT: length=34
> TBOOT: version=00020001
> TBOOT: entry_point=00000020
> TBOOT: first_valid_page=00000000
> TBOOT: mle_start_off=0
> TBOOT: mle_end_off=1f000
> TBOOT: capabilities: 0x00000007
> TBOOT: rlp_wake_getsec: 1
> TBOOT: rlp_wake_monitor: 1
> TBOOT: ecx_pgtbl: 1
> TBOOT: MLE start=803000, end=822000, size=1f000
> TBOOT: ptab_size=3000, ptab_base=0x800000
> TBOOT: unsupported BIOS data version (4)
> TBOOT: bios_data (@0xbaf20008, 0x56):
> TBOOT: version: 4
> TBOOT: bios_sinit_size: 0x0 (0)
> TBOOT: lcp_pd_base: 0x0
> TBOOT: lcp_pd_size: 0x0 (0)
> TBOOT: num_logical_procs: 4
> TBOOT: flags: 0x00000000
> TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbac00000
> TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x13e600000
> TBOOT: no LCP module found
> TBOOT: os_sinit_data (@0xbaf3017e, 0x64):
> TBOOT: version: 5
> TBOOT: mle_ptab: 0x800000
> TBOOT: mle_size: 0x1f000 (126976)
> TBOOT: mle_hdr_base: 0x15980
> TBOOT: vtd_pmr_lo_base: 0x0
> TBOOT: vtd_pmr_lo_size: 0xbac00000
> TBOOT: vtd_pmr_hi_base: 0x100000000
> TBOOT: vtd_pmr_hi_size: 0x3e600000
> TBOOT: lcp_po_base: 0x0
> TBOOT: lcp_po_size: 0x0 (0)
> TBOOT: capabilities: 0x00000002
> TBOOT: rlp_wake_getsec: 0
> TBOOT: rlp_wake_monitor: 1
> TBOOT: ecx_pgtbl: 0
> TBOOT: efi_rsdt_ptr: 0x0
> TBOOT: setting MTRRs for acmod: base=0xbaf00000, size=0xc000,
> num_pages=12
> TBOOT: executing GETSEC[SENTER]...
> TBOOT: ******************* TBOOT *******************
> TBOOT: 2011-07-06 08:00 -0400 1:17221ef98ed6
> TBOOT: *********************************************
> TBOOT: command line: serial=115200,8n1,0x4000,19
> TBOOT: BSP is cpu 0
> TBOOT: original e820 map:
> TBOOT: 0000000000000000 - 000000000009d800 (1)
> TBOOT: 000000000009d800 - 00000000000a0000 (2)
> TBOOT: 00000000000e0000 - 0000000000100000 (2)
> TBOOT: 0000000000100000 - 00000000ba59f000 (1)
> TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
> TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
> TBOOT: 00000000bab9f000 - 00000000babff000 (3)
> TBOOT: 00000000babff000 - 00000000bac00000 (1)
> TBOOT: 00000000bac00000 - 00000000bfa00000 (2)
> TBOOT: 00000000f8000000 - 00000000fc000000 (2)
> TBOOT: 00000000fec00000 - 00000000fec01000 (2)
> TBOOT: 00000000fed08000 - 00000000fed09000 (2)
> TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
> TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
> TBOOT: 00000000fee00000 - 00000000fee01000 (2)
> TBOOT: 00000000ffd20000 - 0000000100000000 (2)
> TBOOT: 0000000100000000 - 000000013e600000 (1)
> TBOOT: TPM is ready
> TBOOT: TPM nv_locked: TRUE
> TBOOT: TPM timeout values: A: 750, B: 750, C: 750, D: 750
> TBOOT: reading Verified Launch Policy from TPM NV...
> TBOOT: :512 bytes read
> TBOOT: policy:
> TBOOT: version: 2
> TBOOT: policy_type: TB_POLTYPE_HALT
> TBOOT: hash_alg: TB_HALG_SHA1
> TBOOT: policy_control: 00000001 (EXTEND_PCR17)
> TBOOT: num_entries: 1
> TBOOT: policy entry[0]:
> TBOOT: mod_num: any
> TBOOT: pcr: none
> TBOOT: hash_type: TB_HTYPE_ANY
> TBOOT: num_hashes: 0
> TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
> TBOOT: CPU is SMX-capable
> TBOOT: CPU is VMX-capable
> TBOOT: SMX is enabled
> TBOOT: TXT chipset and all needed capabilities present
> TBOOT: TXT.ERRORCODE=c0000001
> TBOOT: AC module error : acm_type=1, progress=00, error=0
> TBOOT: LT.ESTS=0
> TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
> TBOOT: CPU is SMX-capable
> TBOOT: CPU is VMX-capable
> TBOOT: SMX is enabled
> TBOOT: TXT chipset and all needed capabilities present
> TBOOT: unsupported BIOS data version (4)
> TBOOT: bios_data (@0xbaf20008, 0x56):
> TBOOT: version: 4
> TBOOT: bios_sinit_size: 0x0 (0)
> TBOOT: lcp_pd_base: 0x0
> TBOOT: lcp_pd_size: 0x0 (0)
> TBOOT: num_logical_procs: 4
> TBOOT: flags: 0x00000000
> TBOOT: measured launch succeeded
> TBOOT: unsupported BIOS data version (4)
> TBOOT: bios_data (@0xbaf20008, 0x56):
> TBOOT: version: 4
> TBOOT: bios_sinit_size: 0x0 (0)
> TBOOT: lcp_pd_base: 0x0
> TBOOT: lcp_pd_size: 0x0 (0)
> TBOOT: num_logical_procs: 4
> TBOOT: flags: 0x00000000
> TBOOT: os_mle_data (@0xbaf2005e, 0x10120):
> TBOOT: version: 2
> TBOOT: mbi: 0x275110
> TBOOT: os_sinit_data (@0xbaf3017e, 0x64):
> TBOOT: version: 5
> TBOOT: mle_ptab: 0x800000
> TBOOT: mle_size: 0x1f000 (126976)
> TBOOT: mle_hdr_base: 0x15980
> TBOOT: vtd_pmr_lo_base: 0x0
> TBOOT: vtd_pmr_lo_size: 0xbac00000
> TBOOT: vtd_pmr_hi_base: 0x100000000
> TBOOT: vtd_pmr_hi_size: 0x3e600000
> TBOOT: lcp_po_base: 0x0
> TBOOT: lcp_po_size: 0x0 (0)
> TBOOT: capabilities: 0x00000002
> TBOOT: rlp_wake_getsec: 0
> TBOOT: rlp_wake_monitor: 1
> TBOOT: ecx_pgtbl: 0
> TBOOT: efi_rsdt_ptr: 0x0
> TBOOT: sinit_mle_data (@0xbaf301e2, 0x22c):
> TBOOT: version: 8
> TBOOT: bios_acm_id:
> 80 00 00 00 20 10 10 22 00 00 b0 01 ff ff ff ff ff ff ff ff
> TBOOT: edx_senter_flags: 0x00000000
> TBOOT: mseg_valid: 0x0
> TBOOT: sinit_hash:
> 10 2c 49 2f 97 29 1d e6 c1 79 59 18 08 0a 1f 54 24 7f e1 2c
> TBOOT: mle_hash:
> ef c3 94 df 2d 87 e0 00 78 0c ae 06 6b 77 4f dd f7 98 bb cf
> TBOOT: stm_hash:
> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> TBOOT: lcp_policy_hash:
> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> TBOOT: lcp_policy_control: 0x00000000
> TBOOT: rlp_wakeup_addr: 0xbaf01a20
> TBOOT: num_mdrs: 7
> TBOOT: mdrs_off: 0x9c
> TBOOT: num_vtd_dmars: 232
> TBOOT: vtd_dmars_off: 0x144
> TBOOT: sinit_mdrs:
> TBOOT: 0000000000000000 - 00000000000a0000 (GOOD)
> TBOOT: 0000000000100000 - 0000000000f00000 (GOOD)
> TBOOT: 0000000001000000 - 00000000baf00000 (GOOD)
> TBOOT: 0000000000000000 - 0000000000000000 (GOOD)
> TBOOT: 0000000100000000 - 000000013e600000 (GOOD)
> TBOOT: 00000000bb000000 - 00000000bb800000 (SMRAM
> NON-OVERLAY)
> TBOOT: 00000000f8000000 - 00000000fc000000 (PCIE EXTENDED
> CONFIG)
> TBOOT: proc_scrtm_status: 0x00000000
> TBOOT: RSDP (v2, LENOVO �$) @ 0x0f00e0
> TBOOT: acpi_table_ioapic @ 0xbabe706c, .address = 0xfec00000
> TBOOT: acpi_table_mcfg @ 0xbabe6000, .base_address = 0xf8000000
> TBOOT: mtrr_def_type: e = 1, fe = 1, type = 0
> TBOOT: mtrrs:
> TBOOT: base mask type v
> TBOOT: 0ffc00 fffc00 05 01
> TBOOT: 000000 f80000 06 01
> TBOOT: 080000 fc0000 06 01
> TBOOT: 0bc000 ffc000 00 01
> TBOOT: 0bb000 fff000 00 01
> TBOOT: 0bac00 fffc00 00 01
> TBOOT: 100000 fc0000 06 01
> TBOOT: 13f000 fff000 00 01
> TBOOT: 13e800 fff800 00 01
> TBOOT: 13e600 fffe00 00 01
> TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbac00000
> TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x13e600000
> TBOOT: MSR for SMM monitor control on BSP is 0x0.
> TBOOT: verifying ILP is opt-out or has the same MSEG header with
> TXT.MSEG.BASE
> opt-out
> TBOOT: : succeeded.
> TBOOT: enabling SMIs on BSP
> TBOOT: mle_join.entry_point = 8031f0
> TBOOT: mle_join.seg_sel = 8
> TBOOT: mle_join.gdt_base = 804000
> TBOOT: mle_join.gdt_limit = 3f
> TBOOT: joining RLPs to MLE with MONITOR wakeup
> TBOOT: rlp_wakeup_addr = 0xbaf01a20
> TBOOT: cpu 2 waking up from TXT sleep
> TBOOT: waiting for all APs (3) to enter wait-for-sipi...
> TBOOT: MSR for SMM monitor control on cpu 2 is 0x0
> TBOOT: verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 2
> : succeeded.
> TBOOT: enabling SMIs on cpu 2
> TBOOT: .VMXON done for cpu 2
> TBOOT:
> TBOOT: cpu 3 waking up from TXT sleep
> TBOOT: launching mini-guest for cpu 2
> TBOOT: MSR for SMM monitor control on cpu 3 is 0x0
> TBOOT: verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 3
> : succeeded.
> TBOOT: enabling SMIs on cpu 3
> TBOOT: VMXON done for cpu 3
> TBOOT: launching mini-guest for cpu 3
> TBOOT: cpu 1 waking up from TXT sleep
> TBOOT: MSR for SMM monitor control on cpu 1 is 0x0
> TBOOT: .verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 1
> . : succeeded.
> TBOOT: .enabling SMIs on cpu 1
> TBOOT: .VMXON done for cpu 1
> TBOOT: .launching mini-guest for cpu 1
> TBOOT: .
> TBOOT: all APs in wait-for-sipi
> TBOOT: saved IA32_MISC_ENABLE = 0x00850088
> TBOOT: set LT.CMD.SECRETS flag
> TBOOT: opened TPM locality 1
> TBOOT: DMAR table @ 0xbabe1000 saved.
> TBOOT: no LCP module found
> TBOOT: verifying module 0 of mbi (103000 - 27510b) in e820 table
> (range from 0000000000103000 to 000000000027510c is in
> E820_RAM)
> TBOOT: : succeeded.
> TBOOT: verifying module 1 of mbi (276000 - 68d9df) in e820 table
> (range from 0000000000276000 to 000000000068d9e0 is in
> E820_RAM)
> TBOOT: : succeeded.
> TBOOT: verifying module 2 of mbi (87e000 - 33101ff) in e820 table
> (range from 000000000087e000 to 0000000003310200 is in
> E820_RAM)
> TBOOT: : succeeded.
> TBOOT: protecting TXT heap (baf20000 - baffffff) in e820 table
> TBOOT: protecting SINIT (baf00000 - baf1ffff) in e820 table
> TBOOT: protecting TXT Private Space (fed20000 - fed2ffff) in e820 table
> TBOOT: verifying e820 table against SINIT MDRs: verification succeeded.
> TBOOT: verifying tboot and its page table (800000 - 87de5f) in e820 table
> (range from 0000000000800000 to 000000000087de60 is in
> E820_RAM)
> TBOOT: : succeeded.
> TBOOT: protecting tboot (800000 - 87dfff) in e820 table
> TBOOT: adjusted e820 map:
> TBOOT: 0000000000000000 - 000000000009d800 (1)
> TBOOT: 000000000009d800 - 00000000000a0000 (2)
> TBOOT: 00000000000e0000 - 0000000000100000 (2)
> TBOOT: 0000000000100000 - 0000000000800000 (1)
> TBOOT: 0000000000800000 - 000000000087e000 (5)
> TBOOT: 000000000087e000 - 0000000000f00000 (1)
> TBOOT: 0000000000f00000 - 0000000001000000 (2)
> TBOOT: 0000000001000000 - 00000000ba59f000 (1)
> TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
> TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
> TBOOT: 00000000bab9f000 - 00000000babff000 (3)
> TBOOT: 00000000babff000 - 00000000bac00000 (1)
> TBOOT: 00000000bac00000 - 00000000baf00000 (2)
> TBOOT: 00000000baf00000 - 00000000baf20000 (2)
> TBOOT: 00000000baf20000 - 00000000bb000000 (2)
> TBOOT: 00000000bb000000 - 00000000bfa00000 (2)
> TBOOT: 00000000f8000000 - 00000000fc000000 (2)
> TBOOT: 00000000fec00000 - 00000000fec01000 (2)
> TBOOT: 00000000fed08000 - 00000000fed09000 (2)
> TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
> TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
> TBOOT: 00000000fed20000 - 00000000fed30000 (2)
> TBOOT: 00000000fee00000 - 00000000fee01000 (2)
> TBOOT: 00000000ffd20000 - 0000000100000000 (2)
> TBOOT: 0000000100000000 - 000000013e600000 (1)
> TBOOT: verifying module "com1=115200,8n1,magic console=com1
> iommu=required dom0_mem=1024MB cpufreq=xen cpuidle
> earlyprintk=xenboot
> loglvl=all"...
> TBOOT: OK : d9 b0 09 b5 e2 ff 12 17 a3 80 c5 f6 fd 05 0c 03 8f 36 2e dd
> TBOOT: verifying module "root=/dev/mapper/NxVG-NxDisk6 ro quiet splash
> xencons=tty console=hvc0"...
> TBOOT: OK : 6f 47 e2 56 a4 f9 cf 82 77 ab c4 55 28 78 c3 0d a1 83 18 11
> TBOOT: verifying module ""...
> TBOOT: OK : 65 28 5f 70 c7 e8 ba e1 ee 8b d1 1a c3 9c f5 63 a0 5f d6 30
> TBOOT: all modules are verified
> TBOOT: pre_k_s3_state:
> TBOOT: vtd_pmr_lo_base: 0x0
> TBOOT: vtd_pmr_lo_size: 0xbac00000
> TBOOT: vtd_pmr_hi_base: 0x100000000
> TBOOT: vtd_pmr_hi_size: 0x3e600000
> TBOOT: pol_hash: 14 c8 20 da 3e eb ae b2 78 d8 7f a7 15 88 8f 53 d7 b4 36
> 8c
> TBOOT: VL measurements:
> TBOOT: PCR 17: 20 a4 55 4e 39 52 46 c6 46 d6 f1 92 cf 58 52 88 7f fd d0 07
> TBOOT: PCR 18: d9 b0 09 b5 e2 ff 12 17 a3 80 c5 f6 fd 05 0c 03 8f 36 2e dd
> TBOOT: PCRs before extending:
> TBOOT: PCR 17: cf 48 95 86 8b 40 18 3e 6e 41 9c ad 15 ed 26 6a bd e2 24 e2
> TBOOT: PCR 18: 37 97 eb ca 1f cc d6 5e 6d dd 42 8c a0 61 e0 f3 b6 e1 d6 86
> TBOOT: PCRs after extending:
> TBOOT: PCR 17: 55 a5 67 d8 aa 40 30 d2 f4 2f 96 bf 41 5e d7 77 43 3b a8 e7
> TBOOT: PCR 18: 18 66 e8 52 fd dd 0f ba 50 b9 b3 da 4e fa 4e bf 17 2d 7c bb
> TBOOT: tboot_shared data:
> TBOOT: version: 5
> TBOOT: log_addr: 0x00000000
> TBOOT: shutdown_entry: 0x008031b0
> TBOOT: shutdown_type: 0
> TBOOT: tboot_base: 0x00803000
> TBOOT: tboot_size: 0x7ae60
> TBOOT: num_in_wfs: 3
> TBOOT: no LCP module found
> TBOOT: kernel is ELF format
> TBOOT: i=0
> TBOOT: elf = 0x825f2c
> TBOOT: elf.e_phnum = 0x1
> TBOOT: elf.p_phentsize = 0x20
> TBOOT: elf.p_phoff = 0x34
> TBOOT: ph.p_filesz = 0x172000
> TBOOT: ph.p_memsz = 0x2b8000
> TBOOT: ph.p_addr = 0x100000
> TBOOT: ph.p_offset = 0x80
> TBOOT: transfering control to kernel @0x48000000...
> TBOOT: ******************* TBOOT *******************
> TBOOT: 2011-07-06 08:00 -0400 1:17221ef98ed6
> TBOOT: *********************************************
> TBOOT: command line: serial=115200,8n1,0x4000,19
> TBOOT: BSP is cpu 0
> TBOOT: original e820 map:
> TBOOT: 0000000000000000 - 000000000009d800 (1)
> TBOOT: 000000000009d800 - 00000000000a0000 (2)
> TBOOT: 00000000000e0000 - 0000000000100000 (2)
> TBOOT: 0000000000100000 - 00000000ba59f000 (1)
> TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
> TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
> TBOOT: 00000000bab9f000 - 00000000babff000 (3)
> TBOOT: 00000000babff000 - 00000000bac00000 (1)
> TBOOT: 00000000bac00000 - 00000000bfa00000 (2)
> TBOOT: 00000000f8000000 - 00000000fc000000 (2)
> TBOOT: 00000000fec00000 - 00000000fec01000 (2)
> TBOOT: 00000000fed08000 - 00000000fed09000 (2)
> TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
> TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
> TBOOT: 00000000fee00000 - 00000000fee01000 (2)
> TBOOT: 00000000ffd20000 - 0000000100000000 (2)
> TBOOT: 0000000100000000 - 000000013e600000 (1)
> TBOOT: TPM is ready
> TBOOT: TPM nv_locked: TRUE
> TBOOT: TPM timeout values: A: 750, B: 750, C: 750, D: 750
> TBOOT: reading Verified Launch Policy from TPM NV...
> TBOOT: :512 bytes read
> TBOOT: policy:
> TBOOT: version: 2
> TBOOT: policy_type: TB_POLTYPE_HALT
> TBOOT: hash_alg: TB_HALG_SHA1
> TBOOT: policy_control: 00000001 (EXTEND_PCR17)
> TBOOT: num_entries: 1
> TBOOT: policy entry[0]:
> TBOOT: mod_num: any
> TBOOT: pcr: none
> TBOOT: hash_type: TB_HTYPE_ANY
> TBOOT: num_hashes: 0
> TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
> TBOOT: CPU is SMX-capable
> TBOOT: CPU is VMX-capable
> TBOOT: SMX is enabled
> TBOOT: TXT chipset and all needed capabilities present
> TBOOT: TXT.ERRORCODE=0
> TBOOT: LT.ESTS=0
> TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
> TBOOT: CPU is SMX-capable
> TBOOT: CPU is VMX-capable
> TBOOT: SMX is enabled
> TBOOT: TXT chipset and all needed capabilities present
> TBOOT: unsupported BIOS data version (4)
> TBOOT: bios_data (@0xbaf20008, 0x56):
> TBOOT: version: 4
> TBOOT: bios_sinit_size: 0x0 (0)
> TBOOT: lcp_pd_base: 0x0
> TBOOT: lcp_pd_size: 0x0 (0)
> TBOOT: num_logical_procs: 4
> TBOOT: flags: 0x00000000
> TBOOT: CR0 and EFLAGS OK
> TBOOT: supports preserving machine check errors
> TBOOT: CPU is ready for SENTER
> TBOOT: disabling legacy USB SMIs
> TBOOT: checking previous errors on the last boot.
> last boot has error.
> TBOOT: chipset ids: vendor: 0x8086, device: 0xb001, revision: 0x1
> TBOOT: chipset production fused: 1
> TBOOT: checking if module is an SINIT for this platform...
> TBOOT: ACM info_table version mismatch (4)
> TBOOT: 1 ACM chipset id entries:
> TBOOT: vendor: 0x8086, device: 0xb001, flags: 0x1, revision:
> 0x1, extended: 0x0
> TBOOT: SINIT matches platform
> TBOOT: copied SINIT (size=c000) to 0xbaf00000
> TBOOT: AC mod base alignment OK
> TBOOT: AC mod size OK
> TBOOT: AC module header dump for SINIT:
> TBOOT: type: 0x2 (ACM_TYPE_CHIPSET)
> TBOOT: length: 0xa1 (161)
> TBOOT: version: 0
> TBOOT: chipset_id: 0xb001
> TBOOT: flags: 0x0
> TBOOT: pre_production: 0
> TBOOT: debug_signed: 0
> TBOOT: vendor: 0x8086
> TBOOT: date: 0x20110506
> TBOOT: size*4: 0xc000 (49152)
> TBOOT: code_control: 0x0
> TBOOT: entry point: 0x00000008:000034ce
> TBOOT: scratch_size: 0x8f (143)
> TBOOT: info_table:
> TBOOT: uuid: {0x7fc03aaa, 0x46a7, 0x18db, 0xac2e,
> {0x69, 0x8f, 0x8d, 0x41, 0x7f, 0x5a}}
> TBOOT: ACM_UUID_V3
> TBOOT: chipset_acm_type: 0x1 (SINIT)
> TBOOT: version: 4
> TBOOT: length: 0x2c (44)
> TBOOT: chipset_id_list: 0x4ec
> TBOOT: os_sinit_data_ver: 0x5
> TBOOT: min_mle_hdr_ver: 0x00020000
> TBOOT: capabilities: 0x0000000e
> TBOOT: rlp_wake_getsec: 0
> TBOOT: rlp_wake_monitor: 1
> TBOOT: ecx_pgtbl: 1
> TBOOT: acm_ver: 19
> TBOOT: chipset list:
> TBOOT: count: 1
> TBOOT: entry 0:
> TBOOT: flags: 0x1
> TBOOT: vendor_id: 0x8086
> TBOOT: device_id: 0xb001
> TBOOT: revision_id: 0x1
> TBOOT: extended_id: 0x0
> TBOOT: file addresses:
> TBOOT: &_start=0x803000
> TBOOT: &_end=0x87de60
> TBOOT: &_mle_start=0x803000
> TBOOT: &_mle_end=0x822000
> TBOOT: &_post_launch_entry=0x803020
> TBOOT: &_txt_wakeup=0x8031f0
> TBOOT: &g_mle_hdr=0x818980
> TBOOT: MLE header:
> TBOOT: uuid={0x9082ac5a, 0x476f, 0x74a7, 0x5c0f,
> {0x55, 0xa2, 0xcb, 0x51, 0xb6, 0x42}}
> TBOOT: length=34
> TBOOT: version=00020001
> TBOOT: entry_point=00000020
> TBOOT: first_valid_page=00000000
> TBOOT: mle_start_off=0
> TBOOT: mle_end_off=1f000
> TBOOT: capabilities: 0x00000007
> TBOOT: rlp_wake_getsec: 1
> TBOOT: rlp_wake_monitor: 1
> TBOOT: ecx_pgtbl: 1
> TBOOT: MLE start=803000, end=822000, size=1f000
> TBOOT: ptab_size=3000, ptab_base=0x800000
> TBOOT: unsupported BIOS data version (4)
> TBOOT: bios_data (@0xbaf20008, 0x56):
> TBOOT: version: 4
> TBOOT: bios_sinit_size: 0x0 (0)
> TBOOT: lcp_pd_base: 0x0
> TBOOT: lcp_pd_size: 0x0 (0)
> TBOOT: num_logical_procs: 4
> TBOOT: flags: 0x00000000
> TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbac00000
> TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x13e600000
> TBOOT: no LCP module found
> TBOOT: os_sinit_data (@0xbaf3017e, 0x64):
> TBOOT: version: 5
> TBOOT: mle_ptab: 0x800000
> TBOOT: mle_size: 0x1f000 (126976)
> TBOOT: mle_hdr_base: 0x15980
> TBOOT: vtd_pmr_lo_base: 0x0
> TBOOT: vtd_pmr_lo_size: 0xbac00000
> TBOOT: vtd_pmr_hi_base: 0x100000000
> TBOOT: vtd_pmr_hi_size: 0x3e600000
> TBOOT: lcp_po_base: 0x0
> TBOOT: lcp_po_size: 0x0 (0)
> TBOOT: capabilities: 0x00000002
> TBOOT: rlp_wake_getsec: 0
> TBOOT: rlp_wake_monitor: 1
> TBOOT: ecx_pgtbl: 0
> TBOOT: efi_rsdt_ptr: 0x0
> TBOOT: setting MTRRs for acmod: base=0xbaf00000, size=0xc000,
> num_pages=12
> TBOOT: executing GETSEC[SENTER]...
> TBOOT: ******************* TBOOT *******************
> TBOOT: 2011-07-06 08:00 -0400 1:17221ef98ed6
> TBOOT: *********************************************
> TBOOT: command line: serial=115200,8n1,0x4000,19
> TBOOT: BSP is cpu 0
> TBOOT: original e820 map:
> TBOOT: 0000000000000000 - 000000000009d800 (1)
> TBOOT: 000000000009d800 - 00000000000a0000 (2)
> TBOOT: 00000000000e0000 - 0000000000100000 (2)
> TBOOT: 0000000000100000 - 00000000ba59f000 (1)
> TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
> TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
> TBOOT: 00000000bab9f000 - 00000000babff000 (3)
> TBOOT: 00000000babff000 - 00000000bac00000 (1)
> TBOOT: 00000000bac00000 - 00000000bfa00000 (2)
> TBOOT: 00000000f8000000 - 00000000fc000000 (2)
> TBOOT: 00000000fec00000 - 00000000fec01000 (2)
> TBOOT: 00000000fed08000 - 00000000fed09000 (2)
> TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
> TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
> TBOOT: 00000000fee00000 - 00000000fee01000 (2)
> TBOOT: 00000000ffd20000 - 0000000100000000 (2)
> TBOOT: 0000000100000000 - 000000013e600000 (1)
> TBOOT: TPM is ready
> TBOOT: TPM nv_locked: TRUE
> TBOOT: TPM timeout values: A: 750, B: 750, C: 750, D: 750
> TBOOT: reading Verified Launch Policy from TPM NV...
> TBOOT: :512 bytes read
> TBOOT: policy:
> TBOOT: version: 2
> TBOOT: policy_type: TB_POLTYPE_HALT
> TBOOT: hash_alg: TB_HALG_SHA1
> TBOOT: policy_control: 00000001 (EXTEND_PCR17)
> TBOOT: num_entries: 1
> TBOOT: policy entry[0]:
> TBOOT: mod_num: any
> TBOOT: pcr: none
> TBOOT: hash_type: TB_HTYPE_ANY
> TBOOT: num_hashes: 0
> TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
> TBOOT: CPU is SMX-capable
> TBOOT: CPU is VMX-capable
> TBOOT: SMX is enabled
> TBOOT: TXT chipset and all needed capabilities present
> TBOOT: TXT.ERRORCODE=c0000001
> TBOOT: AC module error : acm_type=1, progress=00, error=0
> TBOOT: LT.ESTS=0
> TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
> TBOOT: CPU is SMX-capable
> TBOOT: CPU is VMX-capable
> TBOOT: SMX is enabled
> TBOOT: TXT chipset and all needed capabilities present
> TBOOT: unsupported BIOS data version (4)
> TBOOT: bios_data (@0xbaf20008, 0x56):
> TBOOT: version: 4
> TBOOT: bios_sinit_size: 0x0 (0)
> TBOOT: lcp_pd_base: 0x0
> TBOOT: lcp_pd_size: 0x0 (0)
> TBOOT: num_logical_procs: 4
> TBOOT: flags: 0x00000000
> TBOOT: measured launch succeeded
> TBOOT: unsupported BIOS data version (4)
> TBOOT: bios_data (@0xbaf20008, 0x56):
> TBOOT: version: 4
> TBOOT: bios_sinit_size: 0x0 (0)
> TBOOT: lcp_pd_base: 0x0
> TBOOT: lcp_pd_size: 0x0 (0)
> TBOOT: num_logical_procs: 4
> TBOOT: flags: 0x00000000
> TBOOT: os_mle_data (@0xbaf2005e, 0x10120):
> TBOOT: version: 2
> TBOOT: mbi: 0x275110
> TBOOT: os_sinit_data (@0xbaf3017e, 0x64):
> TBOOT: version: 5
> TBOOT: mle_ptab: 0x800000
> TBOOT: mle_size: 0x1f000 (126976)
> TBOOT: mle_hdr_base: 0x15980
> TBOOT: vtd_pmr_lo_base: 0x0
> TBOOT: vtd_pmr_lo_size: 0xbac00000
> TBOOT: vtd_pmr_hi_base: 0x100000000
> TBOOT: vtd_pmr_hi_size: 0x3e600000
> TBOOT: lcp_po_base: 0x0
> TBOOT: lcp_po_size: 0x0 (0)
> TBOOT: capabilities: 0x00000002
> TBOOT: rlp_wake_getsec: 0
> TBOOT: rlp_wake_monitor: 1
> TBOOT: ecx_pgtbl: 0
> TBOOT: efi_rsdt_ptr: 0x0
> TBOOT: sinit_mle_data (@0xbaf301e2, 0x22c):
> TBOOT: version: 8
> TBOOT: bios_acm_id:
> 80 00 00 00 20 10 10 22 00 00 b0 01 ff ff ff ff ff ff ff ff
> TBOOT: edx_senter_flags: 0x00000000
> TBOOT: mseg_valid: 0x0
> TBOOT: sinit_hash:
> 10 2c 49 2f 97 29 1d e6 c1 79 59 18 08 0a 1f 54 24 7f e1 2c
> TBOOT: mle_hash:
> ef c3 94 df 2d 87 e0 00 78 0c ae 06 6b 77 4f dd f7 98 bb cf
> TBOOT: stm_hash:
> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> TBOOT: lcp_policy_hash:
> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> TBOOT: lcp_policy_control: 0x00000000
> TBOOT: rlp_wakeup_addr: 0xbaf01a20
> TBOOT: num_mdrs: 7
> TBOOT: mdrs_off: 0x9c
> TBOOT: num_vtd_dmars: 232
> TBOOT: vtd_dmars_off: 0x144
> TBOOT: sinit_mdrs:
> TBOOT: 0000000000000000 - 00000000000a0000 (GOOD)
> TBOOT: 0000000000100000 - 0000000000f00000 (GOOD)
> TBOOT: 0000000001000000 - 00000000baf00000 (GOOD)
> TBOOT: 0000000000000000 - 0000000000000000 (GOOD)
> TBOOT: 0000000100000000 - 000000013e600000 (GOOD)
> TBOOT: 00000000bb000000 - 00000000bb800000 (SMRAM
> NON-OVERLAY)
> TBOOT: 00000000f8000000 - 00000000fc000000 (PCIE EXTENDED
> CONFIG)
> TBOOT: proc_scrtm_status: 0x00000000
> TBOOT: RSDP (v2, LENOVO �$) @ 0x0f00e0
> TBOOT: acpi_table_ioapic @ 0xbabe706c, .address = 0xfec00000
> TBOOT: acpi_table_mcfg @ 0xbabe6000, .base_address = 0xf8000000
> TBOOT: mtrr_def_type: e = 1, fe = 1, type = 0
> TBOOT: mtrrs:
> TBOOT: base mask type v
> TBOOT: 0ffc00 fffc00 05 01
> TBOOT: 000000 f80000 06 01
> TBOOT: 080000 fc0000 06 01
> TBOOT: 0bc000 ffc000 00 01
> TBOOT: 0bb000 fff000 00 01
> TBOOT: 0bac00 fffc00 00 01
> TBOOT: 100000 fc0000 06 01
> TBOOT: 13f000 fff000 00 01
> TBOOT: 13e800 fff800 00 01
> TBOOT: 13e600 fffe00 00 01
> TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbac00000
> TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x13e600000
> TBOOT: MSR for SMM monitor control on BSP is 0x0.
> TBOOT: verifying ILP is opt-out or has the same MSEG header with
> TXT.MSEG.BASE
> opt-out
> TBOOT: : succeeded.
> TBOOT: enabling SMIs on BSP
> TBOOT: mle_join.entry_point = 8031f0
> TBOOT: mle_join.seg_sel = 8
> TBOOT: mle_join.gdt_base = 804000
> TBOOT: mle_join.gdt_limit = 3f
> TBOOT: joining RLPs to MLE with MONITOR wakeup
> TBOOT: rlp_wakeup_addr = 0xbaf01a20
> TBOOT: cpu 3 waking up from TXT sleep
> TBOOT: waiting for all APs (3) to enter wait-for-sipi...
> TBOOT: MSR for SMM monitor control on cpu 3 is 0x0
> TBOOT: verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 3
> : succeeded.
> TBOOT: enabling SMIs on cpu 3
> TBOOT: .VMXON done for cpu 3
> TBOOT:
> TBOOT: launching mini-guest for cpu 3
> TBOOT: cpu 2 waking up from TXT sleep
> TBOOT: MSR for SMM monitor control on cpu 2 is 0x0
> TBOOT: verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 2
> : succeeded.
> TBOOT: enabling SMIs on cpu 2
> TBOOT: VMXON done for cpu 2
> TBOOT: launching mini-guest for cpu 2
> TBOOT: cpu 1 waking up from TXT sleep
> TBOOT: MSR for SMM monitor control on cpu 1 is 0x0
> TBOOT: .verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 1
> . : succeeded.
> TBOOT: .enabling SMIs on cpu 1
> TBOOT: .VMXON done for cpu 1
> TBOOT: .launching mini-guest for cpu 1
> TBOOT: .
> TBOOT: all APs in wait-for-sipi
> TBOOT: saved IA32_MISC_ENABLE = 0x00850088
> TBOOT: set LT.CMD.SECRETS flag
> TBOOT: opened TPM locality 1
> TBOOT: DMAR table @ 0xbabe1000 saved.
> TBOOT: no LCP module found
> TBOOT: verifying module 0 of mbi (103000 - 27510b) in e820 table
> (range from 0000000000103000 to 000000000027510c is in
> E820_RAM)
> TBOOT: : succeeded.
> TBOOT: verifying module 1 of mbi (276000 - 68d9df) in e820 table
> (range from 0000000000276000 to 000000000068d9e0 is in
> E820_RAM)
> TBOOT: : succeeded.
> TBOOT: verifying module 2 of mbi (87e000 - 33101ff) in e820 table
> (range from 000000000087e000 to 0000000003310200 is in
> E820_RAM)
> TBOOT: : succeeded.
> TBOOT: protecting TXT heap (baf20000 - baffffff) in e820 table
> TBOOT: protecting SINIT (baf00000 - baf1ffff) in e820 table
> TBOOT: protecting TXT Private Space (fed20000 - fed2ffff) in e820 table
> TBOOT: verifying e820 table against SINIT MDRs: verification succeeded.
> TBOOT: verifying tboot and its page table (800000 - 87de5f) in e820 table
> (range from 0000000000800000 to 000000000087de60 is in
> E820_RAM)
> TBOOT: : succeeded.
> TBOOT: protecting tboot (800000 - 87dfff) in e820 table
> TBOOT: adjusted e820 map:
> TBOOT: 0000000000000000 - 000000000009d800 (1)
> TBOOT: 000000000009d800 - 00000000000a0000 (2)
> TBOOT: 00000000000e0000 - 0000000000100000 (2)
> TBOOT: 0000000000100000 - 0000000000800000 (1)
> TBOOT: 0000000000800000 - 000000000087e000 (5)
> TBOOT: 000000000087e000 - 0000000000f00000 (1)
> TBOOT: 0000000000f00000 - 0000000001000000 (2)
> TBOOT: 0000000001000000 - 00000000ba59f000 (1)
> TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
> TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
> TBOOT: 00000000bab9f000 - 00000000babff000 (3)
> TBOOT: 00000000babff000 - 00000000bac00000 (1)
> TBOOT: 00000000bac00000 - 00000000baf00000 (2)
> TBOOT: 00000000baf00000 - 00000000baf20000 (2)
> TBOOT: 00000000baf20000 - 00000000bb000000 (2)
> TBOOT: 00000000bb000000 - 00000000bfa00000 (2)
> TBOOT: 00000000f8000000 - 00000000fc000000 (2)
> TBOOT: 00000000fec00000 - 00000000fec01000 (2)
> TBOOT: 00000000fed08000 - 00000000fed09000 (2)
> TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
> TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
> TBOOT: 00000000fed20000 - 00000000fed30000 (2)
> TBOOT: 00000000fee00000 - 00000000fee01000 (2)
> TBOOT: 00000000ffd20000 - 0000000100000000 (2)
> TBOOT: 0000000100000000 - 000000013e600000 (1)
> TBOOT: verifying module "com1=115200,8n1,magic console=com1
> iommu=required dom0_mem=1024MB cpufreq=xen cpuidle
> earlyprintk=xenboot
> loglvl=all"...
> TBOOT: OK : d9 b0 09 b5 e2 ff 12 17 a3 80 c5 f6 fd 05 0c 03 8f 36 2e dd
> TBOOT: verifying module "root=/dev/mapper/NxVG-NxDisk6 ro quiet splash
> xencons=tty console=hvc0"...
> TBOOT: OK : 6f 47 e2 56 a4 f9 cf 82 77 ab c4 55 28 78 c3 0d a1 83 18 11
> TBOOT: verifying module ""...
> TBOOT: OK : 65 28 5f 70 c7 e8 ba e1 ee 8b d1 1a c3 9c f5 63 a0 5f d6 30
> TBOOT: all modules are verified
> TBOOT: pre_k_s3_state:
> TBOOT: vtd_pmr_lo_base: 0x0
> TBOOT: vtd_pmr_lo_size: 0xbac00000
> TBOOT: vtd_pmr_hi_base: 0x100000000
> TBOOT: vtd_pmr_hi_size: 0x3e600000
> TBOOT: pol_hash: 14 c8 20 da 3e eb ae b2 78 d8 7f a7 15 88 8f 53 d7 b4 36
> 8c
> TBOOT: VL measurements:
> TBOOT: PCR 17: 20 a4 55 4e 39 52 46 c6 46 d6 f1 92 cf 58 52 88 7f fd d0 07
> TBOOT: PCR 18: d9 b0 09 b5 e2 ff 12 17 a3 80 c5 f6 fd 05 0c 03 8f 36 2e dd
> TBOOT: PCRs before extending:
> TBOOT: PCR 17: cf 48 95 86 8b 40 18 3e 6e 41 9c ad 15 ed 26 6a bd e2 24 e2
> TBOOT: PCR 18: 37 97 eb ca 1f cc d6 5e 6d dd 42 8c a0 61 e0 f3 b6 e1 d6 86
> TBOOT: PCRs after extending:
> TBOOT: PCR 17: 55 a5 67 d8 aa 40 30 d2 f4 2f 96 bf 41 5e d7 77 43 3b a8 e7
> TBOOT: PCR 18: 18 66 e8 52 fd dd 0f ba 50 b9 b3 da 4e fa 4e bf 17 2d 7c bb
> TBOOT: tboot_shared data:
> TBOOT: version: 5
> TBOOT: log_addr: 0x00000000
> TBOOT: shutdown_entry: 0x008031b0
> TBOOT: shutdown_type: 0
> TBOOT: tboot_base: 0x00803000
> TBOOT: tboot_size: 0x7ae60
> TBOOT: num_in_wfs: 3
> TBOOT: no LCP module found
> TBOOT: kernel is ELF format
> TBOOT: i=0
> TBOOT: elf = 0x825f2c
> TBOOT: elf.e_phnum = 0x1
> TBOOT: elf.p_phentsize = 0x20
> TBOOT: elf.p_phoff = 0x34
> TBOOT: ph.p_filesz = 0x172000
> TBOOT: ph.p_memsz = 0x2b8000
> TBOOT: ph.p_addr = 0x100000
> TBOOT: ph.p_offset = 0x80
> TBOOT: transfering control to kernel @0x48000000...
>
> ------------------------------------------------------------------------------
> All of the data generated in your IT infrastructure is seriously valuable.
> Why? It contains a definitive record of application performance, security
> threats, fraudulent activity, and more. Splunk takes this data and makes
> sense of it. IT sense. And common sense.
> http://p.sf.net/sfu/splunk-d2d-c2
> _______________________________________________
> tboot-devel mailing list
> tbo...@li...
> https://lists.sourceforge.net/lists/listinfo/tboot-devel
|
|
From: Ben G. <be...@gu...> - 2011-07-06 17:06:05
|
I am attempting to get tboot working with Xen-4.0.2, grub2, and the
2nd_gen_i5_i7_SINIT_19.BIN module working, but have been having
limited results, with things seeming to hang when loading xen
I've traced this back to tboot/common/elf.c in expand_elf_image()
objdump shows that tboot gets loaded at the following:
start address 0x00803000
Program Header:
LOAD off 0x00001000 vaddr 0x00803000 paddr 0x00803000 align 2**12
filesz 0x00022000 memsz 0x0007ae60 flags rwx
...and xen at the following:
start address 0x00100000
Program Header:
LOAD off 0x00000080 vaddr 0x00100000 paddr 0x00100000 align 2**6
filesz 0x00172000 memsz 0x002b8000 flags rwx
In the for loop in expand_elf_image, when it is doing the memcpy, and
memset - it seems to overwrite the heap, and get into an infinite loop
Is anyone else running into issues like this?
Any suggestions, or ideas would be greatly appreciated.
Ben Guthro
My grub entry looks like the following:
menuentry "TXT: test1" {
saved_entry=0
save_env saved_entry
set root=(MyVG-MyBootDisk)
multiboot /tboot.gz logging=vga,memory serial=115200,8n1,0x4000,19
module /xen.gz com1=115200,8n1,magic console=com1
iommu=required dom0_mem=1024MB cpufreq=xen cpuidle earlyprintk=xenboot
loglvl=all
module /vmlinuz-2.6.38 root=/dev/mapper/MyRootDisk ro quiet
splash xencons=tty console=hvc0
module /initrd.img-2.6.38
module /2nd_gen_i5_i7_SINIT_19.BIN
}
tboot debug looks like the following:
diff -r 17221ef98ed6 tboot/common/elf.c
--- a/tboot/common/elf.c
+++ b/tboot/common/elf.c
@@ -163,16 +163,29 @@
/* assumed that already passed is_elf_image() check */
+
/* load elf image into memory */
for ( int i = 0; i < elf->e_phnum; i++ ) {
elf_program_header_t *ph = (elf_program_header_t *)
((void *)elf + elf->e_phoff + i*elf->e_phentsize);
-
+ printk("i=%d\n", i);
+ printk(" elf = 0x%x\n", (int)&elf);
+ printk(" elf.e_phnum = 0x%x\n", elf->e_phnum);
+ printk(" elf.p_phentsize = 0x%x\n", elf->e_phentsize);
+ printk(" elf.p_phoff = 0x%x\n", elf->e_phoff);
+ printk(" ph.p_filesz = 0x%x\n", ph->p_filesz);
+ printk(" ph.p_memsz = 0x%x\n", ph->p_memsz);
+ printk(" ph.p_addr = 0x%x\n", ph->p_paddr);
+ printk(" ph.p_offset = 0x%x\n", ph->p_offset);
if ( ph->p_type == PT_LOAD ) {
memcpy((void *)ph->p_paddr, (void *)elf + ph->p_offset,
ph->p_filesz);
+#if 0
memset((void *)(ph->p_paddr + ph->p_filesz), 0,
ph->p_memsz - ph->p_filesz);
+#else
+ break;
+#endif
}
}
And finally, my tboot debug output:
TBOOT: ******************* TBOOT *******************
TBOOT: 2011-07-06 08:00 -0400 1:17221ef98ed6
TBOOT: *********************************************
TBOOT: command line: serial=115200,8n1,0x4000,19
TBOOT: BSP is cpu 0
TBOOT: original e820 map:
TBOOT: 0000000000000000 - 000000000009d800 (1)
TBOOT: 000000000009d800 - 00000000000a0000 (2)
TBOOT: 00000000000e0000 - 0000000000100000 (2)
TBOOT: 0000000000100000 - 00000000ba59f000 (1)
TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
TBOOT: 00000000bab9f000 - 00000000babff000 (3)
TBOOT: 00000000babff000 - 00000000bac00000 (1)
TBOOT: 00000000bac00000 - 00000000bfa00000 (2)
TBOOT: 00000000f8000000 - 00000000fc000000 (2)
TBOOT: 00000000fec00000 - 00000000fec01000 (2)
TBOOT: 00000000fed08000 - 00000000fed09000 (2)
TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
TBOOT: 00000000fee00000 - 00000000fee01000 (2)
TBOOT: 00000000ffd20000 - 0000000100000000 (2)
TBOOT: 0000000100000000 - 000000013e600000 (1)
TBOOT: TPM is ready
TBOOT: TPM nv_locked: TRUE
TBOOT: TPM timeout values: A: 750, B: 750, C: 750, D: 750
TBOOT: reading Verified Launch Policy from TPM NV...
TBOOT: :512 bytes read
TBOOT: policy:
TBOOT: version: 2
TBOOT: policy_type: TB_POLTYPE_HALT
TBOOT: hash_alg: TB_HALG_SHA1
TBOOT: policy_control: 00000001 (EXTEND_PCR17)
TBOOT: num_entries: 1
TBOOT: policy entry[0]:
TBOOT: mod_num: any
TBOOT: pcr: none
TBOOT: hash_type: TB_HTYPE_ANY
TBOOT: num_hashes: 0
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: TXT.ERRORCODE=0
TBOOT: LT.ESTS=0
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: unsupported BIOS data version (4)
TBOOT: bios_data (@0xbaf20008, 0x56):
TBOOT: version: 4
TBOOT: bios_sinit_size: 0x0 (0)
TBOOT: lcp_pd_base: 0x0
TBOOT: lcp_pd_size: 0x0 (0)
TBOOT: num_logical_procs: 4
TBOOT: flags: 0x00000000
TBOOT: CR0 and EFLAGS OK
TBOOT: supports preserving machine check errors
TBOOT: CPU is ready for SENTER
TBOOT: disabling legacy USB SMIs
TBOOT: checking previous errors on the last boot.
last boot has error.
TBOOT: chipset ids: vendor: 0x8086, device: 0xb001, revision: 0x1
TBOOT: chipset production fused: 1
TBOOT: checking if module is an SINIT for this platform...
TBOOT: ACM info_table version mismatch (4)
TBOOT: 1 ACM chipset id entries:
TBOOT: vendor: 0x8086, device: 0xb001, flags: 0x1, revision:
0x1, extended: 0x0
TBOOT: SINIT matches platform
TBOOT: copied SINIT (size=c000) to 0xbaf00000
TBOOT: AC mod base alignment OK
TBOOT: AC mod size OK
TBOOT: AC module header dump for SINIT:
TBOOT: type: 0x2 (ACM_TYPE_CHIPSET)
TBOOT: length: 0xa1 (161)
TBOOT: version: 0
TBOOT: chipset_id: 0xb001
TBOOT: flags: 0x0
TBOOT: pre_production: 0
TBOOT: debug_signed: 0
TBOOT: vendor: 0x8086
TBOOT: date: 0x20110506
TBOOT: size*4: 0xc000 (49152)
TBOOT: code_control: 0x0
TBOOT: entry point: 0x00000008:000034ce
TBOOT: scratch_size: 0x8f (143)
TBOOT: info_table:
TBOOT: uuid: {0x7fc03aaa, 0x46a7, 0x18db, 0xac2e,
{0x69, 0x8f, 0x8d, 0x41, 0x7f, 0x5a}}
TBOOT: ACM_UUID_V3
TBOOT: chipset_acm_type: 0x1 (SINIT)
TBOOT: version: 4
TBOOT: length: 0x2c (44)
TBOOT: chipset_id_list: 0x4ec
TBOOT: os_sinit_data_ver: 0x5
TBOOT: min_mle_hdr_ver: 0x00020000
TBOOT: capabilities: 0x0000000e
TBOOT: rlp_wake_getsec: 0
TBOOT: rlp_wake_monitor: 1
TBOOT: ecx_pgtbl: 1
TBOOT: acm_ver: 19
TBOOT: chipset list:
TBOOT: count: 1
TBOOT: entry 0:
TBOOT: flags: 0x1
TBOOT: vendor_id: 0x8086
TBOOT: device_id: 0xb001
TBOOT: revision_id: 0x1
TBOOT: extended_id: 0x0
TBOOT: file addresses:
TBOOT: &_start=0x803000
TBOOT: &_end=0x87de60
TBOOT: &_mle_start=0x803000
TBOOT: &_mle_end=0x822000
TBOOT: &_post_launch_entry=0x803020
TBOOT: &_txt_wakeup=0x8031f0
TBOOT: &g_mle_hdr=0x818980
TBOOT: MLE header:
TBOOT: uuid={0x9082ac5a, 0x476f, 0x74a7, 0x5c0f,
{0x55, 0xa2, 0xcb, 0x51, 0xb6, 0x42}}
TBOOT: length=34
TBOOT: version=00020001
TBOOT: entry_point=00000020
TBOOT: first_valid_page=00000000
TBOOT: mle_start_off=0
TBOOT: mle_end_off=1f000
TBOOT: capabilities: 0x00000007
TBOOT: rlp_wake_getsec: 1
TBOOT: rlp_wake_monitor: 1
TBOOT: ecx_pgtbl: 1
TBOOT: MLE start=803000, end=822000, size=1f000
TBOOT: ptab_size=3000, ptab_base=0x800000
TBOOT: unsupported BIOS data version (4)
TBOOT: bios_data (@0xbaf20008, 0x56):
TBOOT: version: 4
TBOOT: bios_sinit_size: 0x0 (0)
TBOOT: lcp_pd_base: 0x0
TBOOT: lcp_pd_size: 0x0 (0)
TBOOT: num_logical_procs: 4
TBOOT: flags: 0x00000000
TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbac00000
TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x13e600000
TBOOT: no LCP module found
TBOOT: os_sinit_data (@0xbaf3017e, 0x64):
TBOOT: version: 5
TBOOT: mle_ptab: 0x800000
TBOOT: mle_size: 0x1f000 (126976)
TBOOT: mle_hdr_base: 0x15980
TBOOT: vtd_pmr_lo_base: 0x0
TBOOT: vtd_pmr_lo_size: 0xbac00000
TBOOT: vtd_pmr_hi_base: 0x100000000
TBOOT: vtd_pmr_hi_size: 0x3e600000
TBOOT: lcp_po_base: 0x0
TBOOT: lcp_po_size: 0x0 (0)
TBOOT: capabilities: 0x00000002
TBOOT: rlp_wake_getsec: 0
TBOOT: rlp_wake_monitor: 1
TBOOT: ecx_pgtbl: 0
TBOOT: efi_rsdt_ptr: 0x0
TBOOT: setting MTRRs for acmod: base=0xbaf00000, size=0xc000, num_pages=12
TBOOT: executing GETSEC[SENTER]...
TBOOT: ******************* TBOOT *******************
TBOOT: 2011-07-06 08:00 -0400 1:17221ef98ed6
TBOOT: *********************************************
TBOOT: command line: serial=115200,8n1,0x4000,19
TBOOT: BSP is cpu 0
TBOOT: original e820 map:
TBOOT: 0000000000000000 - 000000000009d800 (1)
TBOOT: 000000000009d800 - 00000000000a0000 (2)
TBOOT: 00000000000e0000 - 0000000000100000 (2)
TBOOT: 0000000000100000 - 00000000ba59f000 (1)
TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
TBOOT: 00000000bab9f000 - 00000000babff000 (3)
TBOOT: 00000000babff000 - 00000000bac00000 (1)
TBOOT: 00000000bac00000 - 00000000bfa00000 (2)
TBOOT: 00000000f8000000 - 00000000fc000000 (2)
TBOOT: 00000000fec00000 - 00000000fec01000 (2)
TBOOT: 00000000fed08000 - 00000000fed09000 (2)
TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
TBOOT: 00000000fee00000 - 00000000fee01000 (2)
TBOOT: 00000000ffd20000 - 0000000100000000 (2)
TBOOT: 0000000100000000 - 000000013e600000 (1)
TBOOT: TPM is ready
TBOOT: TPM nv_locked: TRUE
TBOOT: TPM timeout values: A: 750, B: 750, C: 750, D: 750
TBOOT: reading Verified Launch Policy from TPM NV...
TBOOT: :512 bytes read
TBOOT: policy:
TBOOT: version: 2
TBOOT: policy_type: TB_POLTYPE_HALT
TBOOT: hash_alg: TB_HALG_SHA1
TBOOT: policy_control: 00000001 (EXTEND_PCR17)
TBOOT: num_entries: 1
TBOOT: policy entry[0]:
TBOOT: mod_num: any
TBOOT: pcr: none
TBOOT: hash_type: TB_HTYPE_ANY
TBOOT: num_hashes: 0
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: TXT.ERRORCODE=c0000001
TBOOT: AC module error : acm_type=1, progress=00, error=0
TBOOT: LT.ESTS=0
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: unsupported BIOS data version (4)
TBOOT: bios_data (@0xbaf20008, 0x56):
TBOOT: version: 4
TBOOT: bios_sinit_size: 0x0 (0)
TBOOT: lcp_pd_base: 0x0
TBOOT: lcp_pd_size: 0x0 (0)
TBOOT: num_logical_procs: 4
TBOOT: flags: 0x00000000
TBOOT: measured launch succeeded
TBOOT: unsupported BIOS data version (4)
TBOOT: bios_data (@0xbaf20008, 0x56):
TBOOT: version: 4
TBOOT: bios_sinit_size: 0x0 (0)
TBOOT: lcp_pd_base: 0x0
TBOOT: lcp_pd_size: 0x0 (0)
TBOOT: num_logical_procs: 4
TBOOT: flags: 0x00000000
TBOOT: os_mle_data (@0xbaf2005e, 0x10120):
TBOOT: version: 2
TBOOT: mbi: 0x275110
TBOOT: os_sinit_data (@0xbaf3017e, 0x64):
TBOOT: version: 5
TBOOT: mle_ptab: 0x800000
TBOOT: mle_size: 0x1f000 (126976)
TBOOT: mle_hdr_base: 0x15980
TBOOT: vtd_pmr_lo_base: 0x0
TBOOT: vtd_pmr_lo_size: 0xbac00000
TBOOT: vtd_pmr_hi_base: 0x100000000
TBOOT: vtd_pmr_hi_size: 0x3e600000
TBOOT: lcp_po_base: 0x0
TBOOT: lcp_po_size: 0x0 (0)
TBOOT: capabilities: 0x00000002
TBOOT: rlp_wake_getsec: 0
TBOOT: rlp_wake_monitor: 1
TBOOT: ecx_pgtbl: 0
TBOOT: efi_rsdt_ptr: 0x0
TBOOT: sinit_mle_data (@0xbaf301e2, 0x22c):
TBOOT: version: 8
TBOOT: bios_acm_id:
80 00 00 00 20 10 10 22 00 00 b0 01 ff ff ff ff ff ff ff ff
TBOOT: edx_senter_flags: 0x00000000
TBOOT: mseg_valid: 0x0
TBOOT: sinit_hash:
10 2c 49 2f 97 29 1d e6 c1 79 59 18 08 0a 1f 54 24 7f e1 2c
TBOOT: mle_hash:
ef c3 94 df 2d 87 e0 00 78 0c ae 06 6b 77 4f dd f7 98 bb cf
TBOOT: stm_hash:
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
TBOOT: lcp_policy_hash:
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
TBOOT: lcp_policy_control: 0x00000000
TBOOT: rlp_wakeup_addr: 0xbaf01a20
TBOOT: num_mdrs: 7
TBOOT: mdrs_off: 0x9c
TBOOT: num_vtd_dmars: 232
TBOOT: vtd_dmars_off: 0x144
TBOOT: sinit_mdrs:
TBOOT: 0000000000000000 - 00000000000a0000 (GOOD)
TBOOT: 0000000000100000 - 0000000000f00000 (GOOD)
TBOOT: 0000000001000000 - 00000000baf00000 (GOOD)
TBOOT: 0000000000000000 - 0000000000000000 (GOOD)
TBOOT: 0000000100000000 - 000000013e600000 (GOOD)
TBOOT: 00000000bb000000 - 00000000bb800000 (SMRAM NON-OVERLAY)
TBOOT: 00000000f8000000 - 00000000fc000000 (PCIE EXTENDED CONFIG)
TBOOT: proc_scrtm_status: 0x00000000
TBOOT: RSDP (v2, LENOVO �$) @ 0x0f00e0
TBOOT: acpi_table_ioapic @ 0xbabe706c, .address = 0xfec00000
TBOOT: acpi_table_mcfg @ 0xbabe6000, .base_address = 0xf8000000
TBOOT: mtrr_def_type: e = 1, fe = 1, type = 0
TBOOT: mtrrs:
TBOOT: base mask type v
TBOOT: 0ffc00 fffc00 05 01
TBOOT: 000000 f80000 06 01
TBOOT: 080000 fc0000 06 01
TBOOT: 0bc000 ffc000 00 01
TBOOT: 0bb000 fff000 00 01
TBOOT: 0bac00 fffc00 00 01
TBOOT: 100000 fc0000 06 01
TBOOT: 13f000 fff000 00 01
TBOOT: 13e800 fff800 00 01
TBOOT: 13e600 fffe00 00 01
TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbac00000
TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x13e600000
TBOOT: MSR for SMM monitor control on BSP is 0x0.
TBOOT: verifying ILP is opt-out or has the same MSEG header with TXT.MSEG.BASE
opt-out
TBOOT: : succeeded.
TBOOT: enabling SMIs on BSP
TBOOT: mle_join.entry_point = 8031f0
TBOOT: mle_join.seg_sel = 8
TBOOT: mle_join.gdt_base = 804000
TBOOT: mle_join.gdt_limit = 3f
TBOOT: joining RLPs to MLE with MONITOR wakeup
TBOOT: rlp_wakeup_addr = 0xbaf01a20
TBOOT: cpu 2 waking up from TXT sleep
TBOOT: waiting for all APs (3) to enter wait-for-sipi...
TBOOT: MSR for SMM monitor control on cpu 2 is 0x0
TBOOT: verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 2
: succeeded.
TBOOT: enabling SMIs on cpu 2
TBOOT: .VMXON done for cpu 2
TBOOT:
TBOOT: cpu 3 waking up from TXT sleep
TBOOT: launching mini-guest for cpu 2
TBOOT: MSR for SMM monitor control on cpu 3 is 0x0
TBOOT: verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 3
: succeeded.
TBOOT: enabling SMIs on cpu 3
TBOOT: VMXON done for cpu 3
TBOOT: launching mini-guest for cpu 3
TBOOT: cpu 1 waking up from TXT sleep
TBOOT: MSR for SMM monitor control on cpu 1 is 0x0
TBOOT: .verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 1
. : succeeded.
TBOOT: .enabling SMIs on cpu 1
TBOOT: .VMXON done for cpu 1
TBOOT: .launching mini-guest for cpu 1
TBOOT: .
TBOOT: all APs in wait-for-sipi
TBOOT: saved IA32_MISC_ENABLE = 0x00850088
TBOOT: set LT.CMD.SECRETS flag
TBOOT: opened TPM locality 1
TBOOT: DMAR table @ 0xbabe1000 saved.
TBOOT: no LCP module found
TBOOT: verifying module 0 of mbi (103000 - 27510b) in e820 table
(range from 0000000000103000 to 000000000027510c is in E820_RAM)
TBOOT: : succeeded.
TBOOT: verifying module 1 of mbi (276000 - 68d9df) in e820 table
(range from 0000000000276000 to 000000000068d9e0 is in E820_RAM)
TBOOT: : succeeded.
TBOOT: verifying module 2 of mbi (87e000 - 33101ff) in e820 table
(range from 000000000087e000 to 0000000003310200 is in E820_RAM)
TBOOT: : succeeded.
TBOOT: protecting TXT heap (baf20000 - baffffff) in e820 table
TBOOT: protecting SINIT (baf00000 - baf1ffff) in e820 table
TBOOT: protecting TXT Private Space (fed20000 - fed2ffff) in e820 table
TBOOT: verifying e820 table against SINIT MDRs: verification succeeded.
TBOOT: verifying tboot and its page table (800000 - 87de5f) in e820 table
(range from 0000000000800000 to 000000000087de60 is in E820_RAM)
TBOOT: : succeeded.
TBOOT: protecting tboot (800000 - 87dfff) in e820 table
TBOOT: adjusted e820 map:
TBOOT: 0000000000000000 - 000000000009d800 (1)
TBOOT: 000000000009d800 - 00000000000a0000 (2)
TBOOT: 00000000000e0000 - 0000000000100000 (2)
TBOOT: 0000000000100000 - 0000000000800000 (1)
TBOOT: 0000000000800000 - 000000000087e000 (5)
TBOOT: 000000000087e000 - 0000000000f00000 (1)
TBOOT: 0000000000f00000 - 0000000001000000 (2)
TBOOT: 0000000001000000 - 00000000ba59f000 (1)
TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
TBOOT: 00000000bab9f000 - 00000000babff000 (3)
TBOOT: 00000000babff000 - 00000000bac00000 (1)
TBOOT: 00000000bac00000 - 00000000baf00000 (2)
TBOOT: 00000000baf00000 - 00000000baf20000 (2)
TBOOT: 00000000baf20000 - 00000000bb000000 (2)
TBOOT: 00000000bb000000 - 00000000bfa00000 (2)
TBOOT: 00000000f8000000 - 00000000fc000000 (2)
TBOOT: 00000000fec00000 - 00000000fec01000 (2)
TBOOT: 00000000fed08000 - 00000000fed09000 (2)
TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
TBOOT: 00000000fed20000 - 00000000fed30000 (2)
TBOOT: 00000000fee00000 - 00000000fee01000 (2)
TBOOT: 00000000ffd20000 - 0000000100000000 (2)
TBOOT: 0000000100000000 - 000000013e600000 (1)
TBOOT: verifying module "com1=115200,8n1,magic console=com1
iommu=required dom0_mem=1024MB cpufreq=xen cpuidle earlyprintk=xenboot
loglvl=all"...
TBOOT: OK : d9 b0 09 b5 e2 ff 12 17 a3 80 c5 f6 fd 05 0c 03 8f 36 2e dd
TBOOT: verifying module "root=/dev/mapper/NxVG-NxDisk6 ro quiet splash
xencons=tty console=hvc0"...
TBOOT: OK : 6f 47 e2 56 a4 f9 cf 82 77 ab c4 55 28 78 c3 0d a1 83 18 11
TBOOT: verifying module ""...
TBOOT: OK : 65 28 5f 70 c7 e8 ba e1 ee 8b d1 1a c3 9c f5 63 a0 5f d6 30
TBOOT: all modules are verified
TBOOT: pre_k_s3_state:
TBOOT: vtd_pmr_lo_base: 0x0
TBOOT: vtd_pmr_lo_size: 0xbac00000
TBOOT: vtd_pmr_hi_base: 0x100000000
TBOOT: vtd_pmr_hi_size: 0x3e600000
TBOOT: pol_hash: 14 c8 20 da 3e eb ae b2 78 d8 7f a7 15 88 8f 53 d7 b4 36 8c
TBOOT: VL measurements:
TBOOT: PCR 17: 20 a4 55 4e 39 52 46 c6 46 d6 f1 92 cf 58 52 88 7f fd d0 07
TBOOT: PCR 18: d9 b0 09 b5 e2 ff 12 17 a3 80 c5 f6 fd 05 0c 03 8f 36 2e dd
TBOOT: PCRs before extending:
TBOOT: PCR 17: cf 48 95 86 8b 40 18 3e 6e 41 9c ad 15 ed 26 6a bd e2 24 e2
TBOOT: PCR 18: 37 97 eb ca 1f cc d6 5e 6d dd 42 8c a0 61 e0 f3 b6 e1 d6 86
TBOOT: PCRs after extending:
TBOOT: PCR 17: 55 a5 67 d8 aa 40 30 d2 f4 2f 96 bf 41 5e d7 77 43 3b a8 e7
TBOOT: PCR 18: 18 66 e8 52 fd dd 0f ba 50 b9 b3 da 4e fa 4e bf 17 2d 7c bb
TBOOT: tboot_shared data:
TBOOT: version: 5
TBOOT: log_addr: 0x00000000
TBOOT: shutdown_entry: 0x008031b0
TBOOT: shutdown_type: 0
TBOOT: tboot_base: 0x00803000
TBOOT: tboot_size: 0x7ae60
TBOOT: num_in_wfs: 3
TBOOT: no LCP module found
TBOOT: kernel is ELF format
TBOOT: i=0
TBOOT: elf = 0x825f2c
TBOOT: elf.e_phnum = 0x1
TBOOT: elf.p_phentsize = 0x20
TBOOT: elf.p_phoff = 0x34
TBOOT: ph.p_filesz = 0x172000
TBOOT: ph.p_memsz = 0x2b8000
TBOOT: ph.p_addr = 0x100000
TBOOT: ph.p_offset = 0x80
TBOOT: transfering control to kernel @0x48000000...
TBOOT: ******************* TBOOT *******************
TBOOT: 2011-07-06 08:00 -0400 1:17221ef98ed6
TBOOT: *********************************************
TBOOT: command line: serial=115200,8n1,0x4000,19
TBOOT: BSP is cpu 0
TBOOT: original e820 map:
TBOOT: 0000000000000000 - 000000000009d800 (1)
TBOOT: 000000000009d800 - 00000000000a0000 (2)
TBOOT: 00000000000e0000 - 0000000000100000 (2)
TBOOT: 0000000000100000 - 00000000ba59f000 (1)
TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
TBOOT: 00000000bab9f000 - 00000000babff000 (3)
TBOOT: 00000000babff000 - 00000000bac00000 (1)
TBOOT: 00000000bac00000 - 00000000bfa00000 (2)
TBOOT: 00000000f8000000 - 00000000fc000000 (2)
TBOOT: 00000000fec00000 - 00000000fec01000 (2)
TBOOT: 00000000fed08000 - 00000000fed09000 (2)
TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
TBOOT: 00000000fee00000 - 00000000fee01000 (2)
TBOOT: 00000000ffd20000 - 0000000100000000 (2)
TBOOT: 0000000100000000 - 000000013e600000 (1)
TBOOT: TPM is ready
TBOOT: TPM nv_locked: TRUE
TBOOT: TPM timeout values: A: 750, B: 750, C: 750, D: 750
TBOOT: reading Verified Launch Policy from TPM NV...
TBOOT: :512 bytes read
TBOOT: policy:
TBOOT: version: 2
TBOOT: policy_type: TB_POLTYPE_HALT
TBOOT: hash_alg: TB_HALG_SHA1
TBOOT: policy_control: 00000001 (EXTEND_PCR17)
TBOOT: num_entries: 1
TBOOT: policy entry[0]:
TBOOT: mod_num: any
TBOOT: pcr: none
TBOOT: hash_type: TB_HTYPE_ANY
TBOOT: num_hashes: 0
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: TXT.ERRORCODE=0
TBOOT: LT.ESTS=0
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: unsupported BIOS data version (4)
TBOOT: bios_data (@0xbaf20008, 0x56):
TBOOT: version: 4
TBOOT: bios_sinit_size: 0x0 (0)
TBOOT: lcp_pd_base: 0x0
TBOOT: lcp_pd_size: 0x0 (0)
TBOOT: num_logical_procs: 4
TBOOT: flags: 0x00000000
TBOOT: CR0 and EFLAGS OK
TBOOT: supports preserving machine check errors
TBOOT: CPU is ready for SENTER
TBOOT: disabling legacy USB SMIs
TBOOT: checking previous errors on the last boot.
last boot has error.
TBOOT: chipset ids: vendor: 0x8086, device: 0xb001, revision: 0x1
TBOOT: chipset production fused: 1
TBOOT: checking if module is an SINIT for this platform...
TBOOT: ACM info_table version mismatch (4)
TBOOT: 1 ACM chipset id entries:
TBOOT: vendor: 0x8086, device: 0xb001, flags: 0x1, revision:
0x1, extended: 0x0
TBOOT: SINIT matches platform
TBOOT: copied SINIT (size=c000) to 0xbaf00000
TBOOT: AC mod base alignment OK
TBOOT: AC mod size OK
TBOOT: AC module header dump for SINIT:
TBOOT: type: 0x2 (ACM_TYPE_CHIPSET)
TBOOT: length: 0xa1 (161)
TBOOT: version: 0
TBOOT: chipset_id: 0xb001
TBOOT: flags: 0x0
TBOOT: pre_production: 0
TBOOT: debug_signed: 0
TBOOT: vendor: 0x8086
TBOOT: date: 0x20110506
TBOOT: size*4: 0xc000 (49152)
TBOOT: code_control: 0x0
TBOOT: entry point: 0x00000008:000034ce
TBOOT: scratch_size: 0x8f (143)
TBOOT: info_table:
TBOOT: uuid: {0x7fc03aaa, 0x46a7, 0x18db, 0xac2e,
{0x69, 0x8f, 0x8d, 0x41, 0x7f, 0x5a}}
TBOOT: ACM_UUID_V3
TBOOT: chipset_acm_type: 0x1 (SINIT)
TBOOT: version: 4
TBOOT: length: 0x2c (44)
TBOOT: chipset_id_list: 0x4ec
TBOOT: os_sinit_data_ver: 0x5
TBOOT: min_mle_hdr_ver: 0x00020000
TBOOT: capabilities: 0x0000000e
TBOOT: rlp_wake_getsec: 0
TBOOT: rlp_wake_monitor: 1
TBOOT: ecx_pgtbl: 1
TBOOT: acm_ver: 19
TBOOT: chipset list:
TBOOT: count: 1
TBOOT: entry 0:
TBOOT: flags: 0x1
TBOOT: vendor_id: 0x8086
TBOOT: device_id: 0xb001
TBOOT: revision_id: 0x1
TBOOT: extended_id: 0x0
TBOOT: file addresses:
TBOOT: &_start=0x803000
TBOOT: &_end=0x87de60
TBOOT: &_mle_start=0x803000
TBOOT: &_mle_end=0x822000
TBOOT: &_post_launch_entry=0x803020
TBOOT: &_txt_wakeup=0x8031f0
TBOOT: &g_mle_hdr=0x818980
TBOOT: MLE header:
TBOOT: uuid={0x9082ac5a, 0x476f, 0x74a7, 0x5c0f,
{0x55, 0xa2, 0xcb, 0x51, 0xb6, 0x42}}
TBOOT: length=34
TBOOT: version=00020001
TBOOT: entry_point=00000020
TBOOT: first_valid_page=00000000
TBOOT: mle_start_off=0
TBOOT: mle_end_off=1f000
TBOOT: capabilities: 0x00000007
TBOOT: rlp_wake_getsec: 1
TBOOT: rlp_wake_monitor: 1
TBOOT: ecx_pgtbl: 1
TBOOT: MLE start=803000, end=822000, size=1f000
TBOOT: ptab_size=3000, ptab_base=0x800000
TBOOT: unsupported BIOS data version (4)
TBOOT: bios_data (@0xbaf20008, 0x56):
TBOOT: version: 4
TBOOT: bios_sinit_size: 0x0 (0)
TBOOT: lcp_pd_base: 0x0
TBOOT: lcp_pd_size: 0x0 (0)
TBOOT: num_logical_procs: 4
TBOOT: flags: 0x00000000
TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbac00000
TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x13e600000
TBOOT: no LCP module found
TBOOT: os_sinit_data (@0xbaf3017e, 0x64):
TBOOT: version: 5
TBOOT: mle_ptab: 0x800000
TBOOT: mle_size: 0x1f000 (126976)
TBOOT: mle_hdr_base: 0x15980
TBOOT: vtd_pmr_lo_base: 0x0
TBOOT: vtd_pmr_lo_size: 0xbac00000
TBOOT: vtd_pmr_hi_base: 0x100000000
TBOOT: vtd_pmr_hi_size: 0x3e600000
TBOOT: lcp_po_base: 0x0
TBOOT: lcp_po_size: 0x0 (0)
TBOOT: capabilities: 0x00000002
TBOOT: rlp_wake_getsec: 0
TBOOT: rlp_wake_monitor: 1
TBOOT: ecx_pgtbl: 0
TBOOT: efi_rsdt_ptr: 0x0
TBOOT: setting MTRRs for acmod: base=0xbaf00000, size=0xc000, num_pages=12
TBOOT: executing GETSEC[SENTER]...
TBOOT: ******************* TBOOT *******************
TBOOT: 2011-07-06 08:00 -0400 1:17221ef98ed6
TBOOT: *********************************************
TBOOT: command line: serial=115200,8n1,0x4000,19
TBOOT: BSP is cpu 0
TBOOT: original e820 map:
TBOOT: 0000000000000000 - 000000000009d800 (1)
TBOOT: 000000000009d800 - 00000000000a0000 (2)
TBOOT: 00000000000e0000 - 0000000000100000 (2)
TBOOT: 0000000000100000 - 00000000ba59f000 (1)
TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
TBOOT: 00000000bab9f000 - 00000000babff000 (3)
TBOOT: 00000000babff000 - 00000000bac00000 (1)
TBOOT: 00000000bac00000 - 00000000bfa00000 (2)
TBOOT: 00000000f8000000 - 00000000fc000000 (2)
TBOOT: 00000000fec00000 - 00000000fec01000 (2)
TBOOT: 00000000fed08000 - 00000000fed09000 (2)
TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
TBOOT: 00000000fee00000 - 00000000fee01000 (2)
TBOOT: 00000000ffd20000 - 0000000100000000 (2)
TBOOT: 0000000100000000 - 000000013e600000 (1)
TBOOT: TPM is ready
TBOOT: TPM nv_locked: TRUE
TBOOT: TPM timeout values: A: 750, B: 750, C: 750, D: 750
TBOOT: reading Verified Launch Policy from TPM NV...
TBOOT: :512 bytes read
TBOOT: policy:
TBOOT: version: 2
TBOOT: policy_type: TB_POLTYPE_HALT
TBOOT: hash_alg: TB_HALG_SHA1
TBOOT: policy_control: 00000001 (EXTEND_PCR17)
TBOOT: num_entries: 1
TBOOT: policy entry[0]:
TBOOT: mod_num: any
TBOOT: pcr: none
TBOOT: hash_type: TB_HTYPE_ANY
TBOOT: num_hashes: 0
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: TXT.ERRORCODE=c0000001
TBOOT: AC module error : acm_type=1, progress=00, error=0
TBOOT: LT.ESTS=0
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: unsupported BIOS data version (4)
TBOOT: bios_data (@0xbaf20008, 0x56):
TBOOT: version: 4
TBOOT: bios_sinit_size: 0x0 (0)
TBOOT: lcp_pd_base: 0x0
TBOOT: lcp_pd_size: 0x0 (0)
TBOOT: num_logical_procs: 4
TBOOT: flags: 0x00000000
TBOOT: measured launch succeeded
TBOOT: unsupported BIOS data version (4)
TBOOT: bios_data (@0xbaf20008, 0x56):
TBOOT: version: 4
TBOOT: bios_sinit_size: 0x0 (0)
TBOOT: lcp_pd_base: 0x0
TBOOT: lcp_pd_size: 0x0 (0)
TBOOT: num_logical_procs: 4
TBOOT: flags: 0x00000000
TBOOT: os_mle_data (@0xbaf2005e, 0x10120):
TBOOT: version: 2
TBOOT: mbi: 0x275110
TBOOT: os_sinit_data (@0xbaf3017e, 0x64):
TBOOT: version: 5
TBOOT: mle_ptab: 0x800000
TBOOT: mle_size: 0x1f000 (126976)
TBOOT: mle_hdr_base: 0x15980
TBOOT: vtd_pmr_lo_base: 0x0
TBOOT: vtd_pmr_lo_size: 0xbac00000
TBOOT: vtd_pmr_hi_base: 0x100000000
TBOOT: vtd_pmr_hi_size: 0x3e600000
TBOOT: lcp_po_base: 0x0
TBOOT: lcp_po_size: 0x0 (0)
TBOOT: capabilities: 0x00000002
TBOOT: rlp_wake_getsec: 0
TBOOT: rlp_wake_monitor: 1
TBOOT: ecx_pgtbl: 0
TBOOT: efi_rsdt_ptr: 0x0
TBOOT: sinit_mle_data (@0xbaf301e2, 0x22c):
TBOOT: version: 8
TBOOT: bios_acm_id:
80 00 00 00 20 10 10 22 00 00 b0 01 ff ff ff ff ff ff ff ff
TBOOT: edx_senter_flags: 0x00000000
TBOOT: mseg_valid: 0x0
TBOOT: sinit_hash:
10 2c 49 2f 97 29 1d e6 c1 79 59 18 08 0a 1f 54 24 7f e1 2c
TBOOT: mle_hash:
ef c3 94 df 2d 87 e0 00 78 0c ae 06 6b 77 4f dd f7 98 bb cf
TBOOT: stm_hash:
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
TBOOT: lcp_policy_hash:
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
TBOOT: lcp_policy_control: 0x00000000
TBOOT: rlp_wakeup_addr: 0xbaf01a20
TBOOT: num_mdrs: 7
TBOOT: mdrs_off: 0x9c
TBOOT: num_vtd_dmars: 232
TBOOT: vtd_dmars_off: 0x144
TBOOT: sinit_mdrs:
TBOOT: 0000000000000000 - 00000000000a0000 (GOOD)
TBOOT: 0000000000100000 - 0000000000f00000 (GOOD)
TBOOT: 0000000001000000 - 00000000baf00000 (GOOD)
TBOOT: 0000000000000000 - 0000000000000000 (GOOD)
TBOOT: 0000000100000000 - 000000013e600000 (GOOD)
TBOOT: 00000000bb000000 - 00000000bb800000 (SMRAM NON-OVERLAY)
TBOOT: 00000000f8000000 - 00000000fc000000 (PCIE EXTENDED CONFIG)
TBOOT: proc_scrtm_status: 0x00000000
TBOOT: RSDP (v2, LENOVO �$) @ 0x0f00e0
TBOOT: acpi_table_ioapic @ 0xbabe706c, .address = 0xfec00000
TBOOT: acpi_table_mcfg @ 0xbabe6000, .base_address = 0xf8000000
TBOOT: mtrr_def_type: e = 1, fe = 1, type = 0
TBOOT: mtrrs:
TBOOT: base mask type v
TBOOT: 0ffc00 fffc00 05 01
TBOOT: 000000 f80000 06 01
TBOOT: 080000 fc0000 06 01
TBOOT: 0bc000 ffc000 00 01
TBOOT: 0bb000 fff000 00 01
TBOOT: 0bac00 fffc00 00 01
TBOOT: 100000 fc0000 06 01
TBOOT: 13f000 fff000 00 01
TBOOT: 13e800 fff800 00 01
TBOOT: 13e600 fffe00 00 01
TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbac00000
TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x13e600000
TBOOT: MSR for SMM monitor control on BSP is 0x0.
TBOOT: verifying ILP is opt-out or has the same MSEG header with TXT.MSEG.BASE
opt-out
TBOOT: : succeeded.
TBOOT: enabling SMIs on BSP
TBOOT: mle_join.entry_point = 8031f0
TBOOT: mle_join.seg_sel = 8
TBOOT: mle_join.gdt_base = 804000
TBOOT: mle_join.gdt_limit = 3f
TBOOT: joining RLPs to MLE with MONITOR wakeup
TBOOT: rlp_wakeup_addr = 0xbaf01a20
TBOOT: cpu 3 waking up from TXT sleep
TBOOT: waiting for all APs (3) to enter wait-for-sipi...
TBOOT: MSR for SMM monitor control on cpu 3 is 0x0
TBOOT: verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 3
: succeeded.
TBOOT: enabling SMIs on cpu 3
TBOOT: .VMXON done for cpu 3
TBOOT:
TBOOT: launching mini-guest for cpu 3
TBOOT: cpu 2 waking up from TXT sleep
TBOOT: MSR for SMM monitor control on cpu 2 is 0x0
TBOOT: verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 2
: succeeded.
TBOOT: enabling SMIs on cpu 2
TBOOT: VMXON done for cpu 2
TBOOT: launching mini-guest for cpu 2
TBOOT: cpu 1 waking up from TXT sleep
TBOOT: MSR for SMM monitor control on cpu 1 is 0x0
TBOOT: .verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 1
. : succeeded.
TBOOT: .enabling SMIs on cpu 1
TBOOT: .VMXON done for cpu 1
TBOOT: .launching mini-guest for cpu 1
TBOOT: .
TBOOT: all APs in wait-for-sipi
TBOOT: saved IA32_MISC_ENABLE = 0x00850088
TBOOT: set LT.CMD.SECRETS flag
TBOOT: opened TPM locality 1
TBOOT: DMAR table @ 0xbabe1000 saved.
TBOOT: no LCP module found
TBOOT: verifying module 0 of mbi (103000 - 27510b) in e820 table
(range from 0000000000103000 to 000000000027510c is in E820_RAM)
TBOOT: : succeeded.
TBOOT: verifying module 1 of mbi (276000 - 68d9df) in e820 table
(range from 0000000000276000 to 000000000068d9e0 is in E820_RAM)
TBOOT: : succeeded.
TBOOT: verifying module 2 of mbi (87e000 - 33101ff) in e820 table
(range from 000000000087e000 to 0000000003310200 is in E820_RAM)
TBOOT: : succeeded.
TBOOT: protecting TXT heap (baf20000 - baffffff) in e820 table
TBOOT: protecting SINIT (baf00000 - baf1ffff) in e820 table
TBOOT: protecting TXT Private Space (fed20000 - fed2ffff) in e820 table
TBOOT: verifying e820 table against SINIT MDRs: verification succeeded.
TBOOT: verifying tboot and its page table (800000 - 87de5f) in e820 table
(range from 0000000000800000 to 000000000087de60 is in E820_RAM)
TBOOT: : succeeded.
TBOOT: protecting tboot (800000 - 87dfff) in e820 table
TBOOT: adjusted e820 map:
TBOOT: 0000000000000000 - 000000000009d800 (1)
TBOOT: 000000000009d800 - 00000000000a0000 (2)
TBOOT: 00000000000e0000 - 0000000000100000 (2)
TBOOT: 0000000000100000 - 0000000000800000 (1)
TBOOT: 0000000000800000 - 000000000087e000 (5)
TBOOT: 000000000087e000 - 0000000000f00000 (1)
TBOOT: 0000000000f00000 - 0000000001000000 (2)
TBOOT: 0000000001000000 - 00000000ba59f000 (1)
TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
TBOOT: 00000000bab9f000 - 00000000babff000 (3)
TBOOT: 00000000babff000 - 00000000bac00000 (1)
TBOOT: 00000000bac00000 - 00000000baf00000 (2)
TBOOT: 00000000baf00000 - 00000000baf20000 (2)
TBOOT: 00000000baf20000 - 00000000bb000000 (2)
TBOOT: 00000000bb000000 - 00000000bfa00000 (2)
TBOOT: 00000000f8000000 - 00000000fc000000 (2)
TBOOT: 00000000fec00000 - 00000000fec01000 (2)
TBOOT: 00000000fed08000 - 00000000fed09000 (2)
TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
TBOOT: 00000000fed20000 - 00000000fed30000 (2)
TBOOT: 00000000fee00000 - 00000000fee01000 (2)
TBOOT: 00000000ffd20000 - 0000000100000000 (2)
TBOOT: 0000000100000000 - 000000013e600000 (1)
TBOOT: verifying module "com1=115200,8n1,magic console=com1
iommu=required dom0_mem=1024MB cpufreq=xen cpuidle earlyprintk=xenboot
loglvl=all"...
TBOOT: OK : d9 b0 09 b5 e2 ff 12 17 a3 80 c5 f6 fd 05 0c 03 8f 36 2e dd
TBOOT: verifying module "root=/dev/mapper/NxVG-NxDisk6 ro quiet splash
xencons=tty console=hvc0"...
TBOOT: OK : 6f 47 e2 56 a4 f9 cf 82 77 ab c4 55 28 78 c3 0d a1 83 18 11
TBOOT: verifying module ""...
TBOOT: OK : 65 28 5f 70 c7 e8 ba e1 ee 8b d1 1a c3 9c f5 63 a0 5f d6 30
TBOOT: all modules are verified
TBOOT: pre_k_s3_state:
TBOOT: vtd_pmr_lo_base: 0x0
TBOOT: vtd_pmr_lo_size: 0xbac00000
TBOOT: vtd_pmr_hi_base: 0x100000000
TBOOT: vtd_pmr_hi_size: 0x3e600000
TBOOT: pol_hash: 14 c8 20 da 3e eb ae b2 78 d8 7f a7 15 88 8f 53 d7 b4 36 8c
TBOOT: VL measurements:
TBOOT: PCR 17: 20 a4 55 4e 39 52 46 c6 46 d6 f1 92 cf 58 52 88 7f fd d0 07
TBOOT: PCR 18: d9 b0 09 b5 e2 ff 12 17 a3 80 c5 f6 fd 05 0c 03 8f 36 2e dd
TBOOT: PCRs before extending:
TBOOT: PCR 17: cf 48 95 86 8b 40 18 3e 6e 41 9c ad 15 ed 26 6a bd e2 24 e2
TBOOT: PCR 18: 37 97 eb ca 1f cc d6 5e 6d dd 42 8c a0 61 e0 f3 b6 e1 d6 86
TBOOT: PCRs after extending:
TBOOT: PCR 17: 55 a5 67 d8 aa 40 30 d2 f4 2f 96 bf 41 5e d7 77 43 3b a8 e7
TBOOT: PCR 18: 18 66 e8 52 fd dd 0f ba 50 b9 b3 da 4e fa 4e bf 17 2d 7c bb
TBOOT: tboot_shared data:
TBOOT: version: 5
TBOOT: log_addr: 0x00000000
TBOOT: shutdown_entry: 0x008031b0
TBOOT: shutdown_type: 0
TBOOT: tboot_base: 0x00803000
TBOOT: tboot_size: 0x7ae60
TBOOT: num_in_wfs: 3
TBOOT: no LCP module found
TBOOT: kernel is ELF format
TBOOT: i=0
TBOOT: elf = 0x825f2c
TBOOT: elf.e_phnum = 0x1
TBOOT: elf.p_phentsize = 0x20
TBOOT: elf.p_phoff = 0x34
TBOOT: ph.p_filesz = 0x172000
TBOOT: ph.p_memsz = 0x2b8000
TBOOT: ph.p_addr = 0x100000
TBOOT: ph.p_offset = 0x80
TBOOT: transfering control to kernel @0x48000000...
|
|
From: Ben G. <be...@gu...> - 2011-07-06 16:56:41
|
I am attempting to get tboot working with Xen-4.0.2, grub2, and the
2nd_gen_i5_i7_SINIT_19.BIN module working, but have been having
limited results, with things seeming to hang when loading xen
I've traced this back to tboot/common/elf.c in expand_elf_image()
objdump shows that tboot gets loaded at the following:
start address 0x00803000
Program Header:
LOAD off 0x00001000 vaddr 0x00803000 paddr 0x00803000 align 2**12
filesz 0x00022000 memsz 0x0007ae60 flags rwx
...and xen at the following:
start address 0x00100000
Program Header:
LOAD off 0x00000080 vaddr 0x00100000 paddr 0x00100000 align 2**6
filesz 0x00172000 memsz 0x002b8000 flags rwx
In the for loop in expand_elf_image, when it is doing the memcpy, and
memset - it seems to overwrite the heap, and get into an infinite loop
Is anyone else running into issues like this?
Any suggestions, or ideas would be greatly appreciated.
Ben Guthro
My grub entry looks like the following:
menuentry "TXT: test1" {
saved_entry=0
save_env saved_entry
set root=(MyVG-MyBootDisk)
multiboot /tboot.gz logging=vga,memory serial=115200,8n1,0x4000,19
module /xen.gz com1=115200,8n1,magic console=com1
iommu=required dom0_mem=1024MB cpufreq=xen cpuidle earlyprintk=xenboot
loglvl=all
module /vmlinuz-2.6.38 root=/dev/mapper/MyRootDisk ro quiet
splash xencons=tty console=hvc0
module /initrd.img-2.6.38
module /2nd_gen_i5_i7_SINIT_19.BIN
}
tboot debug looks like the following:
diff -r 17221ef98ed6 tboot/common/elf.c
--- a/tboot/common/elf.c
+++ b/tboot/common/elf.c
@@ -163,16 +163,29 @@
/* assumed that already passed is_elf_image() check */
+
/* load elf image into memory */
for ( int i = 0; i < elf->e_phnum; i++ ) {
elf_program_header_t *ph = (elf_program_header_t *)
((void *)elf + elf->e_phoff + i*elf->e_phentsize);
-
+ printk("i=%d\n", i);
+ printk(" elf = 0x%x\n", (int)&elf);
+ printk(" elf.e_phnum = 0x%x\n", elf->e_phnum);
+ printk(" elf.p_phentsize = 0x%x\n", elf->e_phentsize);
+ printk(" elf.p_phoff = 0x%x\n", elf->e_phoff);
+ printk(" ph.p_filesz = 0x%x\n", ph->p_filesz);
+ printk(" ph.p_memsz = 0x%x\n", ph->p_memsz);
+ printk(" ph.p_addr = 0x%x\n", ph->p_paddr);
+ printk(" ph.p_offset = 0x%x\n", ph->p_offset);
if ( ph->p_type == PT_LOAD ) {
memcpy((void *)ph->p_paddr, (void *)elf + ph->p_offset,
ph->p_filesz);
+#if 0
memset((void *)(ph->p_paddr + ph->p_filesz), 0,
ph->p_memsz - ph->p_filesz);
+#else
+ break;
+#endif
}
}
And finally, my tboot debug output:
TBOOT: ******************* TBOOT *******************
TBOOT: 2011-07-06 08:00 -0400 1:17221ef98ed6
TBOOT: *********************************************
TBOOT: command line: serial=115200,8n1,0x4000,19
TBOOT: BSP is cpu 0
TBOOT: original e820 map:
TBOOT: 0000000000000000 - 000000000009d800 (1)
TBOOT: 000000000009d800 - 00000000000a0000 (2)
TBOOT: 00000000000e0000 - 0000000000100000 (2)
TBOOT: 0000000000100000 - 00000000ba59f000 (1)
TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
TBOOT: 00000000bab9f000 - 00000000babff000 (3)
TBOOT: 00000000babff000 - 00000000bac00000 (1)
TBOOT: 00000000bac00000 - 00000000bfa00000 (2)
TBOOT: 00000000f8000000 - 00000000fc000000 (2)
TBOOT: 00000000fec00000 - 00000000fec01000 (2)
TBOOT: 00000000fed08000 - 00000000fed09000 (2)
TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
TBOOT: 00000000fee00000 - 00000000fee01000 (2)
TBOOT: 00000000ffd20000 - 0000000100000000 (2)
TBOOT: 0000000100000000 - 000000013e600000 (1)
TBOOT: TPM is ready
TBOOT: TPM nv_locked: TRUE
TBOOT: TPM timeout values: A: 750, B: 750, C: 750, D: 750
TBOOT: reading Verified Launch Policy from TPM NV...
TBOOT: :512 bytes read
TBOOT: policy:
TBOOT: version: 2
TBOOT: policy_type: TB_POLTYPE_HALT
TBOOT: hash_alg: TB_HALG_SHA1
TBOOT: policy_control: 00000001 (EXTEND_PCR17)
TBOOT: num_entries: 1
TBOOT: policy entry[0]:
TBOOT: mod_num: any
TBOOT: pcr: none
TBOOT: hash_type: TB_HTYPE_ANY
TBOOT: num_hashes: 0
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: TXT.ERRORCODE=0
TBOOT: LT.ESTS=0
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: unsupported BIOS data version (4)
TBOOT: bios_data (@0xbaf20008, 0x56):
TBOOT: version: 4
TBOOT: bios_sinit_size: 0x0 (0)
TBOOT: lcp_pd_base: 0x0
TBOOT: lcp_pd_size: 0x0 (0)
TBOOT: num_logical_procs: 4
TBOOT: flags: 0x00000000
TBOOT: CR0 and EFLAGS OK
TBOOT: supports preserving machine check errors
TBOOT: CPU is ready for SENTER
TBOOT: disabling legacy USB SMIs
TBOOT: checking previous errors on the last boot.
last boot has error.
TBOOT: chipset ids: vendor: 0x8086, device: 0xb001, revision: 0x1
TBOOT: chipset production fused: 1
TBOOT: checking if module is an SINIT for this platform...
TBOOT: ACM info_table version mismatch (4)
TBOOT: 1 ACM chipset id entries:
TBOOT: vendor: 0x8086, device: 0xb001, flags: 0x1, revision:
0x1, extended: 0x0
TBOOT: SINIT matches platform
TBOOT: copied SINIT (size=c000) to 0xbaf00000
TBOOT: AC mod base alignment OK
TBOOT: AC mod size OK
TBOOT: AC module header dump for SINIT:
TBOOT: type: 0x2 (ACM_TYPE_CHIPSET)
TBOOT: length: 0xa1 (161)
TBOOT: version: 0
TBOOT: chipset_id: 0xb001
TBOOT: flags: 0x0
TBOOT: pre_production: 0
TBOOT: debug_signed: 0
TBOOT: vendor: 0x8086
TBOOT: date: 0x20110506
TBOOT: size*4: 0xc000 (49152)
TBOOT: code_control: 0x0
TBOOT: entry point: 0x00000008:000034ce
TBOOT: scratch_size: 0x8f (143)
TBOOT: info_table:
TBOOT: uuid: {0x7fc03aaa, 0x46a7, 0x18db, 0xac2e,
{0x69, 0x8f, 0x8d, 0x41, 0x7f, 0x5a}}
TBOOT: ACM_UUID_V3
TBOOT: chipset_acm_type: 0x1 (SINIT)
TBOOT: version: 4
TBOOT: length: 0x2c (44)
TBOOT: chipset_id_list: 0x4ec
TBOOT: os_sinit_data_ver: 0x5
TBOOT: min_mle_hdr_ver: 0x00020000
TBOOT: capabilities: 0x0000000e
TBOOT: rlp_wake_getsec: 0
TBOOT: rlp_wake_monitor: 1
TBOOT: ecx_pgtbl: 1
TBOOT: acm_ver: 19
TBOOT: chipset list:
TBOOT: count: 1
TBOOT: entry 0:
TBOOT: flags: 0x1
TBOOT: vendor_id: 0x8086
TBOOT: device_id: 0xb001
TBOOT: revision_id: 0x1
TBOOT: extended_id: 0x0
TBOOT: file addresses:
TBOOT: &_start=0x803000
TBOOT: &_end=0x87de60
TBOOT: &_mle_start=0x803000
TBOOT: &_mle_end=0x822000
TBOOT: &_post_launch_entry=0x803020
TBOOT: &_txt_wakeup=0x8031f0
TBOOT: &g_mle_hdr=0x818980
TBOOT: MLE header:
TBOOT: uuid={0x9082ac5a, 0x476f, 0x74a7, 0x5c0f,
{0x55, 0xa2, 0xcb, 0x51, 0xb6, 0x42}}
TBOOT: length=34
TBOOT: version=00020001
TBOOT: entry_point=00000020
TBOOT: first_valid_page=00000000
TBOOT: mle_start_off=0
TBOOT: mle_end_off=1f000
TBOOT: capabilities: 0x00000007
TBOOT: rlp_wake_getsec: 1
TBOOT: rlp_wake_monitor: 1
TBOOT: ecx_pgtbl: 1
TBOOT: MLE start=803000, end=822000, size=1f000
TBOOT: ptab_size=3000, ptab_base=0x800000
TBOOT: unsupported BIOS data version (4)
TBOOT: bios_data (@0xbaf20008, 0x56):
TBOOT: version: 4
TBOOT: bios_sinit_size: 0x0 (0)
TBOOT: lcp_pd_base: 0x0
TBOOT: lcp_pd_size: 0x0 (0)
TBOOT: num_logical_procs: 4
TBOOT: flags: 0x00000000
TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbac00000
TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x13e600000
TBOOT: no LCP module found
TBOOT: os_sinit_data (@0xbaf3017e, 0x64):
TBOOT: version: 5
TBOOT: mle_ptab: 0x800000
TBOOT: mle_size: 0x1f000 (126976)
TBOOT: mle_hdr_base: 0x15980
TBOOT: vtd_pmr_lo_base: 0x0
TBOOT: vtd_pmr_lo_size: 0xbac00000
TBOOT: vtd_pmr_hi_base: 0x100000000
TBOOT: vtd_pmr_hi_size: 0x3e600000
TBOOT: lcp_po_base: 0x0
TBOOT: lcp_po_size: 0x0 (0)
TBOOT: capabilities: 0x00000002
TBOOT: rlp_wake_getsec: 0
TBOOT: rlp_wake_monitor: 1
TBOOT: ecx_pgtbl: 0
TBOOT: efi_rsdt_ptr: 0x0
TBOOT: setting MTRRs for acmod: base=0xbaf00000, size=0xc000, num_pages=12
TBOOT: executing GETSEC[SENTER]...
TBOOT: ******************* TBOOT *******************
TBOOT: 2011-07-06 08:00 -0400 1:17221ef98ed6
TBOOT: *********************************************
TBOOT: command line: serial=115200,8n1,0x4000,19
TBOOT: BSP is cpu 0
TBOOT: original e820 map:
TBOOT: 0000000000000000 - 000000000009d800 (1)
TBOOT: 000000000009d800 - 00000000000a0000 (2)
TBOOT: 00000000000e0000 - 0000000000100000 (2)
TBOOT: 0000000000100000 - 00000000ba59f000 (1)
TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
TBOOT: 00000000bab9f000 - 00000000babff000 (3)
TBOOT: 00000000babff000 - 00000000bac00000 (1)
TBOOT: 00000000bac00000 - 00000000bfa00000 (2)
TBOOT: 00000000f8000000 - 00000000fc000000 (2)
TBOOT: 00000000fec00000 - 00000000fec01000 (2)
TBOOT: 00000000fed08000 - 00000000fed09000 (2)
TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
TBOOT: 00000000fee00000 - 00000000fee01000 (2)
TBOOT: 00000000ffd20000 - 0000000100000000 (2)
TBOOT: 0000000100000000 - 000000013e600000 (1)
TBOOT: TPM is ready
TBOOT: TPM nv_locked: TRUE
TBOOT: TPM timeout values: A: 750, B: 750, C: 750, D: 750
TBOOT: reading Verified Launch Policy from TPM NV...
TBOOT: :512 bytes read
TBOOT: policy:
TBOOT: version: 2
TBOOT: policy_type: TB_POLTYPE_HALT
TBOOT: hash_alg: TB_HALG_SHA1
TBOOT: policy_control: 00000001 (EXTEND_PCR17)
TBOOT: num_entries: 1
TBOOT: policy entry[0]:
TBOOT: mod_num: any
TBOOT: pcr: none
TBOOT: hash_type: TB_HTYPE_ANY
TBOOT: num_hashes: 0
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: TXT.ERRORCODE=c0000001
TBOOT: AC module error : acm_type=1, progress=00, error=0
TBOOT: LT.ESTS=0
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: unsupported BIOS data version (4)
TBOOT: bios_data (@0xbaf20008, 0x56):
TBOOT: version: 4
TBOOT: bios_sinit_size: 0x0 (0)
TBOOT: lcp_pd_base: 0x0
TBOOT: lcp_pd_size: 0x0 (0)
TBOOT: num_logical_procs: 4
TBOOT: flags: 0x00000000
TBOOT: measured launch succeeded
TBOOT: unsupported BIOS data version (4)
TBOOT: bios_data (@0xbaf20008, 0x56):
TBOOT: version: 4
TBOOT: bios_sinit_size: 0x0 (0)
TBOOT: lcp_pd_base: 0x0
TBOOT: lcp_pd_size: 0x0 (0)
TBOOT: num_logical_procs: 4
TBOOT: flags: 0x00000000
TBOOT: os_mle_data (@0xbaf2005e, 0x10120):
TBOOT: version: 2
TBOOT: mbi: 0x275110
TBOOT: os_sinit_data (@0xbaf3017e, 0x64):
TBOOT: version: 5
TBOOT: mle_ptab: 0x800000
TBOOT: mle_size: 0x1f000 (126976)
TBOOT: mle_hdr_base: 0x15980
TBOOT: vtd_pmr_lo_base: 0x0
TBOOT: vtd_pmr_lo_size: 0xbac00000
TBOOT: vtd_pmr_hi_base: 0x100000000
TBOOT: vtd_pmr_hi_size: 0x3e600000
TBOOT: lcp_po_base: 0x0
TBOOT: lcp_po_size: 0x0 (0)
TBOOT: capabilities: 0x00000002
TBOOT: rlp_wake_getsec: 0
TBOOT: rlp_wake_monitor: 1
TBOOT: ecx_pgtbl: 0
TBOOT: efi_rsdt_ptr: 0x0
TBOOT: sinit_mle_data (@0xbaf301e2, 0x22c):
TBOOT: version: 8
TBOOT: bios_acm_id:
80 00 00 00 20 10 10 22 00 00 b0 01 ff ff ff ff ff ff ff ff
TBOOT: edx_senter_flags: 0x00000000
TBOOT: mseg_valid: 0x0
TBOOT: sinit_hash:
10 2c 49 2f 97 29 1d e6 c1 79 59 18 08 0a 1f 54 24 7f e1 2c
TBOOT: mle_hash:
ef c3 94 df 2d 87 e0 00 78 0c ae 06 6b 77 4f dd f7 98 bb cf
TBOOT: stm_hash:
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
TBOOT: lcp_policy_hash:
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
TBOOT: lcp_policy_control: 0x00000000
TBOOT: rlp_wakeup_addr: 0xbaf01a20
TBOOT: num_mdrs: 7
TBOOT: mdrs_off: 0x9c
TBOOT: num_vtd_dmars: 232
TBOOT: vtd_dmars_off: 0x144
TBOOT: sinit_mdrs:
TBOOT: 0000000000000000 - 00000000000a0000 (GOOD)
TBOOT: 0000000000100000 - 0000000000f00000 (GOOD)
TBOOT: 0000000001000000 - 00000000baf00000 (GOOD)
TBOOT: 0000000000000000 - 0000000000000000 (GOOD)
TBOOT: 0000000100000000 - 000000013e600000 (GOOD)
TBOOT: 00000000bb000000 - 00000000bb800000 (SMRAM NON-OVERLAY)
TBOOT: 00000000f8000000 - 00000000fc000000 (PCIE EXTENDED CONFIG)
TBOOT: proc_scrtm_status: 0x00000000
TBOOT: RSDP (v2, LENOVO�$) @ 0x0f00e0
TBOOT: acpi_table_ioapic @ 0xbabe706c, .address = 0xfec00000
TBOOT: acpi_table_mcfg @ 0xbabe6000, .base_address = 0xf8000000
TBOOT: mtrr_def_type: e = 1, fe = 1, type = 0
TBOOT: mtrrs:
TBOOT: base mask type v
TBOOT: 0ffc00 fffc00 05 01
TBOOT: 000000 f80000 06 01
TBOOT: 080000 fc0000 06 01
TBOOT: 0bc000 ffc000 00 01
TBOOT: 0bb000 fff000 00 01
TBOOT: 0bac00 fffc00 00 01
TBOOT: 100000 fc0000 06 01
TBOOT: 13f000 fff000 00 01
TBOOT: 13e800 fff800 00 01
TBOOT: 13e600 fffe00 00 01
TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbac00000
TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x13e600000
TBOOT: MSR for SMM monitor control on BSP is 0x0.
TBOOT: verifying ILP is opt-out or has the same MSEG header with TXT.MSEG.BASE
opt-out
TBOOT: : succeeded.
TBOOT: enabling SMIs on BSP
TBOOT: mle_join.entry_point = 8031f0
TBOOT: mle_join.seg_sel = 8
TBOOT: mle_join.gdt_base = 804000
TBOOT: mle_join.gdt_limit = 3f
TBOOT: joining RLPs to MLE with MONITOR wakeup
TBOOT: rlp_wakeup_addr = 0xbaf01a20
TBOOT: cpu 2 waking up from TXT sleep
TBOOT: waiting for all APs (3) to enter wait-for-sipi...
TBOOT: MSR for SMM monitor control on cpu 2 is 0x0
TBOOT: verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 2
: succeeded.
TBOOT: enabling SMIs on cpu 2
TBOOT: .VMXON done for cpu 2
TBOOT:
TBOOT: cpu 3 waking up from TXT sleep
TBOOT: launching mini-guest for cpu 2
TBOOT: MSR for SMM monitor control on cpu 3 is 0x0
TBOOT: verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 3
: succeeded.
TBOOT: enabling SMIs on cpu 3
TBOOT: VMXON done for cpu 3
TBOOT: launching mini-guest for cpu 3
TBOOT: cpu 1 waking up from TXT sleep
TBOOT: MSR for SMM monitor control on cpu 1 is 0x0
TBOOT: .verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 1
. : succeeded.
TBOOT: .enabling SMIs on cpu 1
TBOOT: .VMXON done for cpu 1
TBOOT: .launching mini-guest for cpu 1
TBOOT: .
TBOOT: all APs in wait-for-sipi
TBOOT: saved IA32_MISC_ENABLE = 0x00850088
TBOOT: set LT.CMD.SECRETS flag
TBOOT: opened TPM locality 1
TBOOT: DMAR table @ 0xbabe1000 saved.
TBOOT: no LCP module found
TBOOT: verifying module 0 of mbi (103000 - 27510b) in e820 table
(range from 0000000000103000 to 000000000027510c is in E820_RAM)
TBOOT: : succeeded.
TBOOT: verifying module 1 of mbi (276000 - 68d9df) in e820 table
(range from 0000000000276000 to 000000000068d9e0 is in E820_RAM)
TBOOT: : succeeded.
TBOOT: verifying module 2 of mbi (87e000 - 33101ff) in e820 table
(range from 000000000087e000 to 0000000003310200 is in E820_RAM)
TBOOT: : succeeded.
TBOOT: protecting TXT heap (baf20000 - baffffff) in e820 table
TBOOT: protecting SINIT (baf00000 - baf1ffff) in e820 table
TBOOT: protecting TXT Private Space (fed20000 - fed2ffff) in e820 table
TBOOT: verifying e820 table against SINIT MDRs: verification succeeded.
TBOOT: verifying tboot and its page table (800000 - 87de5f) in e820 table
(range from 0000000000800000 to 000000000087de60 is in E820_RAM)
TBOOT: : succeeded.
TBOOT: protecting tboot (800000 - 87dfff) in e820 table
TBOOT: adjusted e820 map:
TBOOT: 0000000000000000 - 000000000009d800 (1)
TBOOT: 000000000009d800 - 00000000000a0000 (2)
TBOOT: 00000000000e0000 - 0000000000100000 (2)
TBOOT: 0000000000100000 - 0000000000800000 (1)
TBOOT: 0000000000800000 - 000000000087e000 (5)
TBOOT: 000000000087e000 - 0000000000f00000 (1)
TBOOT: 0000000000f00000 - 0000000001000000 (2)
TBOOT: 0000000001000000 - 00000000ba59f000 (1)
TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
TBOOT: 00000000bab9f000 - 00000000babff000 (3)
TBOOT: 00000000babff000 - 00000000bac00000 (1)
TBOOT: 00000000bac00000 - 00000000baf00000 (2)
TBOOT: 00000000baf00000 - 00000000baf20000 (2)
TBOOT: 00000000baf20000 - 00000000bb000000 (2)
TBOOT: 00000000bb000000 - 00000000bfa00000 (2)
TBOOT: 00000000f8000000 - 00000000fc000000 (2)
TBOOT: 00000000fec00000 - 00000000fec01000 (2)
TBOOT: 00000000fed08000 - 00000000fed09000 (2)
TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
TBOOT: 00000000fed20000 - 00000000fed30000 (2)
TBOOT: 00000000fee00000 - 00000000fee01000 (2)
TBOOT: 00000000ffd20000 - 0000000100000000 (2)
TBOOT: 0000000100000000 - 000000013e600000 (1)
TBOOT: verifying module "com1=115200,8n1,magic console=com1
iommu=required dom0_mem=1024MB cpufreq=xen cpuidle earlyprintk=xenboot
loglvl=all"...
TBOOT: OK : d9 b0 09 b5 e2 ff 12 17 a3 80 c5 f6 fd 05 0c 03 8f 36 2e dd
TBOOT: verifying module "root=/dev/mapper/NxVG-NxDisk6 ro quiet splash
xencons=tty console=hvc0"...
TBOOT: OK : 6f 47 e2 56 a4 f9 cf 82 77 ab c4 55 28 78 c3 0d a1 83 18 11
TBOOT: verifying module ""...
TBOOT: OK : 65 28 5f 70 c7 e8 ba e1 ee 8b d1 1a c3 9c f5 63 a0 5f d6 30
TBOOT: all modules are verified
TBOOT: pre_k_s3_state:
TBOOT: vtd_pmr_lo_base: 0x0
TBOOT: vtd_pmr_lo_size: 0xbac00000
TBOOT: vtd_pmr_hi_base: 0x100000000
TBOOT: vtd_pmr_hi_size: 0x3e600000
TBOOT: pol_hash: 14 c8 20 da 3e eb ae b2 78 d8 7f a7 15 88 8f 53 d7 b4 36 8c
TBOOT: VL measurements:
TBOOT: PCR 17: 20 a4 55 4e 39 52 46 c6 46 d6 f1 92 cf 58 52 88 7f fd d0 07
TBOOT: PCR 18: d9 b0 09 b5 e2 ff 12 17 a3 80 c5 f6 fd 05 0c 03 8f 36 2e dd
TBOOT: PCRs before extending:
TBOOT: PCR 17: cf 48 95 86 8b 40 18 3e 6e 41 9c ad 15 ed 26 6a bd e2 24 e2
TBOOT: PCR 18: 37 97 eb ca 1f cc d6 5e 6d dd 42 8c a0 61 e0 f3 b6 e1 d6 86
TBOOT: PCRs after extending:
TBOOT: PCR 17: 55 a5 67 d8 aa 40 30 d2 f4 2f 96 bf 41 5e d7 77 43 3b a8 e7
TBOOT: PCR 18: 18 66 e8 52 fd dd 0f ba 50 b9 b3 da 4e fa 4e bf 17 2d 7c bb
TBOOT: tboot_shared data:
TBOOT: version: 5
TBOOT: log_addr: 0x00000000
TBOOT: shutdown_entry: 0x008031b0
TBOOT: shutdown_type: 0
TBOOT: tboot_base: 0x00803000
TBOOT: tboot_size: 0x7ae60
TBOOT: num_in_wfs: 3
TBOOT: no LCP module found
TBOOT: kernel is ELF format
TBOOT: i=0
TBOOT: elf = 0x825f2c
TBOOT: elf.e_phnum = 0x1
TBOOT: elf.p_phentsize = 0x20
TBOOT: elf.p_phoff = 0x34
TBOOT: ph.p_filesz = 0x172000
TBOOT: ph.p_memsz = 0x2b8000
TBOOT: ph.p_addr = 0x100000
TBOOT: ph.p_offset = 0x80
TBOOT: transfering control to kernel @0x48000000...
TBOOT: ******************* TBOOT *******************
TBOOT: 2011-07-06 08:00 -0400 1:17221ef98ed6
TBOOT: *********************************************
TBOOT: command line: serial=115200,8n1,0x4000,19
TBOOT: BSP is cpu 0
TBOOT: original e820 map:
TBOOT: 0000000000000000 - 000000000009d800 (1)
TBOOT: 000000000009d800 - 00000000000a0000 (2)
TBOOT: 00000000000e0000 - 0000000000100000 (2)
TBOOT: 0000000000100000 - 00000000ba59f000 (1)
TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
TBOOT: 00000000bab9f000 - 00000000babff000 (3)
TBOOT: 00000000babff000 - 00000000bac00000 (1)
TBOOT: 00000000bac00000 - 00000000bfa00000 (2)
TBOOT: 00000000f8000000 - 00000000fc000000 (2)
TBOOT: 00000000fec00000 - 00000000fec01000 (2)
TBOOT: 00000000fed08000 - 00000000fed09000 (2)
TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
TBOOT: 00000000fee00000 - 00000000fee01000 (2)
TBOOT: 00000000ffd20000 - 0000000100000000 (2)
TBOOT: 0000000100000000 - 000000013e600000 (1)
TBOOT: TPM is ready
TBOOT: TPM nv_locked: TRUE
TBOOT: TPM timeout values: A: 750, B: 750, C: 750, D: 750
TBOOT: reading Verified Launch Policy from TPM NV...
TBOOT: :512 bytes read
TBOOT: policy:
TBOOT: version: 2
TBOOT: policy_type: TB_POLTYPE_HALT
TBOOT: hash_alg: TB_HALG_SHA1
TBOOT: policy_control: 00000001 (EXTEND_PCR17)
TBOOT: num_entries: 1
TBOOT: policy entry[0]:
TBOOT: mod_num: any
TBOOT: pcr: none
TBOOT: hash_type: TB_HTYPE_ANY
TBOOT: num_hashes: 0
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: TXT.ERRORCODE=0
TBOOT: LT.ESTS=0
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: unsupported BIOS data version (4)
TBOOT: bios_data (@0xbaf20008, 0x56):
TBOOT: version: 4
TBOOT: bios_sinit_size: 0x0 (0)
TBOOT: lcp_pd_base: 0x0
TBOOT: lcp_pd_size: 0x0 (0)
TBOOT: num_logical_procs: 4
TBOOT: flags: 0x00000000
TBOOT: CR0 and EFLAGS OK
TBOOT: supports preserving machine check errors
TBOOT: CPU is ready for SENTER
TBOOT: disabling legacy USB SMIs
TBOOT: checking previous errors on the last boot.
last boot has error.
TBOOT: chipset ids: vendor: 0x8086, device: 0xb001, revision: 0x1
TBOOT: chipset production fused: 1
TBOOT: checking if module is an SINIT for this platform...
TBOOT: ACM info_table version mismatch (4)
TBOOT: 1 ACM chipset id entries:
TBOOT: vendor: 0x8086, device: 0xb001, flags: 0x1, revision:
0x1, extended: 0x0
TBOOT: SINIT matches platform
TBOOT: copied SINIT (size=c000) to 0xbaf00000
TBOOT: AC mod base alignment OK
TBOOT: AC mod size OK
TBOOT: AC module header dump for SINIT:
TBOOT: type: 0x2 (ACM_TYPE_CHIPSET)
TBOOT: length: 0xa1 (161)
TBOOT: version: 0
TBOOT: chipset_id: 0xb001
TBOOT: flags: 0x0
TBOOT: pre_production: 0
TBOOT: debug_signed: 0
TBOOT: vendor: 0x8086
TBOOT: date: 0x20110506
TBOOT: size*4: 0xc000 (49152)
TBOOT: code_control: 0x0
TBOOT: entry point: 0x00000008:000034ce
TBOOT: scratch_size: 0x8f (143)
TBOOT: info_table:
TBOOT: uuid: {0x7fc03aaa, 0x46a7, 0x18db, 0xac2e,
{0x69, 0x8f, 0x8d, 0x41, 0x7f, 0x5a}}
TBOOT: ACM_UUID_V3
TBOOT: chipset_acm_type: 0x1 (SINIT)
TBOOT: version: 4
TBOOT: length: 0x2c (44)
TBOOT: chipset_id_list: 0x4ec
TBOOT: os_sinit_data_ver: 0x5
TBOOT: min_mle_hdr_ver: 0x00020000
TBOOT: capabilities: 0x0000000e
TBOOT: rlp_wake_getsec: 0
TBOOT: rlp_wake_monitor: 1
TBOOT: ecx_pgtbl: 1
TBOOT: acm_ver: 19
TBOOT: chipset list:
TBOOT: count: 1
TBOOT: entry 0:
TBOOT: flags: 0x1
TBOOT: vendor_id: 0x8086
TBOOT: device_id: 0xb001
TBOOT: revision_id: 0x1
TBOOT: extended_id: 0x0
TBOOT: file addresses:
TBOOT: &_start=0x803000
TBOOT: &_end=0x87de60
TBOOT: &_mle_start=0x803000
TBOOT: &_mle_end=0x822000
TBOOT: &_post_launch_entry=0x803020
TBOOT: &_txt_wakeup=0x8031f0
TBOOT: &g_mle_hdr=0x818980
TBOOT: MLE header:
TBOOT: uuid={0x9082ac5a, 0x476f, 0x74a7, 0x5c0f,
{0x55, 0xa2, 0xcb, 0x51, 0xb6, 0x42}}
TBOOT: length=34
TBOOT: version=00020001
TBOOT: entry_point=00000020
TBOOT: first_valid_page=00000000
TBOOT: mle_start_off=0
TBOOT: mle_end_off=1f000
TBOOT: capabilities: 0x00000007
TBOOT: rlp_wake_getsec: 1
TBOOT: rlp_wake_monitor: 1
TBOOT: ecx_pgtbl: 1
TBOOT: MLE start=803000, end=822000, size=1f000
TBOOT: ptab_size=3000, ptab_base=0x800000
TBOOT: unsupported BIOS data version (4)
TBOOT: bios_data (@0xbaf20008, 0x56):
TBOOT: version: 4
TBOOT: bios_sinit_size: 0x0 (0)
TBOOT: lcp_pd_base: 0x0
TBOOT: lcp_pd_size: 0x0 (0)
TBOOT: num_logical_procs: 4
TBOOT: flags: 0x00000000
TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbac00000
TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x13e600000
TBOOT: no LCP module found
TBOOT: os_sinit_data (@0xbaf3017e, 0x64):
TBOOT: version: 5
TBOOT: mle_ptab: 0x800000
TBOOT: mle_size: 0x1f000 (126976)
TBOOT: mle_hdr_base: 0x15980
TBOOT: vtd_pmr_lo_base: 0x0
TBOOT: vtd_pmr_lo_size: 0xbac00000
TBOOT: vtd_pmr_hi_base: 0x100000000
TBOOT: vtd_pmr_hi_size: 0x3e600000
TBOOT: lcp_po_base: 0x0
TBOOT: lcp_po_size: 0x0 (0)
TBOOT: capabilities: 0x00000002
TBOOT: rlp_wake_getsec: 0
TBOOT: rlp_wake_monitor: 1
TBOOT: ecx_pgtbl: 0
TBOOT: efi_rsdt_ptr: 0x0
TBOOT: setting MTRRs for acmod: base=0xbaf00000, size=0xc000, num_pages=12
TBOOT: executing GETSEC[SENTER]...
TBOOT: ******************* TBOOT *******************
TBOOT: 2011-07-06 08:00 -0400 1:17221ef98ed6
TBOOT: *********************************************
TBOOT: command line: serial=115200,8n1,0x4000,19
TBOOT: BSP is cpu 0
TBOOT: original e820 map:
TBOOT: 0000000000000000 - 000000000009d800 (1)
TBOOT: 000000000009d800 - 00000000000a0000 (2)
TBOOT: 00000000000e0000 - 0000000000100000 (2)
TBOOT: 0000000000100000 - 00000000ba59f000 (1)
TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
TBOOT: 00000000bab9f000 - 00000000babff000 (3)
TBOOT: 00000000babff000 - 00000000bac00000 (1)
TBOOT: 00000000bac00000 - 00000000bfa00000 (2)
TBOOT: 00000000f8000000 - 00000000fc000000 (2)
TBOOT: 00000000fec00000 - 00000000fec01000 (2)
TBOOT: 00000000fed08000 - 00000000fed09000 (2)
TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
TBOOT: 00000000fee00000 - 00000000fee01000 (2)
TBOOT: 00000000ffd20000 - 0000000100000000 (2)
TBOOT: 0000000100000000 - 000000013e600000 (1)
TBOOT: TPM is ready
TBOOT: TPM nv_locked: TRUE
TBOOT: TPM timeout values: A: 750, B: 750, C: 750, D: 750
TBOOT: reading Verified Launch Policy from TPM NV...
TBOOT: :512 bytes read
TBOOT: policy:
TBOOT: version: 2
TBOOT: policy_type: TB_POLTYPE_HALT
TBOOT: hash_alg: TB_HALG_SHA1
TBOOT: policy_control: 00000001 (EXTEND_PCR17)
TBOOT: num_entries: 1
TBOOT: policy entry[0]:
TBOOT: mod_num: any
TBOOT: pcr: none
TBOOT: hash_type: TB_HTYPE_ANY
TBOOT: num_hashes: 0
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: TXT.ERRORCODE=c0000001
TBOOT: AC module error : acm_type=1, progress=00, error=0
TBOOT: LT.ESTS=0
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: unsupported BIOS data version (4)
TBOOT: bios_data (@0xbaf20008, 0x56):
TBOOT: version: 4
TBOOT: bios_sinit_size: 0x0 (0)
TBOOT: lcp_pd_base: 0x0
TBOOT: lcp_pd_size: 0x0 (0)
TBOOT: num_logical_procs: 4
TBOOT: flags: 0x00000000
TBOOT: measured launch succeeded
TBOOT: unsupported BIOS data version (4)
TBOOT: bios_data (@0xbaf20008, 0x56):
TBOOT: version: 4
TBOOT: bios_sinit_size: 0x0 (0)
TBOOT: lcp_pd_base: 0x0
TBOOT: lcp_pd_size: 0x0 (0)
TBOOT: num_logical_procs: 4
TBOOT: flags: 0x00000000
TBOOT: os_mle_data (@0xbaf2005e, 0x10120):
TBOOT: version: 2
TBOOT: mbi: 0x275110
TBOOT: os_sinit_data (@0xbaf3017e, 0x64):
TBOOT: version: 5
TBOOT: mle_ptab: 0x800000
TBOOT: mle_size: 0x1f000 (126976)
TBOOT: mle_hdr_base: 0x15980
TBOOT: vtd_pmr_lo_base: 0x0
TBOOT: vtd_pmr_lo_size: 0xbac00000
TBOOT: vtd_pmr_hi_base: 0x100000000
TBOOT: vtd_pmr_hi_size: 0x3e600000
TBOOT: lcp_po_base: 0x0
TBOOT: lcp_po_size: 0x0 (0)
TBOOT: capabilities: 0x00000002
TBOOT: rlp_wake_getsec: 0
TBOOT: rlp_wake_monitor: 1
TBOOT: ecx_pgtbl: 0
TBOOT: efi_rsdt_ptr: 0x0
TBOOT: sinit_mle_data (@0xbaf301e2, 0x22c):
TBOOT: version: 8
TBOOT: bios_acm_id:
80 00 00 00 20 10 10 22 00 00 b0 01 ff ff ff ff ff ff ff ff
TBOOT: edx_senter_flags: 0x00000000
TBOOT: mseg_valid: 0x0
TBOOT: sinit_hash:
10 2c 49 2f 97 29 1d e6 c1 79 59 18 08 0a 1f 54 24 7f e1 2c
TBOOT: mle_hash:
ef c3 94 df 2d 87 e0 00 78 0c ae 06 6b 77 4f dd f7 98 bb cf
TBOOT: stm_hash:
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
TBOOT: lcp_policy_hash:
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
TBOOT: lcp_policy_control: 0x00000000
TBOOT: rlp_wakeup_addr: 0xbaf01a20
TBOOT: num_mdrs: 7
TBOOT: mdrs_off: 0x9c
TBOOT: num_vtd_dmars: 232
TBOOT: vtd_dmars_off: 0x144
TBOOT: sinit_mdrs:
TBOOT: 0000000000000000 - 00000000000a0000 (GOOD)
TBOOT: 0000000000100000 - 0000000000f00000 (GOOD)
TBOOT: 0000000001000000 - 00000000baf00000 (GOOD)
TBOOT: 0000000000000000 - 0000000000000000 (GOOD)
TBOOT: 0000000100000000 - 000000013e600000 (GOOD)
TBOOT: 00000000bb000000 - 00000000bb800000 (SMRAM NON-OVERLAY)
TBOOT: 00000000f8000000 - 00000000fc000000 (PCIE EXTENDED CONFIG)
TBOOT: proc_scrtm_status: 0x00000000
TBOOT: RSDP (v2, LENOVO�$) @ 0x0f00e0
TBOOT: acpi_table_ioapic @ 0xbabe706c, .address = 0xfec00000
TBOOT: acpi_table_mcfg @ 0xbabe6000, .base_address = 0xf8000000
TBOOT: mtrr_def_type: e = 1, fe = 1, type = 0
TBOOT: mtrrs:
TBOOT: base mask type v
TBOOT: 0ffc00 fffc00 05 01
TBOOT: 000000 f80000 06 01
TBOOT: 080000 fc0000 06 01
TBOOT: 0bc000 ffc000 00 01
TBOOT: 0bb000 fff000 00 01
TBOOT: 0bac00 fffc00 00 01
TBOOT: 100000 fc0000 06 01
TBOOT: 13f000 fff000 00 01
TBOOT: 13e800 fff800 00 01
TBOOT: 13e600 fffe00 00 01
TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbac00000
TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x13e600000
TBOOT: MSR for SMM monitor control on BSP is 0x0.
TBOOT: verifying ILP is opt-out or has the same MSEG header with TXT.MSEG.BASE
opt-out
TBOOT: : succeeded.
TBOOT: enabling SMIs on BSP
TBOOT: mle_join.entry_point = 8031f0
TBOOT: mle_join.seg_sel = 8
TBOOT: mle_join.gdt_base = 804000
TBOOT: mle_join.gdt_limit = 3f
TBOOT: joining RLPs to MLE with MONITOR wakeup
TBOOT: rlp_wakeup_addr = 0xbaf01a20
TBOOT: cpu 3 waking up from TXT sleep
TBOOT: waiting for all APs (3) to enter wait-for-sipi...
TBOOT: MSR for SMM monitor control on cpu 3 is 0x0
TBOOT: verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 3
: succeeded.
TBOOT: enabling SMIs on cpu 3
TBOOT: .VMXON done for cpu 3
TBOOT:
TBOOT: launching mini-guest for cpu 3
TBOOT: cpu 2 waking up from TXT sleep
TBOOT: MSR for SMM monitor control on cpu 2 is 0x0
TBOOT: verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 2
: succeeded.
TBOOT: enabling SMIs on cpu 2
TBOOT: VMXON done for cpu 2
TBOOT: launching mini-guest for cpu 2
TBOOT: cpu 1 waking up from TXT sleep
TBOOT: MSR for SMM monitor control on cpu 1 is 0x0
TBOOT: .verifying ILP's MSR_IA32_SMM_MONITOR_CTL with cpu 1
. : succeeded.
TBOOT: .enabling SMIs on cpu 1
TBOOT: .VMXON done for cpu 1
TBOOT: .launching mini-guest for cpu 1
TBOOT: .
TBOOT: all APs in wait-for-sipi
TBOOT: saved IA32_MISC_ENABLE = 0x00850088
TBOOT: set LT.CMD.SECRETS flag
TBOOT: opened TPM locality 1
TBOOT: DMAR table @ 0xbabe1000 saved.
TBOOT: no LCP module found
TBOOT: verifying module 0 of mbi (103000 - 27510b) in e820 table
(range from 0000000000103000 to 000000000027510c is in E820_RAM)
TBOOT: : succeeded.
TBOOT: verifying module 1 of mbi (276000 - 68d9df) in e820 table
(range from 0000000000276000 to 000000000068d9e0 is in E820_RAM)
TBOOT: : succeeded.
TBOOT: verifying module 2 of mbi (87e000 - 33101ff) in e820 table
(range from 000000000087e000 to 0000000003310200 is in E820_RAM)
TBOOT: : succeeded.
TBOOT: protecting TXT heap (baf20000 - baffffff) in e820 table
TBOOT: protecting SINIT (baf00000 - baf1ffff) in e820 table
TBOOT: protecting TXT Private Space (fed20000 - fed2ffff) in e820 table
TBOOT: verifying e820 table against SINIT MDRs: verification succeeded.
TBOOT: verifying tboot and its page table (800000 - 87de5f) in e820 table
(range from 0000000000800000 to 000000000087de60 is in E820_RAM)
TBOOT: : succeeded.
TBOOT: protecting tboot (800000 - 87dfff) in e820 table
TBOOT: adjusted e820 map:
TBOOT: 0000000000000000 - 000000000009d800 (1)
TBOOT: 000000000009d800 - 00000000000a0000 (2)
TBOOT: 00000000000e0000 - 0000000000100000 (2)
TBOOT: 0000000000100000 - 0000000000800000 (1)
TBOOT: 0000000000800000 - 000000000087e000 (5)
TBOOT: 000000000087e000 - 0000000000f00000 (1)
TBOOT: 0000000000f00000 - 0000000001000000 (2)
TBOOT: 0000000001000000 - 00000000ba59f000 (1)
TBOOT: 00000000ba59f000 - 00000000baa9f000 (2)
TBOOT: 00000000baa9f000 - 00000000bab9f000 (4)
TBOOT: 00000000bab9f000 - 00000000babff000 (3)
TBOOT: 00000000babff000 - 00000000bac00000 (1)
TBOOT: 00000000bac00000 - 00000000baf00000 (2)
TBOOT: 00000000baf00000 - 00000000baf20000 (2)
TBOOT: 00000000baf20000 - 00000000bb000000 (2)
TBOOT: 00000000bb000000 - 00000000bfa00000 (2)
TBOOT: 00000000f8000000 - 00000000fc000000 (2)
TBOOT: 00000000fec00000 - 00000000fec01000 (2)
TBOOT: 00000000fed08000 - 00000000fed09000 (2)
TBOOT: 00000000fed10000 - 00000000fed1a000 (2)
TBOOT: 00000000fed1c000 - 00000000fed20000 (2)
TBOOT: 00000000fed20000 - 00000000fed30000 (2)
TBOOT: 00000000fee00000 - 00000000fee01000 (2)
TBOOT: 00000000ffd20000 - 0000000100000000 (2)
TBOOT: 0000000100000000 - 000000013e600000 (1)
TBOOT: verifying module "com1=115200,8n1,magic console=com1
iommu=required dom0_mem=1024MB cpufreq=xen cpuidle earlyprintk=xenboot
loglvl=all"...
TBOOT: OK : d9 b0 09 b5 e2 ff 12 17 a3 80 c5 f6 fd 05 0c 03 8f 36 2e dd
TBOOT: verifying module "root=/dev/mapper/NxVG-NxDisk6 ro quiet splash
xencons=tty console=hvc0"...
TBOOT: OK : 6f 47 e2 56 a4 f9 cf 82 77 ab c4 55 28 78 c3 0d a1 83 18 11
TBOOT: verifying module ""...
TBOOT: OK : 65 28 5f 70 c7 e8 ba e1 ee 8b d1 1a c3 9c f5 63 a0 5f d6 30
TBOOT: all modules are verified
TBOOT: pre_k_s3_state:
TBOOT: vtd_pmr_lo_base: 0x0
TBOOT: vtd_pmr_lo_size: 0xbac00000
TBOOT: vtd_pmr_hi_base: 0x100000000
TBOOT: vtd_pmr_hi_size: 0x3e600000
TBOOT: pol_hash: 14 c8 20 da 3e eb ae b2 78 d8 7f a7 15 88 8f 53 d7 b4 36 8c
TBOOT: VL measurements:
TBOOT: PCR 17: 20 a4 55 4e 39 52 46 c6 46 d6 f1 92 cf 58 52 88 7f fd d0 07
TBOOT: PCR 18: d9 b0 09 b5 e2 ff 12 17 a3 80 c5 f6 fd 05 0c 03 8f 36 2e dd
TBOOT: PCRs before extending:
TBOOT: PCR 17: cf 48 95 86 8b 40 18 3e 6e 41 9c ad 15 ed 26 6a bd e2 24 e2
TBOOT: PCR 18: 37 97 eb ca 1f cc d6 5e 6d dd 42 8c a0 61 e0 f3 b6 e1 d6 86
TBOOT: PCRs after extending:
TBOOT: PCR 17: 55 a5 67 d8 aa 40 30 d2 f4 2f 96 bf 41 5e d7 77 43 3b a8 e7
TBOOT: PCR 18: 18 66 e8 52 fd dd 0f ba 50 b9 b3 da 4e fa 4e bf 17 2d 7c bb
TBOOT: tboot_shared data:
TBOOT: version: 5
TBOOT: log_addr: 0x00000000
TBOOT: shutdown_entry: 0x008031b0
TBOOT: shutdown_type: 0
TBOOT: tboot_base: 0x00803000
TBOOT: tboot_size: 0x7ae60
TBOOT: num_in_wfs: 3
TBOOT: no LCP module found
TBOOT: kernel is ELF format
TBOOT: i=0
TBOOT: elf = 0x825f2c
TBOOT: elf.e_phnum = 0x1
TBOOT: elf.p_phentsize = 0x20
TBOOT: elf.p_phoff = 0x34
TBOOT: ph.p_filesz = 0x172000
TBOOT: ph.p_memsz = 0x2b8000
TBOOT: ph.p_addr = 0x100000
TBOOT: ph.p_offset = 0x80
TBOOT: transfering control to kernel @0x48000000...
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From: Cihula, J. <jos...@in...> - 2011-07-01 21:57:42
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The moment the (TXT) world has been waiting for has arrived.....the SINIT ACM for the 2nd Generation Intel(R) Core(TM) Processor Series (Sandy Bridge) is now available on the tboot SourceForge site. Try not to overload their servers ;-) Joe Intel Corp. |
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From: SeongWook J. <sw...@ca...> - 2011-06-17 13:27:12
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Hello, I read SINIT ACM for i5 desktop processor series (particularly i5-2500?) will be released soon. Is there any plan to support SINIT ACM for i5 mobile processor series? If so, can I ask when it will release? Regards, Seongwook Jin |
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From: Cihula, J. <jos...@in...> - 2011-06-15 15:41:38
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> From: Jonathan McCune [mailto:jon...@cm...] > Sent: Wednesday, June 15, 2011 7:16 AM > > Some quick and dirty thoughts inline... > > > 1. Using tboot or a TPM (on the motherboard), is it possible to have a > > dual boot system where both OSes boot in trusted mode? If so, how is > > that configured? > > Almost certainly, though it depends on your definition of "trusted mode". If you just want > "authenticated boot" where the OS that boots gets measured, then yes. If you want to try to > "enforce" that any OS that boots must be one of these 2 OSes, the set of assumptions on which > those properties depend grows considerably. Sorry I don't have time to get into more detail > presently. > > > 2. Can tboot or a TPM (on the motherboard) enable trusted boot of a > > USB device? If so, how is that configured? > > I suspect so. This would have more to do with the configuration of the bootloader (e.g., grub) > than with tboot. In the case of a static root of trust (S-RTM) (i.e. TPM w/o TXT), the USB device is just another boot medium and whatever the bootloader on it, it will be measured into PCR 4. I do believe that the spec also requires the BIOS to extend something that indicates what boot medium was chosen, so you would end up with different PCRs even if you booted the same code as from an HDD. In the case of TXT w/ tboot, since tboot is loaded by the bootloader, it is not aware of which device it was booted from. So the D-RTM measurements will be the same as long as what is being launched is the same. > > 3. If I were able to set up a USB device (with a controlled bootable > > image) for trusted boot... if the primary hard disk OS was not to boot > > in trusted mode how would these be configured? > > Again, this sounds like a BIOS (boot device priority) / bootloader configuration. tboot should be > able to work under these conditions, though I haven't tried it. Tboot runs just fine from a USB (or CD). You can look at any number of instructions for building a Linux live image and just add tboot as you would for a HDD boot. > > 4. Is it possible to buy TPM chips? If so, through whom? Through whom > > might I get one for eval/prototype purposes? > > It is. The easiest way is to buy a PC / laptop that already includes one, but individual chips > are available on daughter cards with an LPC bus interface. DigiKey is one such company that sells > them: > http://search.digikey.com/scripts/DkSearch/dksus.dll?Cat=2556771&k=tpm > > Note that most PCs don't include the relevant connector but I believe adapter cards are available. All Intel(R) vPro(TM) systems have TPMs (and TXT). > > Athough tboot is very useful, my questions relate to a potential > > project that requires use of a TPM chip. > > Folks on this list have been kind with respect to discussion of a related project of mine, so > hopefully they'll put up with this one too. :) > > Regards, > -Jon > > ------------------------------------------------------------------------------ > EditLive Enterprise is the world's most technically advanced content authoring tool. Experience > the power of Track Changes, Inline Image Editing and ensure content is compliant with > Accessibility Checking. > http://p.sf.net/sfu/ephox-dev2dev > _______________________________________________ > tboot-devel mailing list > tbo...@li... > https://lists.sourceforge.net/lists/listinfo/tboot-devel |
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From: Jonathan M. <jon...@cm...> - 2011-06-15 14:20:19
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Hello tboot-devel: First, thanks for all the Flicker-related support in the past. I am writing to announce that development of the Flicker project has acquired its own home at http://flickertcb.sourceforge.net/. All further announcements in regard to the Flicker project will be sent to the flickertcb-devel mailing list. If you wish to remain informed about Flicker happenings, please subscribe to the mailing list here: https://lists.sourceforge.net/lists/listinfo/flickertcb-devel If the list admins / popular consensus dictates, I could subscribe the tboot-devel list. I am also pleased to announce the release of Flicker v0.5, with support for both (32-bit, non-PAE) Linux and Windows 7 on both AMD and Intel processors. Flicker v0.5 represents a significant rework and is now covered by a BSD-style license. In closing, thanks for your interest in this project. It is my ambition to build some momentum behind its development in an open-source way, so please do write in with bug reports, patches, feature requests, reports of systems that do (or do not) run the code successfully, etc. Kind regards, -Jon |
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From: Jonathan M. <jon...@cm...> - 2011-06-15 14:16:19
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Some quick and dirty thoughts inline... > 1. Using tboot or a TPM (on the motherboard), is it possible to have a dual > boot system where both OSes boot in trusted mode? If so, how is that > configured? Almost certainly, though it depends on your definition of "trusted mode". If you just want "authenticated boot" where the OS that boots gets measured, then yes. If you want to try to "enforce" that any OS that boots must be one of these 2 OSes, the set of assumptions on which those properties depend grows considerably. Sorry I don't have time to get into more detail presently. > 2. Can tboot or a TPM (on the motherboard) enable trusted boot of a USB > device? If so, how is that configured? I suspect so. This would have more to do with the configuration of the bootloader (e.g., grub) than with tboot. > 3. If I were able to set up a USB device (with a controlled bootable image) > for trusted boot... if the primary hard disk OS was not to boot in trusted > mode how would these be configured? Again, this sounds like a BIOS (boot device priority) / bootloader configuration. tboot should be able to work under these conditions, though I haven't tried it. > 4. Is it possible to buy TPM chips? If so, through whom? Through whom might > I get one for eval/prototype purposes? It is. The easiest way is to buy a PC / laptop that already includes one, but individual chips are available on daughter cards with an LPC bus interface. DigiKey is one such company that sells them: http://search.digikey.com/scripts/DkSearch/dksus.dll?Cat=2556771&k=tpm Note that most PCs don't include the relevant connector but I believe adapter cards are available. > Athough tboot is very useful, my questions relate to a potential project > that requires use of a TPM chip. Folks on this list have been kind with respect to discussion of a related project of mine, so hopefully they'll put up with this one too. :) Regards, -Jon |
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From: <joh...@pi...> - 2011-06-14 17:36:08
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<html><body><span style="font-family:Verdana; color:#000000; font-size:10pt;"><div>Greetings,</div> <div> </div> <div>I have been lurking here quite a while, and think I understand a fair amount about TPMs and the boot process. However, I lack hands-on experience. And there are not many places to ask my questions (ok, this is the only one I could find).</div> <div> </div> <div>My questions are:</div> <div>1. Using tboot or a TPM (on the motherboard), is it possible to have a dual boot system where both OSes boot in trusted mode? If so, how is that configured?</div> <div>2. Can tboot or a TPM (on the motherboard) enable trusted boot of a USB device? If so, how is that configured? </div> <div>3. If I were able to set up a USB device (with a controlled bootable image) for trusted boot... if the primary hard disk OS was not to boot in trusted mode how would these be configured?</div> <div>4. Is it possible to buy TPM chips? If so, through whom? Through whom might I get one for eval/prototype purposes?</div> <div> </div> <div>Athough tboot is very useful, my questions relate to a potential project that requires use of a TPM chip.</div> <div> </div> <div>Pointers to answers on the above would be helpful. </div> <div> </div> <div>Thanks in advance!</div> <div>John Willis</div> <div> </div> <div> </div> <div> </div> <div> </div></span></body></html> |
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From: Martin T. <ma...@th...> - 2011-06-13 18:20:25
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Hi Joe Thanks for your response. I actually thought that might be a possibility, but the manual said that SINIT would write 0xC0000001 to the register after execution, so I had expected that this is the value I would see if the MLE blew up (which is very likely, given it is a rather dummy MLE). But I guess this value gets overwritten in case of a TXT shutdown. I guess the good news is that it seems to reach the point where it hands off control to the MLE. - Martin On Mon, Jun 13, 2011 at 7:16 PM, Cihula, Joseph <jos...@in...>wrote: > Errors in the range 0x8xxxxxxx are generated by the processor (see MLE DG > Appendix B.1.3). In this case, it is a #LegacyShutdown error (see table > 10). This is most likely caused by your MLE due to an error (triple fault, > crash, shutdown w/ VMX on, etc.) before SEXIT is invoked. > > > > As for ordering of the errors, it is not strictly based on the progress > code, though that is roughly the order. > > > > Joe > > > > *From:* Martin Thiim [mailto:ma...@th...] > *Sent:* Monday, June 13, 2011 9:00 AM > *To:* tbo...@li... > *Subject:* [tboot-devel] Question on TXT/SINIT error > > > > Hello > > > > I'm developing a custom MLE (and launcher). So far I've found the > TXT.ERRORCODE register very helpful. > > > > However, now I've run into a strange error code: I get 0x80000000, which is > "valid" but not really informative. > > > > The error I got before that was 0xc0000c71, which I parse as SINIT-error > progress 0x07, error 0x03: "a non-initial entry (PDPE/PDE/PTE) is > invalid/not present (i.e. holes in page table are not allowed." > > > > This error could be explained by an improper value in > OsSinitData.MLEBaseHeader. I changed this value so that it corresponds to > the linear address of the first page in the MLE page tables. This small > change is enough to transform the error into a 0x80000000 error code (I can > recreate the old error code by simply changing the MLEBaseHeader value in > the debugger back to the old value). > > > > Any hints on how I could come closer to what went wrong? Presumably it is > something that happens after/during the page-table related checks? > > > > By the way, as far as I can tell, the progress codes are not always > reflective of the order in which the checks take place. For instance, I've > had TPM-related errors (progress=0x0d) before I got the page-table related > error (progress=0x07). > > > > The machine is a HP Elitebook 8440p with a Core i5-520M CPU with 2 cores/4 > threads. The SINIT module is i5_i7_DUAL_SINIT_18. > > > > Thanks! > > > > Best regards, > > > > Martin Thiim > > > > > > > |
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From: Cihula, J. <jos...@in...> - 2011-06-13 17:16:16
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Errors in the range 0x8xxxxxxx are generated by the processor (see MLE DG Appendix B.1.3). In this case, it is a #LegacyShutdown error (see table 10). This is most likely caused by your MLE due to an error (triple fault, crash, shutdown w/ VMX on, etc.) before SEXIT is invoked. As for ordering of the errors, it is not strictly based on the progress code, though that is roughly the order. Joe From: Martin Thiim [mailto:ma...@th...] Sent: Monday, June 13, 2011 9:00 AM To: tbo...@li... Subject: [tboot-devel] Question on TXT/SINIT error Hello I'm developing a custom MLE (and launcher). So far I've found the TXT.ERRORCODE register very helpful. However, now I've run into a strange error code: I get 0x80000000, which is "valid" but not really informative. The error I got before that was 0xc0000c71, which I parse as SINIT-error progress 0x07, error 0x03: "a non-initial entry (PDPE/PDE/PTE) is invalid/not present (i.e. holes in page table are not allowed." This error could be explained by an improper value in OsSinitData.MLEBaseHeader. I changed this value so that it corresponds to the linear address of the first page in the MLE page tables. This small change is enough to transform the error into a 0x80000000 error code (I can recreate the old error code by simply changing the MLEBaseHeader value in the debugger back to the old value). Any hints on how I could come closer to what went wrong? Presumably it is something that happens after/during the page-table related checks? By the way, as far as I can tell, the progress codes are not always reflective of the order in which the checks take place. For instance, I've had TPM-related errors (progress=0x0d) before I got the page-table related error (progress=0x07). The machine is a HP Elitebook 8440p with a Core i5-520M CPU with 2 cores/4 threads. The SINIT module is i5_i7_DUAL_SINIT_18. Thanks! Best regards, Martin Thiim |
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From: Martin T. <ma...@th...> - 2011-06-13 16:25:06
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Hello I'm developing a custom MLE (and launcher). So far I've found the TXT.ERRORCODE register very helpful. However, now I've run into a strange error code: I get 0x80000000, which is "valid" but not really informative. The error I got before that was 0xc0000c71, which I parse as SINIT-error progress 0x07, error 0x03: "a non-initial entry (PDPE/PDE/PTE) is invalid/not present (i.e. holes in page table are not allowed." This error could be explained by an improper value in OsSinitData.MLEBaseHeader. I changed this value so that it corresponds to the linear address of the first page in the MLE page tables. This small change is enough to transform the error into a 0x80000000 error code (I can recreate the old error code by simply changing the MLEBaseHeader value in the debugger back to the old value). Any hints on how I could come closer to what went wrong? Presumably it is something that happens after/during the page-table related checks? By the way, as far as I can tell, the progress codes are not always reflective of the order in which the checks take place. For instance, I've had TPM-related errors (progress=0x0d) before I got the page-table related error (progress=0x07). The machine is a HP Elitebook 8440p with a Core i5-520M CPU with 2 cores/4 threads. The SINIT module is i5_i7_DUAL_SINIT_18. Thanks! Best regards, Martin Thiim |
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From: Sansar C. <sun...@ya...> - 2011-06-12 09:24:37
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http://fly.fishing4today.com/glink.php |
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From: Cihula, J. <jos...@in...> - 2011-06-10 22:26:06
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> From: Mike Detwiler [mailto:j.m...@gm...] > Sent: Friday, June 10, 2011 4:34 AM > > On Thu, May 12, 2011 at 6:12 PM, Mike Detwiler <j.m...@gm...> wrote: > > On Thu, May 12, 2011 at 12:49 PM, Cihula, Joseph > > <jos...@in...> wrote: > >>> From: Mike Detwiler [mailto:j.m...@gm...] > >>> Sent: Thursday, May 12, 2011 3:31 AM > >>> > >>> On Thu, May 12, 2011 at 12:41 AM, Cihula, Joseph <jos...@in...> wrote: > >>> >> From: Mike Detwiler [mailto:j.m...@gm...] > >>> >> Sent: Wednesday, May 11, 2011 6:22 PM > >>> >> > >>> >> Hi, just wondering if anyone had any thought on this. > >>> > > >>> > Tboot does not have EFI support. In addition to what it would > >>> > need to do with regards to > >>> getting the memory map and ACPI tables, it would also need to fill > >>> in the OsSinitData.EfiRsdtPtr with the correct value (and this being 0 is what is generating > the SINIT error). > >>> > >>> Thanks for the response, Joe. Does this imply that the current i5/i7 > >>> SINIT ACM available from sourceforge has all the bits necessary for > >>> EFI, and as soon as tboot support is added everything should work? > >> > >> Correct (again, patches welcome ;-). > > > > We're definitely looking into that and will let you know if we get > > something working. > > We're using 64-bit EFI/grub2. Is there anything that would prevent TXT and tboot from functioning > properly if we were to successfully port tboot from 32-bit to 64-bit? Not that I'm aware of. Joe |
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From: Mike D. <j.m...@gm...> - 2011-06-10 11:33:52
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On Thu, May 12, 2011 at 6:12 PM, Mike Detwiler <j.m...@gm...> wrote: > On Thu, May 12, 2011 at 12:49 PM, Cihula, Joseph > <jos...@in...> wrote: >>> From: Mike Detwiler [mailto:j.m...@gm...] >>> Sent: Thursday, May 12, 2011 3:31 AM >>> >>> On Thu, May 12, 2011 at 12:41 AM, Cihula, Joseph <jos...@in...> wrote: >>> >> From: Mike Detwiler [mailto:j.m...@gm...] >>> >> Sent: Wednesday, May 11, 2011 6:22 PM >>> >> >>> >> Hi, just wondering if anyone had any thought on this. >>> > >>> > Tboot does not have EFI support. In addition to what it would need to do with regards to >>> getting the memory map and ACPI tables, it would also need to fill in the OsSinitData.EfiRsdtPtr >>> with the correct value (and this being 0 is what is generating the SINIT error). >>> >>> Thanks for the response, Joe. Does this imply that the current i5/i7 SINIT ACM available from >>> sourceforge has all the bits necessary for EFI, and as soon as tboot support is added everything >>> should work? >> >> Correct (again, patches welcome ;-). > > We're definitely looking into that and will let you know if we get > something working. We're using 64-bit EFI/grub2. Is there anything that would prevent TXT and tboot from functioning properly if we were to successfully port tboot from 32-bit to 64-bit? Thanks, -Mike |
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From: Mike D. <j.m...@gm...> - 2011-05-12 22:12:09
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On Thu, May 12, 2011 at 12:49 PM, Cihula, Joseph <jos...@in...> wrote: >> From: Mike Detwiler [mailto:j.m...@gm...] >> Sent: Thursday, May 12, 2011 3:31 AM >> >> On Thu, May 12, 2011 at 12:41 AM, Cihula, Joseph <jos...@in...> wrote: >> >> From: Mike Detwiler [mailto:j.m...@gm...] >> >> Sent: Wednesday, May 11, 2011 6:22 PM >> >> >> >> Hi, just wondering if anyone had any thought on this. >> > >> > Tboot does not have EFI support. In addition to what it would need to do with regards to >> getting the memory map and ACPI tables, it would also need to fill in the OsSinitData.EfiRsdtPtr >> with the correct value (and this being 0 is what is generating the SINIT error). >> >> Thanks for the response, Joe. Does this imply that the current i5/i7 SINIT ACM available from >> sourceforge has all the bits necessary for EFI, and as soon as tboot support is added everything >> should work? > > Correct (again, patches welcome ;-). We're definitely looking into that and will let you know if we get something working. Thanks, -Mike > > Joe > >> >> -Mike >> >> > >> > We do intend to eventually add EFI support (or will take a patch if one is offered ;-). >> > >> > Joe >> > >> >> >> >> Thanks, >> >> >> >> -Mike >> >> >> >> On Mon, May 9, 2011 at 10:14 PM, Mike Detwiler <j.m...@gm...> wrote: >> >> > Hello, >> >> > >> >> > We can successfully execute tboot with grub2 built as a legacy >> >> > bootloader and selecting the legacy boot option in our Insyde BIOS. >> >> > However, if we build grub2 for EFI and select EFI boot in the BIOS, >> >> > we get a system reset after GETSEC[SENTER]. >> >> > >> >> > The output from parse_err: >> >> > >> >> > AC module error : acm_type=0x1, progress=0x0a, error=0x2 >> >> > >> >> > which translates to: "RSDP ACPI table checksum invalid" >> >> > >> >> > in the sinit_errors.txt from i5_i7_DUAL-SINIT.tar.gz. >> >> > >> >> > We're running the latest tboot from bughost.org. >> >> > >> >> > Does tboot support EFI booting? It's curious that everything works >> >> > with a legacy boot, but not with EFI. Is this an indication of a >> >> > possible BIOS bug? >> >> > >> >> > Thanks, >> >> > >> >> > -Mike >> >> > >> >> >> >> --------------------------------------------------------------------- >> >> --------- Achieve unprecedented app performance and reliability What >> >> every C/C++ and Fortran developer should know. >> >> Learn how Intel has extended the reach of its next-generation tools >> >> to help boost performance applications - inlcuding clusters. >> >> http://p.sf.net/sfu/intel-dev2devmay >> >> _______________________________________________ >> >> tboot-devel mailing list >> >> tbo...@li... >> >> https://lists.sourceforge.net/lists/listinfo/tboot-devel >> > > |
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