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From: Cihula, J. <jos...@in...> - 2009-04-09 22:50:41
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> From: Alana Libonati [mailto:al...@cs...] > Sent: Thursday, April 09, 2009 12:30 PM > > Hi, > > I've been trying to get tboot working on my Lenovo T400, but it always gets > stuck at the executing GETSEC[SENTER] stage and then I have to power it down. I > can still use the num lock key (the light goes on/off), but not caps lock when > this happens, so I don't know if something is still happening or not at this > point... > > I have TXT, VT-d and VT-x enabled in the BIOS, and the TPM is active. It is the > latest BIOS (version 2.12) from Lenovo. I am using the tboot source from March > 30th and the 2.6.29-tip kernel patched with the tboot patches from the lkml.org > post. However, I've had the exact same behavior with the 2.6.27-11-generic > (unpatched) Ubuntu kernel and also with the previous version of tboot (from > January). > > Any advice is appreciated, I'm posting my complete tboot log below. Can you boot into native Linux and post the e820 table. Joe > > Thanks, > Alana > > TBOOT: ******************* TBOOT ******************* > TBOOT: unavailable > TBOOT: ********************************************* > TBOOT: command line: logging=serial,vga,memory > TBOOT: TPM is ready > TBOOT: TPM nv_locked: TRUE > TBOOT: TPM: get capability, return value = 00000002 > TBOOT: failed to get actual policy size in TPM NV > TBOOT: failed to read policy from TPM NV, using default > TBOOT: policy: > TBOOT: version: 2 > TBOOT: policy_type: TB_POLTYPE_CONT_NON_FATAL > TBOOT: hash_alg: TB_HALG_SHA1 > TBOOT: policy_control: 00000001 (EXTEND_PCR17) > TBOOT: num_entries: 2 > TBOOT: policy entry[0]: > TBOOT: mod_num: 0 > TBOOT: pcr: none > TBOOT: hash_type: TB_HTYPE_ANY > TBOOT: num_hashes: 0 > TBOOT: policy entry[1]: > TBOOT: mod_num: any > TBOOT: pcr: 19 > TBOOT: hash_type: TB_HTYPE_ANY > TBOOT: num_hashes: 0 > TBOOT: TPM: write nv 20000002, offset 00000000, 00000004 bytes, return = > 00000002 > TBOOT: Error: write TPM error: 0x2. > TBOOT: no policy in TPM NV. > TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff0f > TBOOT: CPU is SMX-capable > TBOOT: CPU is VMX-capable > TBOOT: SMX is enabled > TBOOT: TXT chipset and all needed capabilities present > TBOOT: TPM: write nv 20000002, offset 00000000, 00000004 bytes, return = > 00000002 > TBOOT: Error: write TPM error: 0x2. > TBOOT: LT.ERRORCODE=0 > TBOOT: LT.ESTS=0 > TBOOT: bios_data (@bc920008, 2c): > TBOOT: version: 3 > TBOOT: bios_sinit_size: 0x0 (0) > TBOOT: lcp_pd_base: 0x0 > TBOOT: lcp_pd_size: 0x0 (0) > TBOOT: num_logical_procs: 2 > TBOOT: flags: 0x00000001 > TBOOT: TPM: write nv 20000002, offset 00000000, 00000004 bytes, return = > 00000002 > TBOOT: Error: write TPM error: 0x2.TBOOT: CR0 and EFLAGS OK > TBOOT: no machine check errors > TBOOT: CPU is ready for SENTER > TBOOT: checking previous errors on the last boot. > TPM: read nv index 20000002 offset 00000000, return value = 00000002 > TBOOT: Error: read TPM error: 0x2. > TBOOT: last boot has no error. > TBOOT: user-provided SINIT found: /boot/GM45_PM45_SINIT_19.BIN > TBOOT: chipset ids: vendor=8086, device=9000, revision=7f > TBOOT: 1 ACM chipset id entries: > TBOOT: vendor=8086, device=9000, flags=1, revision=3f, extended=0 > TBOOT: copied SINIT (size=67c0) to bc900000 > TBOOT: AC mod base alignment OK > TBOOT: AC mod size OK > TBOOT: AC module header dump for SINIT: > TBOOT: type: 0x2 (ACM_TYPE_CHIPSET) > TBOOT: length: 0xa1 (161) > TBOOT: version: 0 > TBOOT: chipset_id: 0x2a40 > TBOOT: flags: 0x0 > TBOOT: pre_production: 0 > TBOOT: debug_signed: 0 > TBOOT: vendor: 0x8086 > TBOOT: date: 0x20081017 > TBOOT: size*4: 0x67c0 (26560) > TBOOT: code_control: 0x0 > TBOOT: entry point: 0x00000008:00004120 > TBOOT: scratch_size: 0x8f (143) > TBOOT: info_table: > TBOOT: uuid: {0x7fc03aaa, 0x46a7, 0x18db, 0xac2e, > {0x69, 0x8f, 0x8d, 0x41, 0x7f, 0x5a}} > TBOOT: ACM_UUID_V3 > TBOOT: chipset_acm_type: 0x1 (SINIT) > TBOOT: version: 3 > TBOOT: length: 0x28 (40) > TBOOT: chipset_id_list: 0x4e8 > TBOOT: os_sinit_data_ver: 0x4 > TBOOT: min_mle_hdr_ver: 0x00020000 > TBOOT: capabilities: 0x00000002 > TBOOT: rlp_wake_getsec: 0 > TBOOT: rlp_wake_monitor: 1 > TBOOT: acm_ver: 19 > TBOOT: chipset list: > TBOOT: count: 1 > TBOOT: entry 0: > TBOOT: flags: 0x1 > TBOOT: vendor_id: 0x8086 > TBOOT: device_id: 0x9000 > TBOOT: revision_id: 0x3f > TBOOT: extended_id: 0x0 > TBOOT: file addresses: > TBOOT: &_start=00803000 > TBOOT: &_end=0084fc4c > TBOOT: &_mle_start=00803000 > TBOOT: &_mle_end=00822000 > TBOOT: &_post_launch_entry=00803020 > TBOOT: &_txt_wakeup=008031f0 > TBOOT: &g_mle_hdr=00819120 > TBOOT: MLE header: > TBOOT: uuid={0x9082ac5a, 0x476f, 0x74a7, 0x5c0f, > {0x55, 0xa2, 0xcb, 0x51, 0xb6, 0x42}} > TBOOT: length=34 > TBOOT: version=00020001 > TBOOT: entry_point=00000020 > TBOOT: first_valid_page=00000000 > TBOOT: mle_start_off=0 > TBOOT: mle_end_off=1f000 > TBOOT: capabilities: 0x00000003 > TBOOT: rlp_wake_getsec: 1 > TBOOT: rlp_wake_monitor: 1 > TBOOT: MLE start=803000, end=822000, size=1f000 > TBOOT: ptab_size=3000, ptab_base=00800000 > TBOOT: bios_data (@bc920008, 2c): > TBOOT: version: 3 > TBOOT: bios_sinit_size: 0x0 (0) > TBOOT: lcp_pd_base: 0x0 > TBOOT: lcp_pd_size: 0x0 (0) > TBOOT: num_logical_procs: 2 > TBOOT: flags: 0x00000001 > TBOOT: min_lo_ram: 0x0, max_lo_ram: 0xbc700000 > TBOOT: min_hi_ram: 0x0, max_hi_ram: 0x0 > TBOOT: no LCP manifest found > TBOOT: os_sinit_data (@bc920154, 5c): > TBOOT: version: 4 > TBOOT: mle_ptab: 0x800000 > TBOOT: mle_size: 0x1f000 (126976) > TBOOT: mle_hdr_base: 0x16120 > TBOOT: vtd_pmr_lo_base: 0x0 > TBOOT: vtd_pmr_lo_size: 0xbc600000 > TBOOT: vtd_pmr_hi_base: 0x0 > TBOOT: vtd_pmr_hi_size: 0x0 > TBOOT: lcp_po_base: 0x0 > TBOOT: lcp_po_size: 0x0 (0) > TBOOT: capabilities: 0x00000002 > TBOOT: rlp_wake_getsec: 0 > TBOOT: rlp_wake_monitor: 1 > TBOOT: setting MTRRs for acmod: base=bc900000, size=67c0, num_pages=7 > TBOOT: executing GETSEC[SENTER]... > > > ------------------------------------------------------------------------------ > This SF.net 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