From: Cihula, J. <jos...@in...> - 2007-12-06 18:00:27
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On Tuesday, December 04, 2007 7:45 PM, Atsushi SAKAI wrote: > Hi, Joe >=20 > Thank you for various answers. > I still have several questions. > I would be appreciate if you answer the question. >=20 > 1)Is SHA256 planned to use? > (since definition exists in code) It is possible that we will support SHA-256 in the future, and since the hash size is larger, we wanted to make sure that we would not have to change the data layout if we did. > Following questions are from Intel TXT Spec(Aug 2007) >=20 > 2)What is GV3 MSRs?(p.69) These are the Intel(R) SpeedStep MSRs that govern frequency/voltage settings. > 3)In Intel TXT Specification(August 2007) > Appendix D.1.3 - D.1.5 > seems old(since same Data Struct is written in > Appendix C) The contents of the data structures are different. Appendix D is for the TEP only and so these are legacy data structure versions. > 4)In Intel TXT Specification(August 2007) > p.59 (see Appendix "0") > should be Appendix "C" Good catch--we'll fix it in the next rev. >> From Intel 64 and IA-32 Software Developers Manual. > 5) Where is the following manual? > Trusted Execution Technology Measured Launched Environment Programming That is the title for the next revision of the TXT Preliminary Architecture Specification. We should have it available early next year. >=20 > Thanks > Atsushi SAKAI >=20 >=20 >=20 >=20 > ------------------------------------------------------------------------ - > SF.Net email is sponsored by: The Future of Linux Business White Paper > from Novell. From the desktop to the data center, Linux is going > mainstream. Let it simplify your IT future. > http://altfarm.mediaplex.com/ad/ck/8857-50307-18918-4 > _______________________________________________ > tboot-devel mailing list > tbo...@li... > https://lists.sourceforge.net/lists/listinfo/tboot-devel |