Errors in the range 0x8xxxxxxx are generated by the processor (see MLE DG Appendix B.1.3). In this case, it is a #LegacyShutdown error (see table 10). This
is most likely caused by your MLE due to an error (triple fault, crash, shutdown w/ VMX on, etc.) before SEXIT is invoked.
As for ordering of the errors, it is not strictly based on the progress code, though that is roughly the order.
From: Martin Thiim [mailto:firstname.lastname@example.org]
Sent: Monday, June 13, 2011 9:00 AM
Subject: [tboot-devel] Question on TXT/SINIT error
I'm developing a custom MLE (and launcher). So far I've found the TXT.ERRORCODE register very helpful.
However, now I've run into a strange error code: I get 0x80000000, which is "valid" but not really informative.
The error I got before that was 0xc0000c71, which I parse as SINIT-error progress 0x07, error 0x03: "a non-initial entry (PDPE/PDE/PTE) is invalid/not present (i.e. holes in page table are not allowed."
This error could be explained by an improper value in OsSinitData.MLEBaseHeader. I changed this value so that it corresponds to the linear address of the first page in the MLE page tables. This small change is enough to transform the error
into a 0x80000000 error code (I can recreate the old error code by simply changing the MLEBaseHeader value in the debugger back to the old value).
Any hints on how I could come closer to what went wrong? Presumably it is something that happens after/during the page-table related checks?
By the way, as far as I can tell, the progress codes are not always reflective of the order in which the checks take place. For instance, I've had TPM-related errors (progress=0x0d) before I got the page-table related error (progress=0x07).
The machine is a HP Elitebook 8440p with a Core i5-520M CPU with 2 cores/4 threads. The SINIT module is i5_i7_DUAL_SINIT_18.