What does svunit_deactivate_uvm_componet(...) actually do?
Systemverilog Unit Test Framework
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bryan_morris,
nosnhojn
I'm unit testing some UVM components and in my teardown(...) method I have a call to svunit_deactivate_uvm_component(my_component) (as seen in the docs). I would have expected that calling this would kill off the component completely, but I see this component still issues uvm_error messages after its testsuite is finished and another testsuite for another component is being executed. The fact that the first component still runs interferes with the second testsuite, because it calls uvm_report_mock::verify_complete() and gets unexpected error messages.
The component in question is a monitor that basically consists of a forever loop inside the run_phase(...) task. Shouldn't calling svunit_deactivate_component kill the run_phase?
take a look at the simple_model example for where the svunit_uvm_test_start/finish and the activate/deactivate functions are called. start/finish control the run flow (i.e. start/kill run) whereas the activate/deactivate add/remove components from the run flow. if I had to guess, I'd say svunit_uvm_test_finish and/or deactivate are not being called in your teardown task.
svunit_uvm_test_finish() is being called before svunit_deactivate_component(...) is called. This is the same way it is called in the example as well (not sure if it makes a difference in what order they're called).
this is a little worrisome considering the finish/deactivate is supposed to kill the run then remove a component from the runflow (uvm_domain) so that it doesn't start again while other components are being tested.
is it possible to send me code for the 2 _unit_test.sv files where the first component continues to run and interfere with the second? you could remove everything but 1 test. for each. I don't need the uuts, just the unit_test.sv files.
It's on a secure network so I can't get anything out. I'll try to reproduce it or step a bit through the code and see if I can see what's happening.