I'm trying to just get UVM (May 25, 2011 release) to compile in SVEditor.
I am using Indigo, with all files at lastest release as of this email.
Let's say I create a project of just the UVM release.
My questions are:
Appropriate settings for the SystemVerilog Project properties?
I have tried the following settings:
However, I see the following problems:
1) "uvm_bottomup_phase.svh" reports that 'uvm_info' is not found, however when I right-click on it and go to reference, it properly finds the reference.
2) at the bottom of the file, there is a function 'execute' which has three parsing errors reported.
// Function: execute
// Executes the bottom-up phase ~phase~ for the component ~comp~.
protected virtual function void execute(uvm_component comp,
comp.m_current_phase = phase; // ERROR1: Expecting identifier or keyword; received "="
exec_func(comp,phase); // ERROR2: Expecting an identifier or keyword; received "("
endfunction // ERROR3: invalid type name "endfunction"
Are these know bugs? I wasn't able to spot them in the buglist.
This message and any attached documents contain information from QLogic Corporation or its wholly-owned subsidiaries that may be confidential. If you are not the intended recipient, you may not read, copy, distribute, or use this information. If you have received this transmission in error, please notify the sender immediately by reply e-mail and then delete this message.
Get latest updates about Open Source Projects, Conferences and News.