Even if the OpenOCD flash and I can debug well th code on Eclipse, the "monitor reset halt" command seems that is not working:
*target remote localhost:3333
Remote debugging using localhost:3333
0x00006000 in ?? ()
monitor reset halt
TARGET: stm8.cpu - Not halted
in procedure 'reset'
in procedure 'ocdbouncer'
Polling target stm8.cpu failed, trying to reexamine
trying to reconnect
monitor loadimage main.bin 0x8000
target halted due to debug-request, pc: 0x00006000
2327 bytes written at address 0x00008000
downloaded 2327 bytes in 0.433252s (5.245 KiB/s)*
Thanks you for the help.
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It is exactly what it says: Target is not halted. You would have to configure gdb to beak on connect (set remote interrupt-on-connect) or make sure your target is halted before connecting to target i.e. with -c "reset halt" on openocd command line.
Last edit: akre 2017-05-19
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Finally I was able to lay my hands on a STM8L discovery board. Althogh STM8L does not apply to your project I ran in to an issue with the SWIM interface on the discovery board with VDD line to the stlink.
I noticed in your picture you only have 3 wires connected, I assume the VDD line is not connected? Any how it seems the genuine ST-link/v2 dongle requires the VDD line to be connected or there will be trouble connecting to the target. I don't know if the same apply for other generic ST-Link dongles as well.
/Ake
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Well, I never looked again to this issue as I am able to program and debug.
I see the NRST line have 5V... maybe the clone STLinkV2 I have can't put it
at 0V.
Yes, I am using STLinkV2 clone, I have 2 units. I am never using the VDD
line, nor for STM8 nor for STM32.
Finally I was able to lay my hands on a STM8L discovery board. Althogh
STM8L does not apply to your project I ran in to an issue with the SWIM
interface on the discovery board with VDD line to the stlink.
I noticed in your picture you only have 3 wires connected, I assume the
VDD line is not connected? Any how it seems the genuine ST-link/v2 dongle
requires the VDD line to be connected or there will be trouble connecting
to the target. I don't know if the same apply for other generic ST-Link
dongles as well.
Hi again ;-)
I finally got my boards/EBike motor controller with STM8S105C6T6. I am able to flash with stm8flash and also with OpenOCD -- you can see here: https://opensourceebikefirmware.bitbucket.io/Various--Endless-sphere.com_forum_messages--2017.05.18_-_First_code_flashing_and_running.html
Even if the OpenOCD flash and I can debug well th code on Eclipse, the "monitor reset halt" command seems that is not working:
*target remote localhost:3333
Remote debugging using localhost:3333
0x00006000 in ?? ()
monitor reset halt
TARGET: stm8.cpu - Not halted
in procedure 'reset'
in procedure 'ocdbouncer'
Polling target stm8.cpu failed, trying to reexamine
trying to reconnect
monitor loadimage main.bin 0x8000
target halted due to debug-request, pc: 0x00006000
2327 bytes written at address 0x00008000
downloaded 2327 bytes in 0.433252s (5.245 KiB/s)*
Thanks you for the help.
It is exactly what it says: Target is not halted. You would have to configure gdb to beak on connect (set remote interrupt-on-connect) or make sure your target is halted before connecting to target i.e. with -c "reset halt" on openocd command line.
Last edit: akre 2017-05-19
It is failing while with STM8S003 workes perfectly as I already docummented.
With: openocd -d3 -f tools/openocd-v0.10.0-scripts/stlink-v2.cfg -f tools/openocd-v0.10.0-scripts/stm8s105.cfg -c "init" -c "reset halt"
cas@cas-sp4:~/OpenSource-EBike-firmware/BMSBattery_S_controllers_firmware$ /home/cas/software/stm8-binutils/bin/openocd -d3 -f tools/openocd-v0.10.0-scripts/stlink-v2.cfg -f tools/openocd-v0.10.0-scripts/stm8s105.cfg -c "init" -c "reset halt"
Open On-Chip Debugger 0.10.0
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
User : 13 3 command.c:544 command_print(): debug_level: 3
Debug: 14 3 options.c:181 add_default_dirs(): bindir=/home/cas/software/stm8-binutils/bin
Debug: 15 3 options.c:182 add_default_dirs(): pkgdatadir=/home/cas/software/stm8-binutils/share/openocd
Debug: 16 3 options.c:183 add_default_dirs(): exepath=/home/cas/software/stm8-binutils/bin
Debug: 17 3 options.c:184 add_default_dirs(): bin2data=../share/openocd
Debug: 18 3 configuration.c:42 add_script_search_dir(): adding /home/cas/.openocd
Debug: 19 3 configuration.c:42 add_script_search_dir(): adding /home/cas/software/stm8-binutils/bin/../share/openocd/site
Debug: 20 3 configuration.c:42 add_script_search_dir(): adding /home/cas/software/stm8-binutils/bin/../share/openocd/scripts
Debug: 21 3 configuration.c:82 find_file(): found tools/openocd-v0.10.0-scripts/stlink-v2.cfg
Debug: 22 3 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_interface hla
Debug: 23 3 command.c:143 script_debug(): command - interface ocd_interface hla
Debug: 25 3 command.c:364 register_command_handler(): registering 'ocd_hla_device_desc'...
Debug: 26 3 command.c:364 register_command_handler(): registering 'ocd_hla_serial'...
Debug: 27 3 command.c:364 register_command_handler(): registering 'ocd_hla_layout'...
Debug: 28 3 command.c:364 register_command_handler(): registering 'ocd_hla_vid_pid'...
Debug: 29 3 command.c:364 register_command_handler(): registering 'ocd_hla_command'...
Debug: 30 3 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_hla_layout stlink
Debug: 31 3 command.c:143 script_debug(): command - hla_layout ocd_hla_layout stlink
Debug: 33 3 hla_interface.c:239 hl_interface_handle_layout_command(): hl_interface_handle_layout_command
Debug: 34 3 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_hla_device_desc ST-LINK/V2
Debug: 35 3 command.c:143 script_debug(): command - hla_device_desc ocd_hla_device_desc ST-LINK/V2
Debug: 37 3 hla_interface.c:213 hl_interface_handle_device_desc_command(): hl_interface_handle_device_desc_command
Debug: 38 3 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_hla_vid_pid 0x0483 0x3748
Debug: 39 4 command.c:143 script_debug(): command - hla_vid_pid ocd_hla_vid_pid 0x0483 0x3748
Debug: 41 4 hla_interface.c:267 hl_interface_handle_vid_pid_command(): hl_interface_handle_vid_pid_command
Debug: 42 4 configuration.c:82 find_file(): found tools/openocd-v0.10.0-scripts/stm8s105.cfg
Debug: 43 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select stlink_swim
Debug: 44 4 command.c:143 script_debug(): command - ocd_transport ocd_transport select stlink_swim
Debug: 45 4 hla_transport.c:191 hl_transport_select(): hl_transport_select
Debug: 46 4 command.c:364 register_command_handler(): registering 'ocd_hla'...
Debug: 47 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 48 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 49 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 50 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 51 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 52 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 53 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 54 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 55 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 56 4 command.c:364 register_command_handler(): registering 'ocd_jtag_ntrst_delay'...
Debug: 57 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_hla newtap stm8 cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0
Debug: 58 4 command.c:143 script_debug(): command - ocd_hla ocd_hla newtap stm8 cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0
Debug: 59 4 hla_tcl.c:116 jim_hl_newtap_cmd(): Creating New Tap, Chip: stm8, Tap: cpu, Dotted: stm8.cpu, 8 params
Debug: 60 4 hla_tcl.c:126 jim_hl_newtap_cmd(): Processing option: -irlen
Debug: 61 4 hla_tcl.c:126 jim_hl_newtap_cmd(): Processing option: -ircapture
Debug: 62 4 hla_tcl.c:126 jim_hl_newtap_cmd(): Processing option: -irmask
Debug: 63 4 hla_tcl.c:126 jim_hl_newtap_cmd(): Processing option: -expected-id
Debug: 64 4 core.c:1304 jtag_tap_init(): Created Tap: stm8.cpu @ abs position 0, irlen 0, capture: 0x0 mask: 0x0
Debug: 65 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_target create stm8.cpu stm8 -chain-position stm8.cpu
Debug: 66 4 command.c:143 script_debug(): command - ocd_target ocd_target create stm8.cpu stm8 -chain-position stm8.cpu
Debug: 67 4 target.c:1901 target_free_all_working_areas_restore(): freeing all working areas
Debug: 68 4 command.c:364 register_command_handler(): registering 'ocd_stm8'...
Debug: 69 4 stm8.c:1074 stm8_target_create(): stm8_target_create
Debug: 70 4 stm8.c:430 stm8_configure_break_unit(): hw breakpoints: numinst 2 numdata 2
Debug: 71 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 72 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 73 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 74 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 75 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 76 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 77 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 78 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 79 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 80 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 81 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 82 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 83 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 84 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 85 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 86 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 87 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 88 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 89 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 90 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 91 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 92 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 93 4 command.c:364 register_command_handler(): registering 'ocd_stm8.cpu'...
Debug: 94 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu configure -work-area-phys 0x0 -work-area-size 0x400 -work-area-backup 1
Debug: 95 4 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu configure -work-area-phys 0x0 -work-area-size 0x400 -work-area-backup 1
Debug: 96 4 target.c:1901 target_free_all_working_areas_restore(): freeing all working areas
Debug: 97 4 target.c:1901 target_free_all_working_areas_restore(): freeing all working areas
Debug: 98 4 target.c:1901 target_free_all_working_areas_restore(): freeing all working areas
Debug: 99 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu configure -flashstart 0x8000 -flashend 0xffff -eepromstart 0x4000 -eepromend 0x43ff -optionstart 0x4800 -optionend 0x43ff -blocksize 0x80
Debug: 100 4 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu configure -flashstart 0x8000 -flashend 0xffff -eepromstart 0x4000 -eepromend 0x43ff -optionstart 0x4800 -optionend 0x43ff -blocksize 0x80
Debug: 101 4 stm8.c:1901 stm8_jim_configure(): stm8_jim_configure flashstart=00008000
Debug: 102 4 stm8.c:1920 stm8_jim_configure(): stm8_jim_configure flashend=0000ffff
Debug: 103 4 stm8.c:1939 stm8_jim_configure(): stm8_jim_configure eepromstart=00004000
Debug: 104 4 stm8.c:1958 stm8_jim_configure(): stm8_jim_configure eepromend=000043ff
Debug: 105 4 stm8.c:1977 stm8_jim_configure(): stm8_jim_configure optionstart=00004800
Debug: 106 4 stm8.c:1996 stm8_jim_configure(): stm8_jim_configure optionend=000043ff
Debug: 107 4 stm8.c:1882 stm8_jim_configure(): stm8_jim_configure blocksize=00000080
Debug: 108 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 0
Debug: 109 4 command.c:143 script_debug(): command - adapter_khz ocd_adapter_khz 0
Debug: 111 4 core.c:1631 jtag_config_khz(): handle jtag khz
Debug: 112 4 core.c:1598 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 113 4 core.c:1598 adapter_khz_to_speed(): convert khz to interface specific speed value
User : 114 4 command.c:544 command_print(): adapter speed: RCLK - adaptive
Debug: 115 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_reset_config srst_only
Debug: 116 5 command.c:143 script_debug(): command - reset_config ocd_reset_config srst_only
User : 118 5 command.c:544 command_print(): srst_only separate srst_gates_jtag srst_open_drain connect_deassert_srst
Debug: 119 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_init
Debug: 120 5 command.c:143 script_debug(): command - init ocd_init
Debug: 122 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_target init
Debug: 123 5 command.c:143 script_debug(): command - ocd_target ocd_target init
Debug: 125 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 126 5 command.c:143 script_debug(): command - ocd_target ocd_target names
Debug: 127 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu cget -event gdb-flash-erase-start
Debug: 128 5 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu cget -event gdb-flash-erase-start
Debug: 129 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu configure -event gdb-flash-erase-start reset init
Debug: 130 5 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu configure -event gdb-flash-erase-start reset init
Debug: 131 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu cget -event gdb-flash-write-end
Debug: 132 5 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu cget -event gdb-flash-write-end
Debug: 133 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu configure -event gdb-flash-write-end reset halt
Debug: 134 5 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu configure -event gdb-flash-write-end reset halt
Debug: 135 5 target.c:1326 handle_target_init_command(): Initializing targets...
Debug: 136 5 stm8.c:788 stm8_init(): stm8_init
Debug: 137 5 command.c:364 register_command_handler(): registering 'ocd_target_request'...
Debug: 138 5 command.c:364 register_command_handler(): registering 'ocd_trace'...
Debug: 139 5 command.c:364 register_command_handler(): registering 'ocd_trace'...
Debug: 140 5 command.c:364 register_command_handler(): registering 'ocd_fast_load_image'...
Debug: 141 5 command.c:364 register_command_handler(): registering 'ocd_fast_load'...
Debug: 142 5 command.c:364 register_command_handler(): registering 'ocd_profile'...
Debug: 143 5 command.c:364 register_command_handler(): registering 'ocd_virt2phys'...
Debug: 144 5 command.c:364 register_command_handler(): registering 'ocd_reg'...
Debug: 145 5 command.c:364 register_command_handler(): registering 'ocd_poll'...
Debug: 146 5 command.c:364 register_command_handler(): registering 'ocd_wait_halt'...
Debug: 147 5 command.c:364 register_command_handler(): registering 'ocd_halt'...
Debug: 148 5 command.c:364 register_command_handler(): registering 'ocd_resume'...
Debug: 149 5 command.c:364 register_command_handler(): registering 'ocd_reset'...
Debug: 150 5 command.c:364 register_command_handler(): registering 'ocd_soft_reset_halt'...
Debug: 151 5 command.c:364 register_command_handler(): registering 'ocd_step'...
Debug: 152 5 command.c:364 register_command_handler(): registering 'ocd_mdw'...
Debug: 153 5 command.c:364 register_command_handler(): registering 'ocd_mdh'...
Debug: 154 5 command.c:364 register_command_handler(): registering 'ocd_mdb'...
Debug: 155 5 command.c:364 register_command_handler(): registering 'ocd_mww'...
Debug: 156 5 command.c:364 register_command_handler(): registering 'ocd_mwh'...
Debug: 157 5 command.c:364 register_command_handler(): registering 'ocd_mwb'...
Debug: 158 5 command.c:364 register_command_handler(): registering 'ocd_bp'...
Debug: 159 5 command.c:364 register_command_handler(): registering 'ocd_rbp'...
Debug: 160 5 command.c:364 register_command_handler(): registering 'ocd_wp'...
Debug: 161 5 command.c:364 register_command_handler(): registering 'ocd_rwp'...
Debug: 162 5 command.c:364 register_command_handler(): registering 'ocd_load_image'...
Debug: 163 5 command.c:364 register_command_handler(): registering 'ocd_dump_image'...
Debug: 164 5 command.c:364 register_command_handler(): registering 'ocd_verify_image_checksum'...
Debug: 165 5 command.c:364 register_command_handler(): registering 'ocd_verify_image'...
Debug: 166 5 command.c:364 register_command_handler(): registering 'ocd_test_image'...
Debug: 167 5 command.c:364 register_command_handler(): registering 'ocd_reset_nag'...
Debug: 168 5 command.c:364 register_command_handler(): registering 'ocd_ps'...
Debug: 169 5 command.c:364 register_command_handler(): registering 'ocd_test_mem_access'...
Debug: 170 5 hla_interface.c:109 hl_interface_init(): hl_interface_init
Debug: 171 5 hla_layout.c:83 hl_layout_init(): hl_layout_init
Debug: 172 5 core.c:1598 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 173 5 core.c:1601 adapter_khz_to_speed(): have interface set up
Info : 174 5 stlink_usb.c:1932 stlink_speed(): Unable to match requested speed 0 kHz, using 5 kHz
Debug: 175 5 core.c:1598 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 176 5 core.c:1601 adapter_khz_to_speed(): have interface set up
Info : 177 5 stlink_usb.c:1932 stlink_speed(): Unable to match requested speed 0 kHz, using 5 kHz
Info : 178 5 core.c:1384 adapter_init(): RCLK (adaptive clock speed) not supported - fallback to 5 kHz
Debug: 179 5 openocd.c:140 handle_init_command(): Debug Adapter init complete
Debug: 180 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport init
Debug: 181 5 command.c:143 script_debug(): command - ocd_transport ocd_transport init
Debug: 183 5 transport.c:239 handle_transport_init(): handle_transport_init
Debug: 184 5 hla_transport.c:152 hl_transport_init(): hl_transport_init
Debug: 185 5 hla_transport.c:169 hl_transport_init(): current transport stlink_swim
Debug: 186 5 hla_interface.c:42 hl_interface_open(): hl_interface_open
Debug: 187 5 hla_layout.c:40 hl_layout_open(): hl_layout_open
Debug: 188 5 stlink_usb.c:1966 stlink_usb_open(): stlink_usb_open
Debug: 189 5 stlink_usb.c:1983 stlink_usb_open(): transport: 3 vid: 0x0483 pid: 0x3748 serial:
Info : 190 9 stlink_usb.c:658 stlink_usb_version(): STLINK v2 JTAG v28 API v2 SWIM v7 VID 0x0483 PID 0x3748
Info : 191 9 stlink_usb.c:2094 stlink_usb_open(): using stlink api v2
Debug: 192 9 stlink_usb.c:859 stlink_usb_init_mode(): MODE: 0x03
Info : 193 10 stlink_usb.c:690 stlink_usb_check_voltage(): Target voltage: 3.266357
Debug: 194 10 stlink_usb.c:914 stlink_usb_init_mode(): MODE: 0x01
Debug: 195 10 stlink_usb.c:940 stlink_usb_init_mode(): MODE: 0x03
Debug: 196 20 hla_interface.c:127 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
Debug: 197 20 core.c:729 jtag_add_reset(): SRST line released
Debug: 198 20 core.c:753 jtag_add_reset(): TRST line released
Debug: 199 20 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 200 20 hla_interface.c:67 hl_interface_init_target(): hl_interface_init_target
Debug: 201 20 openocd.c:153 handle_init_command(): Examining targets...
Debug: 202 20 target.c:1519 target_call_event_callbacks(): target event 21 (examine-start)
Debug: 203 20 stm8.c:1604 stm8_examine(): stm8_examine
Debug: 204 20 stm8.c:1609 stm8_examine(): writing A0 to SWIM_CSR
Debug: 205 21 stm8.c:1614 stm8_examine(): writing B0 to SWIM_CSR
Debug: 206 23 target.c:1519 target_call_event_callbacks(): target event 22 (examine-end)
Debug: 207 23 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_flash init
Debug: 208 23 command.c:143 script_debug(): command - ocd_flash ocd_flash init
Debug: 210 25 tcl.c:1099 handle_flash_init_command(): Initializing flash devices...
Debug: 211 25 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_mflash init
Debug: 212 25 command.c:143 script_debug(): command - ocd_mflash ocd_mflash init
Debug: 214 27 mflash.c:1377 handle_mflash_init_command(): Initializing mflash devices...
Debug: 215 27 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_nand init
Debug: 216 27 command.c:143 script_debug(): command - ocd_nand ocd_nand init
Debug: 218 28 tcl.c:497 handle_nand_init_command(): Initializing NAND devices...
Debug: 219 28 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_pld init
Debug: 220 28 command.c:143 script_debug(): command - ocd_pld ocd_pld init
Debug: 222 30 pld.c:205 handle_pld_init_command(): Initializing PLDs...
Debug: 223 30 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_reset halt
Debug: 224 30 command.c:143 script_debug(): command - reset ocd_reset halt
Debug: 226 32 target.c:1537 target_call_reset_callbacks(): target reset 2 (halt)
Debug: 227 32 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 228 32 command.c:143 script_debug(): command - ocd_target ocd_target names
Debug: 229 32 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu invoke-event reset-start
Debug: 230 32 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu invoke-event reset-start
Debug: 231 32 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 232 32 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 233 32 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 234 32 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 235 32 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu invoke-event examine-start
Debug: 236 32 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu invoke-event examine-start
Debug: 237 32 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu arp_examine allow-defer
Debug: 238 32 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu arp_examine allow-defer
Debug: 239 32 stm8.c:1604 stm8_examine(): stm8_examine
Debug: 240 32 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu invoke-event examine-end
Debug: 241 32 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu invoke-event examine-end
Debug: 242 32 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu invoke-event reset-assert-pre
Debug: 243 32 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu invoke-event reset-assert-pre
Debug: 244 32 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 245 32 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 246 32 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu arp_reset assert 1
Debug: 247 32 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu arp_reset assert 1
Debug: 248 32 target.c:1901 target_free_all_working_areas_restore(): freeing all working areas
Debug: 249 32 stm8.c:885 stm8_reset_assert(): stm8_reset_assert
Debug: 250 32 hla_interface.c:127 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
Debug: 251 32 core.c:725 jtag_add_reset(): SRST line asserted
Debug: 252 33 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu invoke-event reset-assert-post
Debug: 253 33 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu invoke-event reset-assert-post
Debug: 254 33 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu invoke-event reset-deassert-pre
Debug: 255 33 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu invoke-event reset-deassert-pre
Debug: 256 33 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 257 33 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 258 33 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu arp_reset deassert 1
Debug: 259 33 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu arp_reset deassert 1
Debug: 260 33 target.c:1901 target_free_all_working_areas_restore(): freeing all working areas
Debug: 261 33 stm8.c:937 stm8_reset_deassert(): stm8_reset_deassert
Debug: 262 33 hla_interface.c:127 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
Debug: 263 33 core.c:729 jtag_add_reset(): SRST line released
Debug: 264 33 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu invoke-event reset-deassert-post
Debug: 265 33 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu invoke-event reset-deassert-post
Debug: 266 33 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 267 33 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 268 33 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu was_examined
Debug: 269 33 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu was_examined
Debug: 270 33 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu arp_waitstate halted 1000
Debug: 271 33 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu arp_waitstate halted 1000
Debug: 272 36 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm8.cpu curstate
Debug: 273 36 command.c:143 script_debug(): command - ocd_stm8.cpu ocd_stm8.cpu curstate
User : 274 36 command.c:544 command_print(): TARGET: stm8.cpu - Not halted
in procedure 'reset'
in procedure 'ocd_bouncer'
Debug: 275 36 command.c:626 run_command(): Command failed with error code -4
User : 276 36 command.c:687 command_run_line():
Debug: 277 36 hla_interface.c:117 hl_interface_quit(): hl_interface_quit
cas@cas-sp4:~/OpenSource-EBike-firmware/BMSBattery_S_controllers_firmware$
My OpenOCD STM8S105C6T6 script:
script for stm8 family
stm8 devices support SWIM transports only.
transport select stlink_swim
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME stm8
}
Work-area is a space in RAM used for flash programming
By default use 1kB
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x400
}
if { [info exists FLASHSTART] } {
set _FLASHSTART $FLASHSTART
} else {
set _FLASHSTART 0x8000
}
if { [info exists FLASHEND] } {
set _FLASHEND $FLASHEND
} else {
set _FLASHEND 0xffff
}
if { [info exists EEPROMSTART] } {
set _EEPROMSTART $EEPROMSTART
} else {
set _EEPROMSTART 0x4000
}
if { [info exists EEPROMEND] } {
set _EEPROMEND $EEPROMEND
} else {
set _EEPROMEND 0x43ff
}
if { [info exists OPTIONSTART] } {
set _OPTIONSTART $OPTIONSTART
} else {
set _OPTIONSTART 0x4800
}
if { [info exists OPTIONEND] } {
set _OPTIONEND $OPTIONEND
} else {
set _OPTIONEND 0x487f
}
if { [info exists BLOCKSIZE] } {
set _BLOCKSIZE $BLOCKSIZE
} else {
set _BLOCKSIZE 0x80
}
hla newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME stm8 -chain-position stm8.cpu
$_TARGETNAME configure -work-area-phys 0x0 -work-area-size $_WORKAREASIZE -work-area-backup 1
$_TARGETNAME configure -flashstart $_FLASHSTART -flashend $_FLASHEND -eepromstart $_EEPROMSTART -eepromend $_EEPROMEND -optionstart $_OPTIONSTART -optionend $_EEPROMEND -blocksize $_BLOCKSIZE
if { [info exists ENABLE_STEP_IRQ] } {
$_TARGETNAME configure -enable_step_irq
}
adapter_khz 0
reset_config srst_only
Last edit: casainho 2017-05-20
Are you sure srst line is correctly wired?
What board are you using this time?
Hmmm is possible. I will look at the circuit.
This board:
I finally got my boards/EBike motor controller with STM8S105C6T6. I am able to flash with stm8flash and also with OpenOCD -- you can see here: https://opensourceebikefirmware.bitbucket.io/Various--Endless-sphere.com_forum_messages--2017.05.18_-_First_code_flashing_and_running.html
Last edit: casainho 2017-05-20
How is it going?
Finally I was able to lay my hands on a STM8L discovery board. Althogh STM8L does not apply to your project I ran in to an issue with the SWIM interface on the discovery board with VDD line to the stlink.
I noticed in your picture you only have 3 wires connected, I assume the VDD line is not connected? Any how it seems the genuine ST-link/v2 dongle requires the VDD line to be connected or there will be trouble connecting to the target. I don't know if the same apply for other generic ST-Link dongles as well.
/Ake
Well, I never looked again to this issue as I am able to program and debug.
I see the NRST line have 5V... maybe the clone STLinkV2 I have can't put it
at 0V.
Yes, I am using STLinkV2 clone, I have 2 units. I am never using the VDD
line, nor for STM8 nor for STM32.
By the way, I just finish the first code that runs the EBike motor:
https://www.youtube.com/watch?v=mrmxdoyH_Hs
2017-05-25 18:23 GMT+01:00 akre arehnman@users.sf.net:
--
Cumprimentos,
Jorge Pinto
E-mail: casainho@gmail.com
Telemóvel: 927145983