Re: [Socbuilder-discussion] Progress

[Bill C. <bi...@vi...>]

bporcella wrote:

> Hi all.
>  
> Not much communication on this list for awhile.  Is everybody giving 
> up or just too busy?
>  
> I have been working out the details of Wishbone compatible Z80 (in 
> verilog)   ---  I'm not ready to recommend this as the first processor to
> incorporate in the builder   (assuming we get a builder together) 
> ---   but I'll try to make a case.     I need to get some 
> documentation together
> on what I have been doing - get verification underway, and start 
> thinking some more about global system issues.   
>  
> I will be busy with family things for the next week or two, but will 
> be watching mail.   If anyone is making any progress, please let us 
> know. 
>  
> bj Porcella
> http://pages.sbcglobal.net/bporcella/

Hi, Bj.

I'm just too busy.  Last week, after spending two weeks working 16 hour 
days, we finished up a tape-out with a 33 hour day at work.  Now there's 
another tape out...

Actually, I seem finally be getting ahead of my work.  I hope to find 
some time to work on this starting next week.

What do you guys think of Confluence now that it's open source? 
 Personally, I think we should use it for our module generation tasks, 
which I find to be a separate task to the connection engine described by 
Rudi's SoC Builder spec.  The connection engine may allow for a bit of 
plug-and-play compatability between modules, but what those modules do 
will have to be fairly fixed.  We can propagate parameters like bus 
widths, but real flexibility requires a language like Confluence.

Also, I'm still waiting for the connection engine spec to be upgraded to 
include parameters that can be propagated around, like bus widths.  Once 
that's done, if we agree that it's probably the right way to proceed, 
I'll get started on some code.

Bill