Recent changes to SLSignal_Prototype

SLSignal_Prototype modified by TwinDad

TwinDad — Tue, 20 May 2014 02:00:08 -0000

--- v27
+++ v28
@@ -387,11 +387,17 @@
  ???

 13 
+PCB Setup Fee 
+1 
+$25.00 
+$25.00 
+
+14 
 PCB 
 1 
-$61.00 
-$61.00 
-12in^2 + $25 setup 
+$36.00 
+$36.00 
+Estimated 12in^2 @ $3/in^2 

 Ancillary passives are not (yet) listed.

SLSignal_Prototype modified by TwinDad

TwinDad — Tue, 20 May 2014 02:00:07 -0000

--- v26
+++ v27
@@ -389,9 +389,9 @@
 13 
 PCB 
 1 
-$50.00 
-$50.00 
-8in^2 + $25 setup 
+$61.00 
+$61.00 
+12in^2 + $25 setup

 Ancillary passives are not (yet) listed.

SLSignal_Prototype modified by TwinDad

TwinDad — Tue, 20 May 2014 02:00:07 -0000

--- v25
+++ v26
@@ -389,8 +389,9 @@
 13 
 PCB 
 1 
- ??? 
- ??? 
+$50.00 
+$50.00 
+8in^2 + $25 setup

 Ancillary passives are not (yet) listed.

SLSignal_Prototype modified by TwinDad

TwinDad — Tue, 20 May 2014 02:00:07 -0000

--- v24
+++ v25
@@ -267,6 +267,8 @@

 Unused I/O pins will be brought out to a header for future expansion. 

+Wherever possible, the "regular" inputs and outputs to the circuit will be routed to the general-purpose IO pins, leaving the dual (or triple) purpose IOs free for future use in their special-purpose mode. It is fully anticipated that this board could be used for some alternate logic function, or easily modified for such use. 
+
 ### Output LED Drivers

 The SIG[0:11] outputs from the core logic will be fed to a set of 7406 Inverting and 7407 Non-Inverting Open Collector Hex Driver chips (one inverting and one non-inverting for each SIG output). These will convert the High/Low Green/Red logic outputs into separate active low on/off outputs for each LED.

SLSignal_Prototype modified by TwinDad

TwinDad — Tue, 20 May 2014 02:00:07 -0000

--- v23
+++ v24
@@ -259,7 +259,13 @@

 ### Core Logic

-Blah Blah Blah 
+The core logic will be implemented in an Atmel ATF1504AS CPLD chip, for reasons explained above. The chip is powered at 5V, and (while capable of 3.3V I/O) will have 5V I/O as well. No clock circuitry will be provided, as the logic does not at this time require clocked registers. 
+
+If there is room on the board, I may add a crystal circuit for future expansion. 
+
+A 4-pin header for the JTAG in-circuit programming port will be provided. 
+
+Unused I/O pins will be brought out to a header for future expansion. 

 ### Output LED Drivers

SLSignal_Prototype modified by TwinDad

TwinDad — Tue, 20 May 2014 02:00:06 -0000

--- v22
+++ v23
@@ -226,7 +226,36 @@

 ### Input Circuits

-Blah Blah Blah 
+The input circuits are very simple. There are 4 input buses: 
+
+  * TO [0:7] - the turnout position indications 
+    * '0' == Lined for main (straight through turnout, usually) 
+    * '1' == Diverging route (curved route, usually) 
+  * OCC[0:7] - track occupancy 
+    * '0' == Track is clear 
+    * '1' == Track is occupied or obstructed 
+  * DIR[0:7] - track direction (by convention specific to layout) 
+    * '0' - Entering the yard 
+    * '1' - Exiting the yard 
+  * SIG_OV[0:11] - Red Signal override 
+    * '0' - Force RED or STOP aspect 
+    * '1' - Allow conditional signal aspect 
+  * +5V DC Power (2.5mm barrel) 
+
+  
+Note that the SIG_OV input may seem a little backward, but it allows the SIG_OV signal to be wired directly to the signal logic output without using any logic gates. 
+
+SIG_OV and DIR are human user (Dispatcher) inputs, and will be wired to either switches or computer inputs. The switches will be mounted on the board, but provision made for remote mounting. 
+
+TO and OCC are track condition sensing inputs, and could be connected directly to turnout motors or sensors on the track. 
+
+All inputs will be SPST DIP switches which will ground their respective input line when closed or allow a pull-up resistor to pull the line high when open. The DIP switches will be mounted on board, and will be backed up by 2-pin header strips for remote connection. 
+
+For the prototype, no isolation or signal conditioning will be provided. Therefore care must be taken that any remote connections provide appropriate signal conditioning for direct input into the 5V tolerant CMOS inputs of the ATF1504 core logic. In the future, specific provisions may be added for direct connection to different types of input circuits. 
+
+Caveat: Since I know that the plan for my personal layout is to use [Tam Valley Depot Quad Servo Controllers](http://www.tamvalleydepot.com/products/quadservodecoder.html) for turnout control, I *may* include circuitry as necessary to allow direct connection from the Quad outputs to this board. 
+
+For the power input, a full power conversion and regulator circuit is envisioned, but the initial prototype version will likely have only a +5V DC input plug with some very basic filtering. 

 ### Core Logic

SLSignal_Prototype modified by TwinDad

TwinDad — Tue, 20 May 2014 02:00:06 -0000

--- v21
+++ v22
@@ -282,8 +282,8 @@
 Input Pullup Resistors 
 SMT Bussed RPAK 
 3 
-1.24 
-3.72 
+$1.24 
+$3.72 
 CTS 767-141-103GP or equiv.

 5 
@@ -356,3 +356,5 @@
  ??? 

 Ancillary passives are not (yet) listed. 
+
+Unit cost is $26.56, not counting the PCB, power regulation circuit, and remote input headers (items #7 & #8).

SLSignal_Prototype modified by TwinDad

TwinDad — Tue, 20 May 2014 02:00:06 -0000

--- v20
+++ v21
@@ -238,11 +238,11 @@

 The output connector for each signal will be 3 wires (pinout TBD): 

-  * Common Anode 
+  * +5V Supply 
   * Red LED Cathode 
   * Green LED Cathode 

-The Common Anode pin will be connected to +5V via a current limit resistor set to control the LED to ~ 20mA, maximum. 
+The Anodes of the LEDs should be connected through an external current limit resistor to the +5V pin. 

 The Red Cathode pin will be connected to the output of a 7407 Non-Inverting driver, so that when the logic output is low, the Red LED will be turned on.

SLSignal_Prototype modified by TwinDad

TwinDad — Tue, 20 May 2014 02:00:06 -0000

--- v19
+++ v20
@@ -280,11 +280,11 @@

 4 
 Input Pullup Resistors 
- ??? 
- ??? 
- ??? 
- ??? 
-10K bussed 
+SMT Bussed RPAK 
+3 
+1.24 
+3.72 
+CTS 767-141-103GP or equiv. 

 5 
 TO, OCC, DIR Switches

SLSignal_Prototype modified by TwinDad

TwinDad — Tue, 20 May 2014 02:00:05 -0000

--- v18
+++ v19
@@ -192,15 +192,15 @@
 Turnout positions 
 TO1, TO2, TO3, TO4, TO5, TO6, TO7, TO8

-DIR[0:6] 
+DIR[0:7] 
 Inputs 
 Track Directions (Dispatch) 
-EM, T1, T2, T3, ES, WM, WS 
-
-OCC[0:6] 
+EM, T1, T2, T3, ES, WM, WS, MB 
+
+OCC[0:7] 
 Inputs 
 Track Occupancy (sensors) 
-EM, T1, T2, T3, ES, WM, WS 
+EM, T1, T2, T3, ES, WM, WS, MB 

 SIG_OV[0:11] 
 Inputs