#492 mcs51: track register equality

[Tobias Diedrich]

In the best case this changes the code for:
uint16_t x(uint16_t arg) { return ++x; }

to be

      inc dptr
      ret

instead of

      mov  r6, dpl
      mov  r7, dph
      inc  r6
      cjne r6, #0, skip
      inc  r7
    skip:
      mov  dpl, r6
      mov  dph, r7
      ret

It also optimizes sequences like:

      *(x++) = a;
      *(x++) = b;
      *(x++) = c;

if a/b/c are SFR/iram/const so that DPTR is not clobbered for the data fetch.

Limitations: Peephole optimizations happen after register tracking and any
branch resets the tracker, and while/for/if always generate an unconditional
branch, so the following is not optimized:

    while (*(x++));

Tested: Regression tests pass