<BLOCKQUOTE cite=mid20030308125943.37365.qmail@... type="cite"><PRE wrap="">Hi me again. As a Student, I am desiging a TCP/IP
stack implementation. I would like to design a Dev board for my implementation. </PRE><PRE wrap="">I intend to connecting a cs8900A embedded ethernet card, a 128x128
LCD. I have deviced a timing circuit for a 8051
running at 24Mhz. From my calculations, I believe each instruction takes
250ns and my circuit takes about 50ns off that time.
the circuit involves 2 4 input NOR gates (13ns) and
one 2 input NOR (10ns) for the higher 10bit Address, a
74HC138 decoder as selector lines for the two devices.
and I also connected the PSEN line to the decoder so
that my circuit only selects the devices when SRAM
Data is request. (so when PSEN is high). </PRE><PRE wrap="">As My device are only addressed to external Ram, </PRE><PRE wrap="">They will only be accessed during a MOVX instruction. and hence</PRE><PRE wrap="">take effect during the 6 clock cycle instruction.</PRE></BLOCKQUOTE>
<BLOCKQUOTE cite=mid20030308125943.37365.qmail@... type="cite"><PRE wrap="">I just wanted to know what you guys/gals think as think
there are expert in here. I would appriciate any
input.</PRE><PRE wrap="">thanks</PRE><PRE wrap="">Charles</PRE></BLOCKQUOTE>
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