Some time ago the hc08 port was mostly rewritten to work with the new
register allocator. The new register allcoator had shown its usefulness
in the z80-related ports before.
The new register allcoator combined with the rewrite resulted in a
substancial improvemnet - for s08 users it meant a nearly 50% refduction
in code size (see attached graph)!
When writing the stm8 port, I tried to take things a bit further:
Bytewise register allocation. Each individual byte of each variable is
allocated into a register or spilt.
For stm8 this can result in improvements - see the other attached graph:
"Conventional" means each variable is allocated into 8-bit register a or
16-bit register x or 16-bit register y or spilt.
"Bytewise allcoation" means that each byte of each variable is allocated
into any of the 8-bit register a, xl, xh, yl, yh. But they all have to
go to registers or all be spilt.
"Bytewise allcoation and spilling " means that each byte of each
variable is allocated into any of the 8-bit register a, xl, xh, yl, yh
The graph shows code size for the two classic benchmarks for embedded
systems: Dhrystone and Coremark. For Dhrystone, the bytewise spilling
only provides a very small advantage over just bytewise allocation. But
for Coremark, we see the following code sizes:
Bytewise allocation: 17006
Bytewise allocation and spilling: 16381 - a nearly 4% code size
reduction compared to just bytewise spilling, an over 8% code size
reduction compared to conventional allocation.
I wonder how the numbers would look like for the hc08 and s08 ports - on
one hand I guess that the even lower number of registers would increase
the benefits of bytewise spilling. On the other hand the hc08/s08 has
fewer instructions that would be useful when putting part of a variable
into register x.